X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm7tdmi.c;h=c590701e2a84a2de92f0540868db543b71aae02b;hp=541bede73d12d510a00f9636d3b0f380f6d1f237;hb=dc575dc5bf8cb597a0e9a47794744ae6b1928087;hpb=3813fda44adcea486b7308423a699f63d79273ee

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 541bede73d..c590701e2a 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -216,9 +216,9 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
 
 void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip)
 {
-	uint32_t readback=le_to_h_u32(tmp);
+	uint32_t readback = le_to_h_u32(tmp);
 	if (flip)
-		readback=flip_u32(readback, 32);
+		readback = flip_u32(readback, 32);
 	switch (size)
 	{
 		case 4:
@@ -247,7 +247,7 @@ void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip)
 
 static int arm7endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
 {
-  uint8_t *in=(uint8_t *)arg;
+  uint8_t *in = (uint8_t *)arg;
 	arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 1);
 	return ERROR_OK;
 }
@@ -383,7 +383,7 @@ void arm7tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_reg
 	for (i = 0; i <= 15; i++)
 	{
 		if (mask & (1 << i))
-			/* nothing fetched, STM still in EXECUTE (1+i cycle) */
+			/* nothing fetched, STM still in EXECUTE (1 + i cycle) */
 			arm7tdmi_clock_data_in(jtag_info, core_regs[i]);
 	}
 }
@@ -412,7 +412,7 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void
 
 	for (i = 0; i <= 15; i++)
 	{
-		/* nothing fetched, STM still in EXECUTE (1+i cycle), read databus */
+		/* nothing fetched, STM still in EXECUTE (1 + i cycle), read databus */
 		if (mask & (1 << i))
 		{
 			switch (size)
@@ -522,7 +522,7 @@ void arm7tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg
 	for (i = 0; i <= 15; i++)
 	{
 		if (mask & (1 << i))
-			/* nothing fetched, LDM still in EXECUTE (1+i cycle) */
+			/* nothing fetched, LDM still in EXECUTE (1 + i cycle) */
 			arm7tdmi_clock_out_inner(jtag_info, core_regs[i], 0);
 	}
 	arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
@@ -724,7 +724,7 @@ int arm7tdmi_examine(struct target_s *target)
 	{
 		/* get pointers to arch-specific information */
 		reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
-		reg_cache_t *t=embeddedice_build_reg_cache(target, arm7_9);
+		reg_cache_t *t = embeddedice_build_reg_cache(target, arm7_9);
 		if (t == NULL)
 			return ERROR_FAIL;
 
@@ -739,13 +739,13 @@ int arm7tdmi_examine(struct target_s *target)
 		}
 		target_set_examined(target);
 	}
-	if ((retval=embeddedice_setup(target)) != ERROR_OK)
+	if ((retval = embeddedice_setup(target)) != ERROR_OK)
 		return retval;
-	if ((retval=arm7_9_setup(target)) != ERROR_OK)
+	if ((retval = arm7_9_setup(target)) != ERROR_OK)
 		return retval;
 	if (arm7_9->etm_ctx)
 	{
-		if ((retval=etm_setup(target)) != ERROR_OK)
+		if ((retval = etm_setup(target)) != ERROR_OK)
 			return retval;
 	}
 	return ERROR_OK;
@@ -822,7 +822,7 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_
 	return ERROR_OK;
 }
 
-int arm7tdmi_target_create( struct target_s *target, Jim_Interp *interp )
+int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
 {
 	arm7tdmi_common_t *arm7tdmi;