X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm7_9_common.c;h=af3b7b3213a155de7f421f84a7169bb55549bd4a;hp=cda99d842a05126ca9ec9cd8cedef4cb15e13b9c;hb=68b97e4b5c40a70b42dc2a970f1b90b9a3e9f13d;hpb=ffb51c23fdd753ada2554b8b6283533089153b46 diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index cda99d842a..af3b7b3213 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -25,6 +25,7 @@ #include "embeddedice.h" #include "target.h" +#include "target_request.h" #include "armv4_5.h" #include "arm_jtag.h" #include "jtag.h" @@ -242,11 +243,19 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) /* restore original instruction (kept in target endianness) */ if (breakpoint->length == 4) { - target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr); + u32 current_instr; + /* check that user program as not modified breakpoint instruction */ + target->type->read_memory(target, breakpoint->address, 4, 1, (u8*)¤t_instr); + if (current_instr==arm7_9->arm_bkpt) + target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr); } else { - target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr); + u16 current_instr; + /* check that user program as not modified breakpoint instruction */ + target->type->read_memory(target, breakpoint->address, 2, 1, (u8*)¤t_instr); + if (current_instr==arm7_9->thumb_bkpt) + target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr); } breakpoint->set = 0; } @@ -568,7 +577,8 @@ int arm7_9_execute_sys_speed(struct target_s *target) int arm7_9_execute_fast_sys_speed(struct target_s *target) { - u8 check_value[4], check_mask[4]; + static int set=0; + static u8 check_value[4], check_mask[4]; armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info; @@ -579,9 +589,18 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target) jtag_add_end_state(TAP_RTI); arm_jtag_set_instr(jtag_info, 0x4, NULL); - /* check for DBGACK and SYSCOMP set (others don't care) */ - buf_set_u32(check_value, 0, 32, 0x9); - buf_set_u32(check_mask, 0, 32, 0x9); + if (!set) + { + /* check for DBGACK and SYSCOMP set (others don't care) */ + + /* NB! These are constants that must be available until after next jtag_execute() and + we evaluate the values upon first execution in lieu of setting up these constants + during early setup. + */ + buf_set_u32(check_value, 0, 32, 0x9); + buf_set_u32(check_mask, 0, 32, 0x9); + set=1; + } /* read debug status register */ embeddedice_read_reg_w_check(dbg_stat, check_value, check_value); @@ -589,6 +608,58 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target) return ERROR_OK; } +int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer) +{ + armv4_5_common_t *armv4_5 = target->arch_info; + arm7_9_common_t *arm7_9 = armv4_5->arch_info; + arm_jtag_t *jtag_info = &arm7_9->jtag_info; + u32 *data; + int i; + + data = malloc(size * (sizeof(u32))); + + embeddedice_receive(jtag_info, data, size); + + for (i = 0; i < size; i++) + { + h_u32_to_le(buffer + (i * 4), data[i]); + } + + free(data); + + return ERROR_OK; +} + +int arm7_9_handle_target_request(void *priv) +{ + target_t *target = priv; + armv4_5_common_t *armv4_5 = target->arch_info; + arm7_9_common_t *arm7_9 = armv4_5->arch_info; + arm_jtag_t *jtag_info = &arm7_9->jtag_info; + reg_t *dcc_control = &arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL]; + + if (!target->dbg_msg_enabled) + return ERROR_OK; + + if (target->state == TARGET_RUNNING) + { + /* read DCC control register */ + embeddedice_read_reg(dcc_control); + jtag_execute_queue(); + + /* check W bit */ + if (buf_get_u32(dcc_control->value, 1, 1) == 1) + { + u32 request; + + embeddedice_receive(jtag_info, &request, 1); + target_request(target, request); + } + } + + return ERROR_OK; +} + enum target_state arm7_9_poll(target_t *target) { int retval; @@ -2097,6 +2168,82 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe return ERROR_OK; } +int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum) +{ + working_area_t *crc_algorithm; + armv4_5_algorithm_t armv4_5_info; + reg_param_t reg_params[2]; + int retval; + + u32 arm7_9_crc_code[] = { + 0xE1A02000, /* mov r2, r0 */ + 0xE3E00000, /* mov r0, #0xffffffff */ + 0xE1A03001, /* mov r3, r1 */ + 0xE3A04000, /* mov r4, #0 */ + 0xEA00000B, /* b ncomp */ + /* nbyte: */ + 0xE7D21004, /* ldrb r1, [r2, r4] */ + 0xE59F7030, /* ldr r7, CRC32XOR */ + 0xE0200C01, /* eor r0, r0, r1, asl 24 */ + 0xE3A05000, /* mov r5, #0 */ + /* loop: */ + 0xE3500000, /* cmp r0, #0 */ + 0xE1A06080, /* mov r6, r0, asl #1 */ + 0xE2855001, /* add r5, r5, #1 */ + 0xE1A00006, /* mov r0, r6 */ + 0xB0260007, /* eorlt r0, r6, r7 */ + 0xE3550008, /* cmp r5, #8 */ + 0x1AFFFFF8, /* bne loop */ + 0xE2844001, /* add r4, r4, #1 */ + /* ncomp: */ + 0xE1540003, /* cmp r4, r3 */ + 0x1AFFFFF1, /* bne nbyte */ + /* end: */ + 0xEAFFFFFE, /* b end */ + 0x04C11DB7 /* CRC32XOR: .word 0x04C11DB7 */ + }; + + int i; + + if (target_alloc_working_area(target, sizeof(arm7_9_crc_code), &crc_algorithm) != ERROR_OK) + { + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + + /* convert flash writing code into a buffer in target endianness */ + for (i = 0; i < (sizeof(arm7_9_crc_code)/sizeof(u32)); i++) + target_write_u32(target, crc_algorithm->address + i*sizeof(u32), arm7_9_crc_code[i]); + + armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; + armv4_5_info.core_mode = ARMV4_5_MODE_SVC; + armv4_5_info.core_state = ARMV4_5_STATE_ARM; + + init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); + init_reg_param(®_params[1], "r1", 32, PARAM_OUT); + + buf_set_u32(reg_params[0].value, 0, 32, address); + buf_set_u32(reg_params[1].value, 0, 32, count); + + if ((retval = target->type->run_algorithm(target, 0, NULL, 2, reg_params, + crc_algorithm->address, crc_algorithm->address + (sizeof(arm7_9_crc_code) - 8), 20000, &armv4_5_info)) != ERROR_OK) + { + ERROR("error executing arm7_9 crc algorithm"); + destroy_reg_param(®_params[0]); + destroy_reg_param(®_params[1]); + target_free_working_area(target, crc_algorithm); + return retval; + } + + *checksum = buf_get_u32(reg_params[0].value, 0, 32); + + destroy_reg_param(®_params[0]); + destroy_reg_param(®_params[1]); + + target_free_working_area(target, crc_algorithm); + + return ERROR_OK; +} + int arm7_9_register_commands(struct command_context_s *cmd_ctx) { command_t *arm7_9_cmd; @@ -2467,5 +2614,7 @@ int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9) armv4_5_init_arch_info(target, armv4_5); + target_register_timer_callback(arm7_9_handle_target_request, 1, 1, target); + return ERROR_OK; }