X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm720t.c;h=b5c9752b26bc0337fc3964be27647c38c6173c96;hp=7aff8a7eb2373a3c890a68640b1ca2d7aaeb4b34;hb=4b97f3cbb9603c13f69f8d3b5371c12045593126;hpb=04dc98916d9acb57e0f5595534151a24ba4dc684 diff --git a/src/target/arm720t.c b/src/target/arm720t.c index 7aff8a7eb2..b5c9752b26 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -97,7 +97,7 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c jtag_add_end_state(TAP_PD); arm_jtag_scann(jtag_info, 0xf); - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr); + arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); fields[0].device = jtag_info->chain_pos; fields[0].num_bits = 1; @@ -126,7 +126,7 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; - jtag_add_dr_scan(2, fields, -1); + jtag_add_dr_scan(2, fields, -1, NULL); if (clock) jtag_add_runtest(0, -1); @@ -241,8 +241,8 @@ void arm720t_post_debug_entry(target_t *target) arm720t->armv4_5_mmu.armv4_5_cache.i_cache_enabled = 0; /* save i/d fault status and address register */ - arm720t_read_cp15(target, 0xee150f10, &arm720t->fsr); - arm720t_read_cp15(target, 0xee160f10, &arm720t->far); + arm720t_read_cp15(target, 0xee150f10, &arm720t->fsr_reg); + arm720t_read_cp15(target, 0xee160f10, &arm720t->far_reg); jtag_execute_queue(); } @@ -254,8 +254,8 @@ void arm720t_pre_restore_context(target_t *target) arm720t_common_t *arm720t = arm7tdmi->arch_info; /* restore i/d fault status and address register */ - arm720t_write_cp15(target, 0xee050f10, arm720t->fsr); - arm720t_write_cp15(target, 0xee060f10, arm720t->far); + arm720t_write_cp15(target, 0xee050f10, arm720t->fsr_reg); + arm720t_write_cp15(target, 0xee060f10, arm720t->far_reg); } int arm720t_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm7tdmi_common_t **arm7tdmi_p, arm720t_common_t **arm720t_p) @@ -372,7 +372,7 @@ int arm720t_soft_reset_halt(struct target_s *target) target->type->halt(target); } - while (buf_get_u32(dbg_stat->value, EICE_DBG_CONTROL_DBGACK, 1) == 0) + while (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0) { embeddedice_read_reg(dbg_stat); jtag_execute_queue();