X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm720t.c;h=4e09228bad97422c67b5699d11d5876f98b3744e;hp=afa5599c676591e527c85846bdd9d99f95cb4cdd;hb=42ef503d37b18d907da16d26e99167566d5aabd1;hpb=b5210375099adccb747a43c47cdd56dc2c1db85e diff --git a/src/target/arm720t.c b/src/target/arm720t.c index afa5599c67..4e09228bad 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -2,6 +2,9 @@ * Copyright (C) 2005 by Dominic Rath * * Dominic.Rath@gmx.de * * * + * Copyright (C) 2009 by Øyvind Harboe * + * oyvind.harboe@zylin.com * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -26,82 +29,35 @@ #include "target_type.h" +/* + * ARM720 is an ARM7TDMI-S with MMU and ETM7. For information, see + * ARM DDI 0229C especially Chapter 9 about debug support. + */ + #if 0 #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -/* cli handling */ -int arm720t_register_commands(struct command_context_s *cmd_ctx); - -int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int arm720t_handle_virt2phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int arm720t_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int arm720t_handle_mw_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); - -/* forward declarations */ -int arm720t_target_create(struct target_s *target,Jim_Interp *interp); -int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int arm720t_quit(void); -int arm720t_arch_state(struct target_s *target); -int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int arm720t_soft_reset_halt(struct target_s *target); - -target_type_t arm720t_target = +static int arm720t_scan_cp15(target_t *target, + uint32_t out, uint32_t *in, int instruction, int clock) { - .name = "arm720t", - - .poll = arm7_9_poll, - .arch_state = arm720t_arch_state, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm720t_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm720t_read_memory, - .write_memory = arm720t_write_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, - - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm720t_register_commands, - .target_create = arm720t_target_create, - .init_target = arm720t_init_target, - .examine = arm7tdmi_examine, - .quit = arm720t_quit -}; - -int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruction, int clock) -{ - int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + int retval; + struct arm720t_common_s *arm720t = target_to_arm720(target); + arm_jtag_t *jtag_info; scan_field_t fields[2]; uint8_t out_buf[4]; uint8_t instruction_buf = instruction; + jtag_info = &arm720t->arm7tdmi_common.arm7_9_common.jtag_info; + buf_set_u32(out_buf, 0, 32, flip_u32(out, 32)); jtag_set_end_state(TAP_DRPAUSE); - if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK) + if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK) { return retval; } - if((retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL)) != ERROR_OK) + if ((retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL)) != ERROR_OK) { return retval; } @@ -130,7 +86,7 @@ int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruct jtag_add_runtest(0, jtag_get_end_state()); #ifdef _DEBUG_INSTRUCTION_EXECUTION_ - if((retval = jtag_execute_queue()) != ERROR_OK) + if ((retval = jtag_execute_queue()) != ERROR_OK) { return retval; } @@ -146,7 +102,7 @@ int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruct return ERROR_OK; } -int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value) +static int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value) { /* fetch CP15 opcode */ arm720t_scan_cp15(target, opcode, NULL, 1, 1); @@ -163,7 +119,7 @@ int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value) return ERROR_OK; } -int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value) +static int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value) { /* fetch CP15 opcode */ arm720t_scan_cp15(target, opcode, NULL, 1, 1); @@ -179,7 +135,7 @@ int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value) return ERROR_OK; } -uint32_t arm720t_get_ttb(target_t *target) +static uint32_t arm720t_get_ttb(target_t *target) { uint32_t ttb = 0x0; @@ -191,7 +147,8 @@ uint32_t arm720t_get_ttb(target_t *target) return ttb; } -void arm720t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache) +static void arm720t_disable_mmu_caches(target_t *target, + int mmu, int d_u_cache, int i_cache) { uint32_t cp15_control; @@ -208,7 +165,8 @@ void arm720t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_ arm720t_write_cp15(target, 0xee010f10, cp15_control); } -void arm720t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache) +static void arm720t_enable_mmu_caches(target_t *target, + int mmu, int d_u_cache, int i_cache) { uint32_t cp15_control; @@ -225,12 +183,9 @@ void arm720t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_c arm720t_write_cp15(target, 0xee010f10, cp15_control); } -void arm720t_post_debug_entry(target_t *target) +static void arm720t_post_debug_entry(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info; - arm720t_common_t *arm720t = arm7tdmi->arch_info; + struct arm720t_common_s *arm720t = target_to_arm720(target); /* examine cp15 control reg */ arm720t_read_cp15(target, 0xee110f10, &arm720t->cp15_control_reg); @@ -247,79 +202,42 @@ void arm720t_post_debug_entry(target_t *target) jtag_execute_queue(); } -void arm720t_pre_restore_context(target_t *target) +static void arm720t_pre_restore_context(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info; - arm720t_common_t *arm720t = arm7tdmi->arch_info; + struct arm720t_common_s *arm720t = target_to_arm720(target); /* restore i/d fault status and address register */ arm720t_write_cp15(target, 0xee050f10, arm720t->fsr_reg); arm720t_write_cp15(target, 0xee060f10, arm720t->far_reg); } -int arm720t_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm7tdmi_common_t **arm7tdmi_p, arm720t_common_t **arm720t_p) +static int arm720t_verify_pointer(struct command_context_s *cmd_ctx, + struct arm720t_common_s *arm720t) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9; - arm7tdmi_common_t *arm7tdmi; - arm720t_common_t *arm720t; - - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) - { - return -1; - } - - arm7_9 = armv4_5->arch_info; - if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC) - { - return -1; - } - - arm7tdmi = arm7_9->arch_info; - if (arm7tdmi->common_magic != ARM7TDMI_COMMON_MAGIC) - { - return -1; + if (arm720t->common_magic != ARM720T_COMMON_MAGIC) { + command_print(cmd_ctx, "target is not an ARM720"); + return ERROR_TARGET_INVALID; } - - arm720t = arm7tdmi->arch_info; - if (arm720t->common_magic != ARM720T_COMMON_MAGIC) - { - return -1; - } - - *armv4_5_p = armv4_5; - *arm7_9_p = arm7_9; - *arm7tdmi_p = arm7tdmi; - *arm720t_p = arm720t; - return ERROR_OK; } -int arm720t_arch_state(struct target_s *target) +static int arm720t_arch_state(struct target_s *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info; - arm720t_common_t *arm720t = arm7tdmi->arch_info; + struct arm720t_common_s *arm720t = target_to_arm720(target); + struct armv4_5_common_s *armv4_5; - char *state[] = + static const char *state[] = { "disabled", "enabled" }; - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) - { - LOG_ERROR("BUG: called for a non-ARMv4/5 target"); - exit(-1); - } + armv4_5 = &arm720t->arm7tdmi_common.arm7_9_common.armv4_5_common; LOG_USER("target halted in %s state due to %s, current mode: %s\n" "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n" "MMU: %s, Cache: %s", armv4_5_state_strings[armv4_5->core_state], - Jim_Nvp_value2name_simple( nvp_target_debug_reason, target->debug_reason )->name , + Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name , armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)], buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32), buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32), @@ -329,13 +247,30 @@ int arm720t_arch_state(struct target_s *target) return ERROR_OK; } -int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +static int arm720_mmu(struct target_s *target, int *enabled) +{ + if (target->state != TARGET_HALTED) { + LOG_ERROR("%s: target not halted", __func__); + return ERROR_TARGET_INVALID; + } + + *enabled = target_to_arm720(target)->armv4_5_mmu.mmu_enabled; + return ERROR_OK; +} + +static int arm720_virt2phys(struct target_s *target, + uint32_t virt, uint32_t *phys) +{ + /** @todo Implement this! */ + LOG_ERROR("%s: not implemented", __func__); + return ERROR_FAIL; +} + +static int arm720t_read_memory(struct target_s *target, + uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info; - arm720t_common_t *arm720t = arm7tdmi->arch_info; + struct arm720t_common_s *arm720t = target_to_arm720(target); /* disable cache, but leave MMU enabled */ if (arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled) @@ -349,33 +284,39 @@ int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size return retval; } -int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +static int arm720t_read_phys_memory(struct target_s *target, + uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - int retval; + struct arm720t_common_s *arm720t = target_to_arm720(target); - if ((retval = arm7_9_write_memory(target, address, size, count, buffer)) != ERROR_OK) - return retval; + return armv4_5_mmu_read_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer); +} - return retval; +static int arm720t_write_phys_memory(struct target_s *target, + uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +{ + struct arm720t_common_s *arm720t = target_to_arm720(target); + + return armv4_5_mmu_write_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer); } -int arm720t_soft_reset_halt(struct target_s *target) +static int arm720t_soft_reset_halt(struct target_s *target) { int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info; - arm720t_common_t *arm720t = arm7tdmi->arch_info; - reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; + struct arm720t_common_s *arm720t = target_to_arm720(target); + reg_t *dbg_stat = &arm720t->arm7tdmi_common.arm7_9_common + .eice_cache->reg_list[EICE_DBG_STAT]; + struct armv4_5_common_s *armv4_5 = &arm720t->arm7tdmi_common + .arm7_9_common.armv4_5_common; if ((retval = target_halt(target)) != ERROR_OK) { return retval; } - long long then=timeval_ms(); + long long then = timeval_ms(); int timeout; - while (!(timeout=((timeval_ms()-then)>1000))) + while (!(timeout = ((timeval_ms()-then) > 1000))) { if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0) { @@ -388,7 +329,7 @@ int arm720t_soft_reset_halt(struct target_s *target) { break; } - if (debug_level>=3) + if (debug_level >= 3) { alive_sleep(100); } else @@ -430,26 +371,19 @@ int arm720t_soft_reset_halt(struct target_s *target) return ERROR_OK; } -int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target) -{ - arm7tdmi_init_target(cmd_ctx, target); - - return ERROR_OK; -} - -int arm720t_quit(void) +static int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target) { - return ERROR_OK; + return arm7tdmi_init_target(cmd_ctx, target); } -int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap_t *tap) +static int arm720t_init_arch_info(target_t *target, + arm720t_common_t *arm720t, struct jtag_tap *tap) { arm7tdmi_common_t *arm7tdmi = &arm720t->arm7tdmi_common; arm7_9_common_t *arm7_9 = &arm7tdmi->arm7_9_common; arm7tdmi_init_arch_info(target, arm7tdmi, tap); - arm7tdmi->arch_info = arm720t; arm720t->common_magic = ARM720T_COMMON_MAGIC; arm7_9->post_debug_entry = arm720t_post_debug_entry; @@ -467,67 +401,38 @@ int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap return ERROR_OK; } -int arm720t_target_create(struct target_s *target, Jim_Interp *interp) -{ - arm720t_common_t *arm720t = calloc(1,sizeof(arm720t_common_t)); - - arm720t_init_arch_info(target, arm720t, target->tap); - - return ERROR_OK; -} - -int arm720t_register_commands(struct command_context_s *cmd_ctx) +static int arm720t_target_create(struct target_s *target, Jim_Interp *interp) { - int retval; - command_t *arm720t_cmd; - - - retval = arm7tdmi_register_commands(cmd_ctx); - - arm720t_cmd = register_command(cmd_ctx, NULL, "arm720t", NULL, COMMAND_ANY, "arm720t specific commands"); - - register_command(cmd_ctx, arm720t_cmd, "cp15", arm720t_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register [value]"); - register_command(cmd_ctx, arm720t_cmd, "virt2phys", arm720t_handle_virt2phys_command, COMMAND_EXEC, "translate va to pa "); - - register_command(cmd_ctx, arm720t_cmd, "mdw_phys", arm720t_handle_md_phys_command, COMMAND_EXEC, "display memory words [count]"); - register_command(cmd_ctx, arm720t_cmd, "mdh_phys", arm720t_handle_md_phys_command, COMMAND_EXEC, "display memory half-words [count]"); - register_command(cmd_ctx, arm720t_cmd, "mdb_phys", arm720t_handle_md_phys_command, COMMAND_EXEC, "display memory bytes [count]"); + struct arm720t_common_s *arm720t = calloc(1, sizeof(*arm720t)); - register_command(cmd_ctx, arm720t_cmd, "mww_phys", arm720t_handle_mw_phys_command, COMMAND_EXEC, "write memory word "); - register_command(cmd_ctx, arm720t_cmd, "mwh_phys", arm720t_handle_mw_phys_command, COMMAND_EXEC, "write memory half-word "); - register_command(cmd_ctx, arm720t_cmd, "mwb_phys", arm720t_handle_mw_phys_command, COMMAND_EXEC, "write memory byte "); - - return ERROR_OK; + arm720t->arm7tdmi_common.arm7_9_common.armv4_5_common.is_armv4 = true; + return arm720t_init_arch_info(target, arm720t, target->tap); } -int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +COMMAND_HANDLER(arm720t_handle_cp15_command) { int retval; target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; - arm7tdmi_common_t *arm7tdmi; - arm720t_common_t *arm720t; + struct arm720t_common_s *arm720t = target_to_arm720(target); arm_jtag_t *jtag_info; - if (arm720t_get_arch_pointers(target, &armv4_5, &arm7_9, &arm7tdmi, &arm720t) != ERROR_OK) - { - command_print(cmd_ctx, "current target isn't an ARM720t target"); - return ERROR_OK; - } + retval = arm720t_verify_pointer(cmd_ctx, arm720t); + if (retval != ERROR_OK) + return retval; - jtag_info = &arm7_9->jtag_info; + jtag_info = &arm720t->arm7tdmi_common.arm7_9_common.jtag_info; if (target->state != TARGET_HALTED) { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); + command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } /* one or more argument, access a single register (write if second argument is given */ if (argc >= 1) { - uint32_t opcode = strtoul(args[0], NULL, 0); + uint32_t opcode; + COMMAND_PARSE_NUMBER(u32, args[0], opcode); if (argc == 1) { @@ -547,7 +452,9 @@ int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch } else if (argc == 2) { - uint32_t value = strtoul(args[1], NULL, 0); + uint32_t value; + COMMAND_PARSE_NUMBER(u32, args[1], value); + if ((retval = arm720t_write_cp15(target, opcode, value)) != ERROR_OK) { command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode); @@ -560,80 +467,89 @@ int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch return ERROR_OK; } -int arm720t_handle_virt2phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc) +static int arm720t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) { - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; - arm7tdmi_common_t *arm7tdmi; - arm720t_common_t *arm720t; - arm_jtag_t *jtag_info; - - if (arm720t_get_arch_pointers(target, &armv4_5, &arm7_9, &arm7tdmi, &arm720t) != ERROR_OK) + if (cpnum!=15) { - command_print(cmd_ctx, "current target isn't an ARM720t target"); - return ERROR_OK; + LOG_ERROR("Only cp15 is supported"); + return ERROR_FAIL; } - jtag_info = &arm7_9->jtag_info; + return arm720t_read_cp15(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), value); - if (target->state != TARGET_HALTED) +} + +static int arm720t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) +{ + if (cpnum!=15) { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); - return ERROR_OK; + LOG_ERROR("Only cp15 is supported"); + return ERROR_FAIL; } - return armv4_5_mmu_handle_virt2phys_command(cmd_ctx, cmd, args, argc, target, &arm720t->armv4_5_mmu); + return arm720t_write_cp15(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), value); } -int arm720t_handle_md_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc) +static int arm720t_register_commands(struct command_context_s *cmd_ctx) { - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; - arm7tdmi_common_t *arm7tdmi; - arm720t_common_t *arm720t; - arm_jtag_t *jtag_info; + int retval; + command_t *arm720t_cmd; - if (arm720t_get_arch_pointers(target, &armv4_5, &arm7_9, &arm7tdmi, &arm720t) != ERROR_OK) - { - command_print(cmd_ctx, "current target isn't an ARM720t target"); - return ERROR_OK; - } - jtag_info = &arm7_9->jtag_info; + retval = arm7_9_register_commands(cmd_ctx); - if (target->state != TARGET_HALTED) - { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); - return ERROR_OK; - } + arm720t_cmd = register_command(cmd_ctx, NULL, "arm720t", + NULL, COMMAND_ANY, + "arm720t specific commands"); - return armv4_5_mmu_handle_md_phys_command(cmd_ctx, cmd, args, argc, target, &arm720t->armv4_5_mmu); + register_command(cmd_ctx, arm720t_cmd, "cp15", + arm720t_handle_cp15_command, COMMAND_EXEC, + "display/modify cp15 register [value]"); + + return ERROR_OK; } -int arm720t_handle_mw_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc) +/** Holds methods for ARM720 targets. */ +target_type_t arm720t_target = { - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; - arm7tdmi_common_t *arm7tdmi; - arm720t_common_t *arm720t; - arm_jtag_t *jtag_info; + .name = "arm720t", - if (arm720t_get_arch_pointers(target, &armv4_5, &arm7_9, &arm7tdmi, &arm720t) != ERROR_OK) - { - command_print(cmd_ctx, "current target isn't an ARM720t target"); - return ERROR_OK; - } + .poll = arm7_9_poll, + .arch_state = arm720t_arch_state, - jtag_info = &arm7_9->jtag_info; + .halt = arm7_9_halt, + .resume = arm7_9_resume, + .step = arm7_9_step, - if (target->state != TARGET_HALTED) - { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); - return ERROR_OK; - } + .assert_reset = arm7_9_assert_reset, + .deassert_reset = arm7_9_deassert_reset, + .soft_reset_halt = arm720t_soft_reset_halt, - return armv4_5_mmu_handle_mw_phys_command(cmd_ctx, cmd, args, argc, target, &arm720t->armv4_5_mmu); -} + .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + + .read_memory = arm720t_read_memory, + .write_memory = arm7_9_write_memory, + .read_phys_memory = arm720t_read_phys_memory, + .write_phys_memory = arm720t_write_phys_memory, + .mmu = arm720_mmu, + .virt2phys = arm720_virt2phys, + + .bulk_write_memory = arm7_9_bulk_write_memory, + .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, + + .run_algorithm = armv4_5_run_algorithm, + + .add_breakpoint = arm7_9_add_breakpoint, + .remove_breakpoint = arm7_9_remove_breakpoint, + .add_watchpoint = arm7_9_add_watchpoint, + .remove_watchpoint = arm7_9_remove_watchpoint, + + .register_commands = arm720t_register_commands, + .target_create = arm720t_target_create, + .init_target = arm720t_init_target, + .examine = arm7tdmi_examine, + .mrc = arm720t_mrc, + .mcr = arm720t_mcr, + +};