X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm11.h;h=faa93f586de72a3b21556f7278a6e0ad8c1dc814;hp=6e3b1d1536e304f4156fdadf1ab194cad0cc033f;hb=d3f0549f08d8aac36143bca9e7f7e1308383b7c2;hpb=4febcd8313cf46bea03bd5eacb3f287f19eb2961 diff --git a/src/target/arm11.h b/src/target/arm11.h index 6e3b1d1536..faa93f586d 100644 --- a/src/target/arm11.h +++ b/src/target/arm11.h @@ -24,16 +24,22 @@ #include "register.h" #include "embeddedice.h" #include "arm_jtag.h" +#include -#define bool int -#define true 1 -#define false 0 - #define asizeof(x) (sizeof(x) / sizeof((x)[0])) -#define NEW(type, variable, items) \ - type * variable = malloc(sizeof(type) * items) +#define NEW(type, variable, items) \ + type * variable = calloc(1, sizeof(type) * items) + + +/* For MinGW use 'I' prefix to print size_t (instead of 'z') */ + +#ifndef __MSVCRT__ +#define ZU "%zu" +#else +#define ZU "%Iu" +#endif #define ARM11_REGCACHE_MODEREGS 0 @@ -82,8 +88,9 @@ typedef struct arm11_common_s u32 last_dscr; /**< Last retrieved DSCR value; * Can be used to detect changes */ - u8 trst_active; - u8 halt_requested; + bool trst_active; + bool halt_requested; + bool simulate_reset_on_next_halt; /** \name Shadow registers to save processor state */ /*@{*/ @@ -186,7 +193,6 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre int arm11_assert_reset(struct target_s *target); int arm11_deassert_reset(struct target_s *target); int arm11_soft_reset_halt(struct target_s *target); -int arm11_prepare_reset_halt(struct target_s *target); /* target register access for gdb */ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], int *reg_list_size);