X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm11.c;h=b5edd8fc699c0c7747ebc7fa76f64db44dbd1829;hp=7cb24dfb982573bb3ccd354c92264a5f44d1a391;hb=dc575dc5bf8cb597a0e9a47794744ae6b1928087;hpb=d84bba66ae1cf395c4f0229b6708b7fd5f1bdad9

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 7cb24dfb98..b5edd8fc69 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -709,7 +709,7 @@ int arm11_arch_state(struct target_s *target)
 	arm11_common_t * arm11 = target->arch_info;
 
 	LOG_USER("target halted due to %s\ncpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "",
-			 Jim_Nvp_value2name_simple( nvp_target_debug_reason, target->debug_reason )->name,
+			 Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name,
 			 R(CPSR),
 			 R(PC));
 
@@ -732,7 +732,7 @@ int arm11_halt(struct target_s *target)
 	arm11_common_t * arm11 = target->arch_info;
 
 	LOG_DEBUG("target->state: %s",
-		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
+		Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
 
 	if (target->state == TARGET_UNKNOWN)
 	{
@@ -789,7 +789,7 @@ int arm11_resume(struct target_s *target, int current, uint32_t address, int han
 	arm11_common_t * arm11 = target->arch_info;
 
 	LOG_DEBUG("target->state: %s",
-		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
+		Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
 
 
 	if (target->state != TARGET_HALTED)
@@ -889,7 +889,7 @@ int arm11_step(struct target_s *target, int current, uint32_t address, int handl
 	FNC_INFO;
 
 	LOG_DEBUG("target->state: %s",
-		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
+		Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
 
 	if (target->state != TARGET_HALTED)
 	{
@@ -1035,7 +1035,7 @@ int arm11_deassert_reset(struct target_s *target)
 
 #if 0
 	LOG_DEBUG("target->state: %s",
-		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
+		Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
 
 
 	/* deassert reset lines */
@@ -1399,7 +1399,7 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
 		LOG_DEBUG("Save %zi: 0x%" PRIx32 "",i,context[i]);
 	}
 
-	cpsr = buf_get_u32((uint8_t*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
+	cpsr = buf_get_u32((uint8_t*)(arm11->reg_values + ARM11_RC_CPSR),0,32);
 	LOG_DEBUG("Save CPSR: 0x%" PRIx32 "", cpsr);
 
 	for (int i = 0; i < num_mem_params; i++)
@@ -1540,7 +1540,7 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp)
 
 	arm11->target = target;
 
-	if (target->tap==NULL)
+	if (target->tap == NULL)
 		return ERROR_FAIL;
 
 	if (target->tap->ir_length != 5)
@@ -1951,32 +1951,32 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
 
 	command_t * top_cmd = NULL;
 
-	RC_TOP(				"arm11",				"arm11 specific commands",
+	RC_TOP("arm11",				"arm11 specific commands",
 
-	RC_TOP(				"memwrite",				"Control memory write transfer mode",
+	RC_TOP("memwrite",				"Control memory write transfer mode",
 
-		RC_FINAL_BOOL(	"burst",				"Enable/Disable non-standard but fast burst mode (default: enabled)",
+		RC_FINAL_BOOL("burst",				"Enable/Disable non-standard but fast burst mode (default: enabled)",
 						memwrite_burst)
 
-		RC_FINAL_BOOL(	"error_fatal",			"Terminate program if transfer error was found (default: enabled)",
+		RC_FINAL_BOOL("error_fatal",			"Terminate program if transfer error was found (default: enabled)",
 						memwrite_error_fatal)
-	) /* memwrite */
+) /* memwrite */
 
-	RC_FINAL_BOOL(		"no_increment",			"Don't increment address on multi-read/-write (default: disabled)",
+	RC_FINAL_BOOL("no_increment",			"Don't increment address on multi-read/-write (default: disabled)",
 						memrw_no_increment)
 
-	RC_FINAL_BOOL(		"step_irq_enable",		"Enable interrupts while stepping (default: disabled)",
+	RC_FINAL_BOOL("step_irq_enable",		"Enable interrupts while stepping (default: disabled)",
 						step_irq_enable)
 
-	RC_FINAL(			"vcr",					"Control (Interrupt) Vector Catch Register",
+	RC_FINAL("vcr",					"Control (Interrupt) Vector Catch Register",
 						arm11_handle_vcr)
 
-	RC_FINAL(			"mrc",					"Read Coprocessor register",
+	RC_FINAL("mrc",					"Read Coprocessor register",
 						arm11_handle_mrc)
 
-	RC_FINAL(			"mcr",					"Write Coprocessor register",
+	RC_FINAL("mcr",					"Write Coprocessor register",
 						arm11_handle_mcr)
-	) /* arm11 */
+) /* arm11 */
 
 	return ERROR_OK;
 }