X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm11.c;h=6ced8f42173d7f09465087d925bbb6235fc49b34;hp=7cb24dfb982573bb3ccd354c92264a5f44d1a391;hb=398f60af563ac03b7a63a7a8ba4dfd335156ef1e;hpb=d84bba66ae1cf395c4f0229b6708b7fd5f1bdad9

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 7cb24dfb98..6ced8f4217 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -709,7 +709,7 @@ int arm11_arch_state(struct target_s *target)
 	arm11_common_t * arm11 = target->arch_info;
 
 	LOG_USER("target halted due to %s\ncpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "",
-			 Jim_Nvp_value2name_simple( nvp_target_debug_reason, target->debug_reason )->name,
+			 Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name,
 			 R(CPSR),
 			 R(PC));
 
@@ -732,7 +732,7 @@ int arm11_halt(struct target_s *target)
 	arm11_common_t * arm11 = target->arch_info;
 
 	LOG_DEBUG("target->state: %s",
-		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
+		target_state_name(target));
 
 	if (target->state == TARGET_UNKNOWN)
 	{
@@ -789,7 +789,7 @@ int arm11_resume(struct target_s *target, int current, uint32_t address, int han
 	arm11_common_t * arm11 = target->arch_info;
 
 	LOG_DEBUG("target->state: %s",
-		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
+		target_state_name(target));
 
 
 	if (target->state != TARGET_HALTED)
@@ -889,7 +889,7 @@ int arm11_step(struct target_s *target, int current, uint32_t address, int handl
 	FNC_INFO;
 
 	LOG_DEBUG("target->state: %s",
-		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
+		target_state_name(target));
 
 	if (target->state != TARGET_HALTED)
 	{
@@ -1035,7 +1035,7 @@ int arm11_deassert_reset(struct target_s *target)
 
 #if 0
 	LOG_DEBUG("target->state: %s",
-		Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name );
+		target_state_name(target));
 
 
 	/* deassert reset lines */
@@ -1149,7 +1149,7 @@ int arm11_read_memory(struct target_s *target, uint32_t address, uint32_t size,
 				arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
 
 				uint16_t svalue = res;
-				memcpy(buffer + count * sizeof(uint16_t), &svalue, sizeof(uint16_t));
+				memcpy(buffer + i * sizeof(uint16_t), &svalue, sizeof(uint16_t));
 			}
 
 			break;
@@ -1219,7 +1219,7 @@ int arm11_write_memory(struct target_s *target, uint32_t address, uint32_t size,
 			for (size_t i = 0; i < count; i++)
 			{
 				uint16_t value;
-				memcpy(&value, buffer + count * sizeof(uint16_t), sizeof(uint16_t));
+				memcpy(&value, buffer + i * sizeof(uint16_t), sizeof(uint16_t));
 
 				/* MRC p14,0,r1,c0,c5,0 */
 				arm11_run_instr_data_to_core1(arm11, 0xee101e15, value);
@@ -1399,7 +1399,7 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
 		LOG_DEBUG("Save %zi: 0x%" PRIx32 "",i,context[i]);
 	}
 
-	cpsr = buf_get_u32((uint8_t*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
+	cpsr = buf_get_u32((uint8_t*)(arm11->reg_values + ARM11_RC_CPSR),0,32);
 	LOG_DEBUG("Save CPSR: 0x%" PRIx32 "", cpsr);
 
 	for (int i = 0; i < num_mem_params; i++)
@@ -1540,7 +1540,7 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp)
 
 	arm11->target = target;
 
-	if (target->tap==NULL)
+	if (target->tap == NULL)
 		return ERROR_FAIL;
 
 	if (target->tap->ir_length != 5)
@@ -1888,7 +1888,7 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
 		if (values[i] > arm11_coproc_instruction_limits[i])
 		{
 			LOG_ERROR("Parameter %ld out of bounds (%" PRId32 " max). %s",
-				  (long)(i + 2), 
+				  (long)(i + 2),
 				  arm11_coproc_instruction_limits[i],
 				read ? arm11_mrc_syntax : arm11_mcr_syntax);
 			return -1;
@@ -1913,10 +1913,10 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
 		arm11_run_instr_data_from_core_via_r0(arm11, instr, &result);
 
 		LOG_INFO("MRC p%d, %d, R0, c%d, c%d, %d = 0x%08" PRIx32 " (%" PRId32 ")",
-			 (int)(values[0]), 
-			 (int)(values[1]), 
-			 (int)(values[2]), 
-			 (int)(values[3]), 
+			 (int)(values[0]),
+			 (int)(values[1]),
+			 (int)(values[2]),
+			 (int)(values[3]),
 			 (int)(values[4]), result, result);
 	}
 	else
@@ -1951,32 +1951,32 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
 
 	command_t * top_cmd = NULL;
 
-	RC_TOP(				"arm11",				"arm11 specific commands",
+	RC_TOP("arm11",				"arm11 specific commands",
 
-	RC_TOP(				"memwrite",				"Control memory write transfer mode",
+	RC_TOP("memwrite",				"Control memory write transfer mode",
 
-		RC_FINAL_BOOL(	"burst",				"Enable/Disable non-standard but fast burst mode (default: enabled)",
+		RC_FINAL_BOOL("burst",				"Enable/Disable non-standard but fast burst mode (default: enabled)",
 						memwrite_burst)
 
-		RC_FINAL_BOOL(	"error_fatal",			"Terminate program if transfer error was found (default: enabled)",
+		RC_FINAL_BOOL("error_fatal",			"Terminate program if transfer error was found (default: enabled)",
 						memwrite_error_fatal)
-	) /* memwrite */
+) /* memwrite */
 
-	RC_FINAL_BOOL(		"no_increment",			"Don't increment address on multi-read/-write (default: disabled)",
+	RC_FINAL_BOOL("no_increment",			"Don't increment address on multi-read/-write (default: disabled)",
 						memrw_no_increment)
 
-	RC_FINAL_BOOL(		"step_irq_enable",		"Enable interrupts while stepping (default: disabled)",
+	RC_FINAL_BOOL("step_irq_enable",		"Enable interrupts while stepping (default: disabled)",
 						step_irq_enable)
 
-	RC_FINAL(			"vcr",					"Control (Interrupt) Vector Catch Register",
+	RC_FINAL("vcr",					"Control (Interrupt) Vector Catch Register",
 						arm11_handle_vcr)
 
-	RC_FINAL(			"mrc",					"Read Coprocessor register",
+	RC_FINAL("mrc",					"Read Coprocessor register",
 						arm11_handle_mrc)
 
-	RC_FINAL(			"mcr",					"Write Coprocessor register",
+	RC_FINAL("mcr",					"Write Coprocessor register",
 						arm11_handle_mcr)
-	) /* arm11 */
+) /* arm11 */
 
 	return ERROR_OK;
 }