X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fadi_v5_jtag.c;h=62eb7d12ffed0155d9db3cc3d7762159fad913db;hp=41443ff2fe5b4d898a6309f95369bc7e24d909bc;hb=962b3eb40cc5b69d9b3d6fcc4c5d56c4d204a307;hpb=c09035ea2cb24dee300476a3502919d23d90d1f5 diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c index 41443ff2fe..62eb7d12ff 100644 --- a/src/target/adi_v5_jtag.c +++ b/src/target/adi_v5_jtag.c @@ -23,7 +23,7 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the * Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. ***************************************************************************/ /** @@ -40,7 +40,6 @@ #include "arm_adi_v5.h" #include - /* JTAG instructions/registers for JTAG-DP and SWJ-DP */ #define JTAG_DP_ABORT 0x8 #define JTAG_DP_DPACC 0xA @@ -51,6 +50,8 @@ #define JTAG_ACK_OK_FAULT 0x2 #define JTAG_ACK_WAIT 0x1 +static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack); + /*************************************************************************** * * DPACC and APACC scanchain access through JTAG-DP (or SWJ-DP) @@ -66,7 +67,7 @@ * will be needed to collect the data which was read; the "invalue" collects * the posted result of a preceding operation, not the current one. * - * @param swjdp the DAP + * @param dap the DAP * @param instr JTAG_DP_APACC (AP access) or JTAG_DP_DPACC (DP access) * @param reg_addr two significant bits; A[3:2]; for APACC access, the * SELECT register has more addressing bits. @@ -76,19 +77,18 @@ * @param ack points to where the three bit JTAG_ACK_* code will be stored */ -/* FIXME don't export ... this is a temporary workaround for the - * mem_ap_read_buf_u32() mess, until it's no longer JTAG-specific. - */ -int adi_jtag_dp_scan(struct adiv5_dap *swjdp, +static int adi_jtag_dp_scan(struct adiv5_dap *dap, uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint8_t *outvalue, uint8_t *invalue, uint8_t *ack) { - struct arm_jtag *jtag_info = swjdp->jtag_info; + struct arm_jtag *jtag_info = dap->jtag_info; struct scan_field fields[2]; uint8_t out_addr_buf; + int retval; - jtag_set_end_state(TAP_IDLE); - arm_jtag_set_instr(jtag_info, instr, NULL, TAP_IDLE); + retval = arm_jtag_set_instr(jtag_info, instr, NULL, TAP_IDLE); + if (retval != ERROR_OK) + return retval; /* Scan out a read or write operation using some DP or AP register. * For APACC access with any sticky error flag set, this is discarded. @@ -117,11 +117,11 @@ int adi_jtag_dp_scan(struct adiv5_dap *swjdp, if ((instr == JTAG_DP_APACC) && ((reg_addr == AP_REG_DRW) || ((reg_addr & 0xF0) == AP_REG_BD0)) - && (swjdp->memaccess_tck != 0)) - jtag_add_runtest(swjdp->memaccess_tck, + && (dap->memaccess_tck != 0)) + jtag_add_runtest(dap->memaccess_tck, TAP_IDLE); - return jtag_get_error(); + return ERROR_OK; } /** @@ -130,7 +130,7 @@ int adi_jtag_dp_scan(struct adiv5_dap *swjdp, * conversions are performed (so the types of invalue and outvalue * must be different). */ -static int adi_jtag_dp_scan_u32(struct adiv5_dap *swjdp, +static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap, uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint32_t outvalue, uint32_t *invalue, uint8_t *ack) { @@ -139,7 +139,7 @@ static int adi_jtag_dp_scan_u32(struct adiv5_dap *swjdp, buf_set_u32(out_value_buf, 0, 32, outvalue); - retval = adi_jtag_dp_scan(swjdp, instr, reg_addr, RnW, + retval = adi_jtag_dp_scan(dap, instr, reg_addr, RnW, out_value_buf, (uint8_t *)invalue, ack); if (retval != ERROR_OK) return retval; @@ -161,14 +161,14 @@ static inline int adi_jtag_ap_write_check(struct adiv5_dap *dap, outvalue, NULL, NULL); } -static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *swjdp, +static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *dap, uint8_t instr, uint8_t reg_addr, uint8_t RnW, uint32_t outvalue, uint32_t *invalue) { int retval; /* Issue the read or write */ - retval = adi_jtag_dp_scan_u32(swjdp, instr, reg_addr, + retval = adi_jtag_dp_scan_u32(dap, instr, reg_addr, RnW, outvalue, NULL, NULL); if (retval != ERROR_OK) return retval; @@ -177,106 +177,118 @@ static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *swjdp, * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK". */ if ((RnW == DPAP_READ) && (invalue != NULL)) - retval = adi_jtag_dp_scan_u32(swjdp, JTAG_DP_DPACC, - DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack); + retval = adi_jtag_dp_scan_u32(dap, JTAG_DP_DPACC, + DP_RDBUFF, DPAP_READ, 0, invalue, &dap->ack); return retval; } -static int jtagdp_transaction_endcheck(struct adiv5_dap *swjdp) +static int jtagdp_transaction_endcheck(struct adiv5_dap *dap) { int retval; uint32_t ctrlstat; /* too expensive to call keep_alive() here */ -#if 0 - /* Danger!!!! BROKEN!!!! */ - adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC, - DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - /* Danger!!!! BROKEN!!!! Why will jtag_execute_queue() fail here???? - R956 introduced the check on return value here and now Michael Schwingen reports - that this code no longer works.... - - https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html - */ - if ((retval = jtag_execute_queue()) != ERROR_OK) - { - LOG_ERROR("BUG: Why does this fail the first time????"); - } - /* Why??? second time it works??? */ -#endif + /* Here be dragons! + * + * It is easy to be in a JTAG clock range where the target + * is not operating in a stable fashion. This happens + * for a few reasons: + * + * - the user may construct a simple test case to try to see + * if a higher JTAG clock works to eke out more performance. + * This simple case may pass, but more complex situations can + * fail. + * + * - The mostly works JTAG clock rate and the complete failure + * JTAG clock rate may be as much as 2-4x apart. This seems + * to be especially true on RC oscillator driven parts. + * + * So: even if calling adi_jtag_scan_inout_check_u32() multiple + * times here seems to "make things better here", it is just + * hiding problems with too high a JTAG clock. + * + * Note that even if some parts have RCLK/RTCK, that doesn't + * mean that RCLK/RTCK is the *correct* rate to run the JTAG + * interface at, i.e. RCLK/RTCK rates can be "too high", especially + * before the RC oscillator phase is not yet complete. + */ /* Post CTRL/STAT read; discard any previous posted read value * but collect its ACK status. */ - adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC, + retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - if ((retval = jtag_execute_queue()) != ERROR_OK) + if (retval != ERROR_OK) + return retval; + retval = jtag_execute_queue(); + if (retval != ERROR_OK) return retval; - swjdp->ack = swjdp->ack & 0x7; + dap->ack = dap->ack & 0x7; /* common code path avoids calling timeval_ms() */ - if (swjdp->ack != JTAG_ACK_OK_FAULT) - { + if (dap->ack != JTAG_ACK_OK_FAULT) { long long then = timeval_ms(); - while (swjdp->ack != JTAG_ACK_OK_FAULT) - { - if (swjdp->ack == JTAG_ACK_WAIT) - { - if ((timeval_ms()-then) > 1000) - { - /* NOTE: this would be a good spot - * to use JTAG_DP_ABORT. - */ + while (dap->ack != JTAG_ACK_OK_FAULT) { + if (dap->ack == JTAG_ACK_WAIT) { + if ((timeval_ms()-then) > 1000) { LOG_WARNING("Timeout (1000ms) waiting " "for ACK=OK/FAULT " - "in JTAG-DP transaction"); + "in JTAG-DP transaction - aborting"); + + uint8_t ack; + int abort_ret = jtag_ap_q_abort(dap, &ack); + + if (abort_ret != 0) + LOG_WARNING("Abort failed : return=%d ack=%d", abort_ret, ack); + return ERROR_JTAG_DEVICE_ERROR; } - } - else - { + } else { LOG_WARNING("Invalid ACK %#x " "in JTAG-DP transaction", - swjdp->ack); + dap->ack); return ERROR_JTAG_DEVICE_ERROR; } - adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC, + retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - if ((retval = dap_run(swjdp)) != ERROR_OK) + if (retval != ERROR_OK) + return retval; + retval = jtag_execute_queue(); + if (retval != ERROR_OK) return retval; - swjdp->ack = swjdp->ack & 0x7; + dap->ack = dap->ack & 0x7; } } /* REVISIT also STICKYCMP, for pushed comparisons (nyet used) */ /* Check for STICKYERR and STICKYORUN */ - if (ctrlstat & (SSTICKYORUN | SSTICKYERR)) - { + if (ctrlstat & (SSTICKYORUN | SSTICKYERR)) { LOG_DEBUG("jtag-dp: CTRL/STAT error, 0x%" PRIx32, ctrlstat); /* Check power to debug regions */ - if ((ctrlstat & 0xf0000000) != 0xf0000000) - ahbap_debugport_init(swjdp); - else - { + if ((ctrlstat & 0xf0000000) != 0xf0000000) { + retval = ahbap_debugport_init(dap); + if (retval != ERROR_OK) + return retval; + } else { uint32_t mem_ap_csw, mem_ap_tar; /* Maybe print information about last intended * MEM-AP access; but not if autoincrementing. * *Real* CSW and TAR values are always shown. */ - if (swjdp->ap_tar_value != (uint32_t) -1) + if (dap->ap_tar_value != (uint32_t) -1) LOG_DEBUG("MEM-AP Cached values: " "ap_bank 0x%" PRIx32 ", ap_csw 0x%" PRIx32 ", ap_tar 0x%" PRIx32, - swjdp->ap_bank_value, - swjdp->ap_csw_value, - swjdp->ap_tar_value); + dap->ap_bank_value, + dap->ap_csw_value, + dap->ap_tar_value); if (ctrlstat & SSTICKYORUN) LOG_ERROR("JTAG-DP OVERRUN - check clock, " @@ -286,34 +298,41 @@ static int jtagdp_transaction_endcheck(struct adiv5_dap *swjdp) LOG_ERROR("JTAG-DP STICKY ERROR"); /* Clear Sticky Error Bits */ - adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC, + retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC, DP_CTRL_STAT, DPAP_WRITE, - swjdp->dp_ctrl_stat | SSTICKYORUN + dap->dp_ctrl_stat | SSTICKYORUN | SSTICKYERR, NULL); - adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC, + if (retval != ERROR_OK) + return retval; + retval = adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - if ((retval = dap_run(swjdp)) != ERROR_OK) + if (retval != ERROR_OK) + return retval; + retval = jtag_execute_queue(); + if (retval != ERROR_OK) return retval; LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat); - retval = dap_queue_ap_read(swjdp, + retval = dap_queue_ap_read(dap, AP_REG_CSW, &mem_ap_csw); if (retval != ERROR_OK) return retval; - retval = dap_queue_ap_read(swjdp, + retval = dap_queue_ap_read(dap, AP_REG_TAR, &mem_ap_tar); if (retval != ERROR_OK) return retval; - if ((retval = dap_run(swjdp)) != ERROR_OK) + retval = jtag_execute_queue(); + if (retval != ERROR_OK) return retval; LOG_ERROR("MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%" PRIx32, mem_ap_csw, mem_ap_tar); } - if ((retval = dap_run(swjdp)) != ERROR_OK) + retval = jtag_execute_queue(); + if (retval != ERROR_OK) return retval; return ERROR_JTAG_DEVICE_ERROR; } @@ -331,7 +350,6 @@ static int jtag_idcode_q_read(struct adiv5_dap *dap, struct scan_field fields[1]; /* This is a standard JTAG operation -- no DAP tweakage */ - jtag_set_end_state(TAP_IDLE); retval = arm_jtag_set_instr(jtag_info, JTAG_DP_IDCODE, NULL, TAP_IDLE); if (retval != ERROR_OK) return retval; @@ -341,14 +359,11 @@ static int jtag_idcode_q_read(struct adiv5_dap *dap, fields[0].in_value = (void *) data; jtag_add_dr_scan(jtag_info->tap, 1, fields, TAP_IDLE); - retval = jtag_get_error(); - if (retval != ERROR_OK) - return retval; jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t) data); - return retval; + return ERROR_OK; } static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg, @@ -368,15 +383,15 @@ static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg, /** Select the AP register bank matching bits 7:4 of reg. */ static int jtag_ap_q_bankselect(struct adiv5_dap *dap, unsigned reg) { - uint32_t select = reg & 0x000000F0; + uint32_t select_ap_bank = reg & 0x000000F0; - if (select == dap->ap_bank_value) + if (select_ap_bank == dap->ap_bank_value) return ERROR_OK; - dap->ap_bank_value = select; + dap->ap_bank_value = select_ap_bank; - select |= dap->apsel; + select_ap_bank |= dap->ap_current; - return jtag_dp_q_write(dap, DP_SELECT, select); + return jtag_dp_q_write(dap, DP_SELECT, select_ap_bank); } static int jtag_ap_q_read(struct adiv5_dap *dap, unsigned reg, @@ -405,6 +420,40 @@ static int jtag_ap_q_write(struct adiv5_dap *dap, unsigned reg, return adi_jtag_ap_write_check(dap, reg, out_value_buf); } +static int jtag_ap_q_read_block(struct adiv5_dap *dap, unsigned reg, + uint32_t blocksize, uint8_t *buffer) +{ + uint32_t readcount; + int retval = ERROR_OK; + + /* Scan out first read */ + retval = adi_jtag_dp_scan(dap, JTAG_DP_APACC, reg, + DPAP_READ, 0, NULL, NULL); + if (retval != ERROR_OK) + return retval; + + for (readcount = 0; readcount < blocksize - 1; readcount++) { + /* Scan out next read; scan in posted value for the + * previous one. Assumes read is acked "OK/FAULT", + * and CTRL_STAT says that meant "OK". + */ + retval = adi_jtag_dp_scan(dap, JTAG_DP_APACC, reg, + DPAP_READ, 0, buffer + 4 * readcount, + &dap->ack); + if (retval != ERROR_OK) + return retval; + } + + /* Scan in last posted value; RDBUFF has no other effect, + * assuming ack is OK/FAULT and CTRL_STAT says "OK". + */ + retval = adi_jtag_dp_scan(dap, JTAG_DP_DPACC, DP_RDBUFF, + DPAP_READ, 0, buffer + 4 * readcount, + &dap->ack); + + return retval; +} + static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack) { /* for JTAG, this is the only valid ABORT register operation */ @@ -421,17 +470,18 @@ static int jtag_dp_run(struct adiv5_dap *dap) * part of DAP setup */ const struct dap_ops jtag_dp_ops = { - .queue_idcode_read = jtag_idcode_q_read, - .queue_dp_read = jtag_dp_q_read, - .queue_dp_write = jtag_dp_q_write, - .queue_ap_read = jtag_ap_q_read, - .queue_ap_write = jtag_ap_q_write, - .queue_ap_abort = jtag_ap_q_abort, - .run = jtag_dp_run, + .queue_idcode_read = jtag_idcode_q_read, + .queue_dp_read = jtag_dp_q_read, + .queue_dp_write = jtag_dp_q_write, + .queue_ap_read = jtag_ap_q_read, + .queue_ap_write = jtag_ap_q_write, + .queue_ap_read_block = jtag_ap_q_read_block, + .queue_ap_abort = jtag_ap_q_abort, + .run = jtag_dp_run, }; -const uint8_t swd2jtag_bitseq[] = { +static const uint8_t swd2jtag_bitseq[] = { /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high, * putting both JTAG and SWD logic into reset state. */