X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fstr9x.c;h=bd823820769e49917142735c9919d11b7b24e852;hp=66b27036d35456ba734b0ad2e4b79ed980b65948;hb=d47e1b8f362379d8a2307f49e2b42115a3f40524;hpb=20e4e77cdf366dedac21ff5670c54291feadfc05 diff --git a/src/flash/str9x.c b/src/flash/str9x.c index 66b27036d3..bd82382076 100644 --- a/src/flash/str9x.c +++ b/src/flash/str9x.c @@ -28,6 +28,7 @@ #include "target.h" #include "log.h" #include "armv4_5.h" +#include "arm966e.h" #include "algorithm.h" #include "binarybuffer.h" @@ -35,7 +36,7 @@ #include #include -str9x_mem_layout_t mem_layout_str9[] = { +str9x_mem_layout_t mem_layout_str9bank0[] = { {0x00000000, 0x10000, 0x01}, {0x00010000, 0x10000, 0x02}, {0x00020000, 0x10000, 0x04}, @@ -44,12 +45,17 @@ str9x_mem_layout_t mem_layout_str9[] = { {0x00050000, 0x10000, 0x20}, {0x00060000, 0x10000, 0x40}, {0x00070000, 0x10000, 0x80}, - {0x00080000, 0x02000, 0x100}, - {0x00082000, 0x02000, 0x200}, - {0x00084000, 0x02000, 0x400}, - {0x00086000, 0x02000, 0x800} }; +str9x_mem_layout_t mem_layout_str9bank1[] = { + {0x00000000, 0x02000, 0x100}, + {0x00002000, 0x02000, 0x200}, + {0x00004000, 0x02000, 0x400}, + {0x00006000, 0x02000, 0x800} +}; + +static u32 bank1start = 0x00080000; + int str9x_register_commands(struct command_context_s *cmd_ctx); int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); int str9x_erase(struct flash_bank_s *bank, int first, int last); @@ -72,6 +78,7 @@ flash_driver_t str9x_flash = .protect = str9x_protect, .write = str9x_write, .probe = str9x_probe, + .auto_probe = str9x_probe, .erase_check = str9x_erase_check, .protect_check = str9x_protect_check, .info = str9x_info @@ -92,22 +99,27 @@ int str9x_build_block_list(struct flash_bank_s *bank) str9x_flash_bank_t *str9x_info = bank->driver_priv; int i; - int num_sectors = 0, b0_sectors = 0; + int num_sectors = 0; + int b0_sectors = 0, b1_sectors = 0; switch (bank->size) { - case 256 * 1024: + case (256 * 1024): b0_sectors = 4; break; - case 512 * 1024: + case (512 * 1024): b0_sectors = 8; break; + case (32 * 1024): + b1_sectors = 4; + bank1start = bank->base; + break; default: - ERROR("BUG: unknown bank->size encountered"); + LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); } - - num_sectors = b0_sectors + 4; + + num_sectors = b0_sectors + b1_sectors; bank->num_sectors = num_sectors; bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors); @@ -117,20 +129,20 @@ int str9x_build_block_list(struct flash_bank_s *bank) for (i = 0; i < b0_sectors; i++) { - bank->sectors[num_sectors].offset = mem_layout_str9[i].sector_start; - bank->sectors[num_sectors].size = mem_layout_str9[i].sector_size; + bank->sectors[num_sectors].offset = mem_layout_str9bank0[i].sector_start; + bank->sectors[num_sectors].size = mem_layout_str9bank0[i].sector_size; bank->sectors[num_sectors].is_erased = -1; bank->sectors[num_sectors].is_protected = 1; - str9x_info->sector_bits[num_sectors++] = mem_layout_str9[i].sector_bit; + str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank0[i].sector_bit; } - - for (i = 8; i < 12; i++) + + for (i = 0; i < b1_sectors; i++) { - bank->sectors[num_sectors].offset = mem_layout_str9[i].sector_start; - bank->sectors[num_sectors].size = mem_layout_str9[i].sector_size; + bank->sectors[num_sectors].offset = mem_layout_str9bank1[i].sector_start; + bank->sectors[num_sectors].size = mem_layout_str9bank1[i].sector_size; bank->sectors[num_sectors].is_erased = -1; bank->sectors[num_sectors].is_protected = 1; - str9x_info->sector_bits[num_sectors++] = mem_layout_str9[i].sector_bit; + str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank1[i].sector_bit; } return ERROR_OK; @@ -144,19 +156,13 @@ int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char if (argc < 6) { - WARNING("incomplete flash_bank str9x configuration"); + LOG_WARNING("incomplete flash_bank str9x configuration"); return ERROR_FLASH_BANK_INVALID; } str9x_info = malloc(sizeof(str9x_flash_bank_t)); bank->driver_priv = str9x_info; - if (bank->base != 0x00000000) - { - WARNING("overriding flash base address for STR91x device with 0x00000000"); - bank->base = 0x00000000; - } - str9x_build_block_list(bank); str9x_info->write_algorithm = NULL; @@ -218,11 +224,11 @@ int str9x_protect_check(struct flash_bank_s *bank) /* read level one protection */ - adr = mem_layout_str9[10].sector_start + 4; + adr = bank1start + 0x10; - target_write_u32(target, adr, 0x90); + target_write_u16(target, adr, 0x90); target_read_u16(target, adr, &status); - target_write_u32(target, adr, 0xFF); + target_write_u16(target, adr, 0xFF); for (i = 0; i < bank->num_sectors; i++) { @@ -246,12 +252,12 @@ int str9x_erase(struct flash_bank_s *bank, int first, int last) { return ERROR_TARGET_NOT_HALTED; } - + for (i = first; i <= last; i++) { - adr = bank->sectors[i].offset; + adr = bank->base + bank->sectors[i].offset; - /* erase sectors */ + /* erase sectors */ target_write_u16(target, adr, 0x20); target_write_u16(target, adr, 0xD0); @@ -273,7 +279,7 @@ int str9x_erase(struct flash_bank_s *bank, int first, int last) if( status & 0x22 ) { - ERROR("error erasing flash bank, status: 0x%x", status); + LOG_ERROR("error erasing flash bank, status: 0x%x", status); return ERROR_FLASH_OPERATION_FAILED; } } @@ -300,7 +306,7 @@ int str9x_protect(struct flash_bank_s *bank, int set, int first, int last) { /* Level One Protection */ - adr = bank->sectors[i].offset; + adr = bank->base + bank->sectors[i].offset; target_write_u16(target, adr, 0x60); if( set ) @@ -351,24 +357,14 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou 0xeafffffe, /* b exit */ }; - u8 str9x_flash_write_code_buf[76]; - int i; - /* flash write code */ - if (!str9x_info->write_algorithm) + if (target_alloc_working_area(target, 4 * 19, &str9x_info->write_algorithm) != ERROR_OK) { - if (target_alloc_working_area(target, 4 * 19, &str9x_info->write_algorithm) != ERROR_OK) - { - WARNING("no working area available, can't do block memory writes"); - return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; - }; - - /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < 19; i++) - target_buffer_set_u32(target, str9x_flash_write_code_buf + i*4, str9x_flash_write_code[i]); - - target_write_buffer(target, str9x_info->write_algorithm->address, 19 * 4, str9x_flash_write_code_buf); - } + LOG_WARNING("no working area available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + }; + + target_write_buffer(target, str9x_info->write_algorithm->address, 19 * 4, (u8*)str9x_flash_write_code); /* memory buffer */ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) @@ -380,10 +376,10 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou if (str9x_info->write_algorithm) target_free_working_area(target, str9x_info->write_algorithm); - WARNING("no large enough working area available, can't do block memory writes"); + LOG_WARNING("no large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - }; + } armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.core_mode = ARMV4_5_MODE_SVC; @@ -406,7 +402,9 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou if ((retval = target->type->run_algorithm(target, 0, NULL, 4, reg_params, str9x_info->write_algorithm->address, str9x_info->write_algorithm->address + (18 * 4), 10000, &armv4_5_info)) != ERROR_OK) { - ERROR("error executing str9x flash write algorithm"); + target_free_working_area(target, source); + target_free_working_area(target, str9x_info->write_algorithm); + LOG_ERROR("error executing str9x flash write algorithm"); return ERROR_FLASH_OPERATION_FAILED; } @@ -420,6 +418,9 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou count -= thisrun_count; } + target_free_working_area(target, source); + target_free_working_area(target, str9x_info->write_algorithm); + destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); destroy_reg_param(®_params[2]); @@ -445,10 +446,10 @@ int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { return ERROR_TARGET_NOT_HALTED; } - + if (offset & 0x1) { - WARNING("offset 0x%x breaks required 2-byte alignment", offset); + LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -481,11 +482,11 @@ int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { /* if block write failed (no sufficient working area), * we use normal (slow) single dword accesses */ - WARNING("couldn't use block writes, falling back to single memory accesses"); + LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); } else if (retval == ERROR_FLASH_OPERATION_FAILED) { - ERROR("flash writing failed with error code: 0x%x", retval); + LOG_ERROR("flash writing failed with error code: 0x%x", retval); return ERROR_FLASH_OPERATION_FAILED; } } @@ -597,14 +598,20 @@ int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *c flash_bank_t *bank; target_t *target = NULL; - if (argc < 4) + if (argc < 5) { - command_print(cmd_ctx, "usage: str9x flash_config "); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); + if (!bank) + { + command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); return ERROR_OK; } - bank = get_flash_bank_by_num(0); str9x_info = bank->driver_priv; + target = bank->target; if (bank->target->state != TARGET_HALTED) @@ -613,12 +620,15 @@ int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *c } /* config flash controller */ - target_write_u32(target, FLASH_BBSR, strtoul(args[0], NULL, 0)); - target_write_u32(target, FLASH_NBBSR, strtoul(args[1], NULL, 0)); - target_write_u32(target, FLASH_BBADR, (strtoul(args[2], NULL, 0) >> 2)); - target_write_u32(target, FLASH_NBBADR, (strtoul(args[3], NULL, 0) >> 2)); + target_write_u32(target, FLASH_BBSR, strtoul(args[1], NULL, 0)); + target_write_u32(target, FLASH_NBBSR, strtoul(args[2], NULL, 0)); + target_write_u32(target, FLASH_BBADR, (strtoul(args[3], NULL, 0) >> 2)); + target_write_u32(target, FLASH_NBBADR, (strtoul(args[4], NULL, 0) >> 2)); + /* set bit 18 instruction TCM order as per flash programming manual */ + arm966e_write_cp15(target, 62, 0x40000); + /* enable flash bank 1 */ - target_write_u32(target, FLASH_CR, 0x18); + target_write_u32(target, FLASH_CR, 0x18); return ERROR_OK; }