X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fstr7x.c;h=0e35bcc96ec00dff27b192f96dfeea9b7ff29444;hp=62acba38744bba69f9b80428af79d5573e981c64;hb=040e25424314b49e35eb158eb88e287c76e50596;hpb=a582e9a8d183c56d1aa8ae18afc1c11e2cbd6d2d diff --git a/src/flash/str7x.c b/src/flash/str7x.c index 62acba3874..0e35bcc96e 100644 --- a/src/flash/str7x.c +++ b/src/flash/str7x.c @@ -35,7 +35,7 @@ #include #include -str7x_mem_layout_t mem_layout[] = { +str7x_mem_layout_t mem_layout_str7bank0[] = { {0x00000000, 0x02000, 0x01}, {0x00002000, 0x02000, 0x02}, {0x00004000, 0x02000, 0x04}, @@ -43,9 +43,12 @@ str7x_mem_layout_t mem_layout[] = { {0x00008000, 0x08000, 0x10}, {0x00010000, 0x10000, 0x20}, {0x00020000, 0x10000, 0x40}, - {0x00030000, 0x10000, 0x80}, - {0x000C0000, 0x02000, 0x10000}, - {0x000C2000, 0x02000, 0x20000}, + {0x00030000, 0x10000, 0x80} +}; + +str7x_mem_layout_t mem_layout_str7bank1[] = { + {0x00000000, 0x02000, 0x10000}, + {0x00002000, 0x02000, 0x20000} }; int str7x_register_commands(struct command_context_s *cmd_ctx); @@ -56,9 +59,10 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); int str7x_probe(struct flash_bank_s *bank); int str7x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); int str7x_protect_check(struct flash_bank_s *bank); -int str7x_erase_check(struct flash_bank_s *bank); int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size); +int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); + flash_driver_t str7x_flash = { .name = "str7x", @@ -68,20 +72,26 @@ flash_driver_t str7x_flash = .protect = str7x_protect, .write = str7x_write, .probe = str7x_probe, - .erase_check = str7x_erase_check, + .auto_probe = str7x_probe, + .erase_check = default_flash_blank_check, .protect_check = str7x_protect_check, .info = str7x_info }; int str7x_register_commands(struct command_context_s *cmd_ctx) { - + command_t *str7x_cmd = register_command(cmd_ctx, NULL, "str7x", NULL, COMMAND_ANY, NULL); + + register_command(cmd_ctx, str7x_cmd, "disable_jtag", str7x_handle_disable_jtag_command, COMMAND_EXEC, + "disable jtag access"); + return ERROR_OK; } int str7x_get_flash_adr(struct flash_bank_s *bank, u32 reg) { - return (bank->base | reg); + str7x_flash_bank_t *str7x_info = bank->driver_priv; + return (str7x_info->register_base | reg); } int str7x_build_block_list(struct flash_bank_s *bank) @@ -89,12 +99,13 @@ int str7x_build_block_list(struct flash_bank_s *bank) str7x_flash_bank_t *str7x_info = bank->driver_priv; int i; - int num_sectors = 0, b0_sectors = 0, b1_sectors = 0; + int num_sectors; + int b0_sectors = 0, b1_sectors = 0; switch (bank->size) { case 16 * 1024: - b0_sectors = 2; + b1_sectors = 2; break; case 64 * 1024: b0_sectors = 5; @@ -106,51 +117,40 @@ int str7x_build_block_list(struct flash_bank_s *bank) b0_sectors = 8; break; default: - ERROR("BUG: unknown bank->size encountered"); + LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); } - - if( str7x_info->bank1 == 1 ) - { - b1_sectors += 2; - } - + num_sectors = b0_sectors + b1_sectors; bank->num_sectors = num_sectors; bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors); str7x_info->sector_bits = malloc(sizeof(u32) * num_sectors); - str7x_info->sector_bank = malloc(sizeof(u32) * num_sectors); num_sectors = 0; for (i = 0; i < b0_sectors; i++) { - bank->sectors[num_sectors].offset = mem_layout[i].sector_start; - bank->sectors[num_sectors].size = mem_layout[i].sector_size; + bank->sectors[num_sectors].offset = mem_layout_str7bank0[i].sector_start; + bank->sectors[num_sectors].size = mem_layout_str7bank0[i].sector_size; bank->sectors[num_sectors].is_erased = -1; bank->sectors[num_sectors].is_protected = 1; - str7x_info->sector_bank[num_sectors] = 0; - str7x_info->sector_bits[num_sectors++] = mem_layout[i].sector_bit; + str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank0[i].sector_bit; } - if (b1_sectors) + for (i = 0; i < b1_sectors; i++) { - for (i = 8; i < 10; i++) - { - bank->sectors[num_sectors].offset = mem_layout[i].sector_start; - bank->sectors[num_sectors].size = mem_layout[i].sector_size; - bank->sectors[num_sectors].is_erased = -1; - bank->sectors[num_sectors].is_protected = 1; - str7x_info->sector_bank[num_sectors] = 1; - str7x_info->sector_bits[num_sectors++] = mem_layout[i].sector_bit; - } + bank->sectors[num_sectors].offset = mem_layout_str7bank1[i].sector_start; + bank->sectors[num_sectors].size = mem_layout_str7bank1[i].sector_size; + bank->sectors[num_sectors].is_erased = -1; + bank->sectors[num_sectors].is_protected = 1; + str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank1[i].sector_bit; } return ERROR_OK; } -/* flash bank str7x 0 0 +/* flash bank str7x 0 0 */ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) { @@ -158,53 +158,37 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char if (argc < 7) { - WARNING("incomplete flash_bank str7x configuration"); + LOG_WARNING("incomplete flash_bank str7x configuration"); return ERROR_FLASH_BANK_INVALID; } str7x_info = malloc(sizeof(str7x_flash_bank_t)); bank->driver_priv = str7x_info; - if (strcmp(args[5], "STR71x") == 0) + /* set default bits for str71x flash */ + str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA1|FLASH_BSYA0); + str7x_info->disable_bit = (1<<1); + + if (strcmp(args[6], "STR71x") == 0) { - str7x_info->bank1 = 1; - if (bank->base != 0x40000000) - { - WARNING("overriding flash base address for STR71x device with 0x40000000"); - bank->base = 0x40000000; - } + str7x_info->register_base = 0x40100000; } - else if (strcmp(args[5], "STR73x") == 0) + else if (strcmp(args[6], "STR73x") == 0) { - str7x_info->bank1 = 0; - if (bank->base != 0x80000000) - { - WARNING("overriding flash base address for STR73x device with 0x80000000"); - bank->base = 0x80000000; - } + str7x_info->register_base = 0x80100000; + str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA0); } - else if (strcmp(args[5], "STR75x") == 0) + else if (strcmp(args[6], "STR75x") == 0) { - str7x_info->bank1 = 1; - if (bank->base != 0x20000000) - { - WARNING("overriding flash base address for STR75x device with 0x20000000"); - bank->base = 0x20000000; - } + str7x_info->register_base = 0x20100000; + str7x_info->disable_bit = (1<<0); } else { - ERROR("unknown STR7x variant"); + LOG_ERROR("unknown STR7x variant: '%s'", args[6]); free(str7x_info); return ERROR_FLASH_BANK_INVALID; } - - str7x_info->target = get_target_by_num(strtoul(args[6], NULL, 0)); - if (!str7x_info->target) - { - ERROR("no target '%s' configured", args[6]); - exit(-1); - } str7x_build_block_list(bank); @@ -215,8 +199,7 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char u32 str7x_status(struct flash_bank_s *bank) { - str7x_flash_bank_t *str7x_info = bank->driver_priv; - target_t *target = str7x_info->target; + target_t *target = bank->target; u32 retval; target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval); @@ -226,8 +209,7 @@ u32 str7x_status(struct flash_bank_s *bank) u32 str7x_result(struct flash_bank_s *bank) { - str7x_flash_bank_t *str7x_info = bank->driver_priv; - target_t *target = str7x_info->target; + target_t *target = bank->target; u32 retval; target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &retval); @@ -235,54 +217,15 @@ u32 str7x_result(struct flash_bank_s *bank) return retval; } -int str7x_blank_check(struct flash_bank_s *bank, int first, int last) -{ - str7x_flash_bank_t *str7x_info = bank->driver_priv; - target_t *target = str7x_info->target; - u8 *buffer; - int i; - int nBytes; - - if ((first < 0) || (last > bank->num_sectors)) - return ERROR_FLASH_SECTOR_INVALID; - - if (str7x_info->target->state != TARGET_HALTED) - { - return ERROR_TARGET_NOT_HALTED; - } - - buffer = malloc(256); - - for (i = first; i <= last; i++) - { - bank->sectors[i].is_erased = 1; - - target->type->read_memory(target, bank->base + bank->sectors[i].offset, 4, 256/4, buffer); - - for (nBytes = 0; nBytes < 256; nBytes++) - { - if (buffer[nBytes] != 0xFF) - { - bank->sectors[i].is_erased = 0; - break; - } - } - } - - free(buffer); - - return ERROR_OK; -} - int str7x_protect_check(struct flash_bank_s *bank) { str7x_flash_bank_t *str7x_info = bank->driver_priv; - target_t *target = str7x_info->target; + target_t *target = bank->target; int i; u32 retval; - if (str7x_info->target->state != TARGET_HALTED) + if (bank->target->state != TARGET_HALTED) { return ERROR_TARGET_NOT_HALTED; } @@ -303,84 +246,47 @@ int str7x_protect_check(struct flash_bank_s *bank) int str7x_erase(struct flash_bank_s *bank, int first, int last) { str7x_flash_bank_t *str7x_info = bank->driver_priv; - target_t *target = str7x_info->target; + target_t *target = bank->target; int i; u32 cmd; u32 retval; - u32 b0_sectors = 0, b1_sectors = 0; + u32 sectors = 0; - if (str7x_info->target->state != TARGET_HALTED) + if (bank->target->state != TARGET_HALTED) { return ERROR_TARGET_NOT_HALTED; } - + for (i = first; i <= last; i++) { - if (str7x_info->sector_bank[i] == 0) - b0_sectors |= str7x_info->sector_bits[i]; - else if (str7x_info->sector_bank[i] == 1) - b1_sectors |= str7x_info->sector_bits[i]; - else - ERROR("BUG: str7x_info->sector_bank[i] neither 0 nor 1 (%i)", str7x_info->sector_bank[i]); + sectors |= str7x_info->sector_bits[i]; } - if (b0_sectors) - { - DEBUG("b0_sectors: 0x%x", b0_sectors); - - /* clear FLASH_ER register */ - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); - - cmd = FLASH_SER; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - cmd = b0_sectors; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); - - cmd = FLASH_SER|FLASH_WMS; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){ - usleep(1000); - } - - retval = str7x_result(bank); - - if (retval) - { - ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); - return ERROR_FLASH_OPERATION_FAILED; - } + LOG_DEBUG("sectors: 0x%x", sectors); + + /* clear FLASH_ER register */ + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + + cmd = FLASH_SER; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + + cmd = sectors; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); + + cmd = FLASH_SER|FLASH_WMS; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + + while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){ + usleep(1000); } - if (b1_sectors) + retval = str7x_result(bank); + + if (retval) { - DEBUG("b1_sectors: 0x%x", b1_sectors); - - /* clear FLASH_ER register */ - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); - - cmd = FLASH_SER; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - cmd = b1_sectors; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); - - cmd = FLASH_SER|FLASH_WMS; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){ - usleep(1000); - } - - retval = str7x_result(bank); - - if (retval) - { - ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); - return ERROR_FLASH_OPERATION_FAILED; - } + LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); + return ERROR_FLASH_OPERATION_FAILED; } for (i = first; i <= last; i++) @@ -392,13 +298,13 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last) int str7x_protect(struct flash_bank_s *bank, int set, int first, int last) { str7x_flash_bank_t *str7x_info = bank->driver_priv; - target_t *target = str7x_info->target; + target_t *target = bank->target; int i; u32 cmd; u32 retval; u32 protect_blocks; - if (str7x_info->target->state != TARGET_HALTED) + if (bank->target->state != TARGET_HALTED) { return ERROR_TARGET_NOT_HALTED; } @@ -426,13 +332,13 @@ int str7x_protect(struct flash_bank_s *bank, int set, int first, int last) cmd = FLASH_SPR|FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){ + while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){ usleep(1000); } retval = str7x_result(bank); - DEBUG("retval: 0x%8.8x", retval); + LOG_DEBUG("retval: 0x%8.8x", retval); if (retval & FLASH_ERER) return ERROR_FLASH_SECTOR_NOT_ERASED; @@ -445,13 +351,13 @@ int str7x_protect(struct flash_bank_s *bank, int set, int first, int last) int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { str7x_flash_bank_t *str7x_info = bank->driver_priv; - target_t *target = str7x_info->target; + target_t *target = bank->target; u32 buffer_size = 8192; working_area_t *source; u32 address = bank->base + offset; - reg_param_t reg_params[5]; + reg_param_t reg_params[6]; armv4_5_algorithm_t armv4_5_info; - int retval; + int retval = ERROR_OK; u32 str7x_flash_write_code[] = { /* write: */ @@ -466,7 +372,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou 0xe5824000, /* str r4, [r2, #0x0] */ /* busy: */ 0xe5924000, /* ldr r4, [r2, #0x0] */ - 0xe3140016, /* tst r4, #0x16 */ + 0xe1140005, /* tst r4, r5 */ 0x1afffffc, /* bne busy */ 0xe5924014, /* ldr r4, [r2, #0x14] */ 0xe31400ff, /* tst r4, #0xff */ @@ -479,24 +385,14 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou 0xeafffffe, /* b exit */ }; - u8 str7x_flash_write_code_buf[80]; - int i; - /* flash write code */ - if (!str7x_info->write_algorithm) + if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK) { - if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK) - { - WARNING("no working area available, can't do block memory writes"); - return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; - }; - - /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < 20; i++) - target_buffer_set_u32(target, str7x_flash_write_code_buf + i*4, str7x_flash_write_code[i]); - - target_write_buffer(target, str7x_info->write_algorithm->address, 20 * 4, str7x_flash_write_code_buf); - } + LOG_WARNING("no working area available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + }; + + target_write_buffer(target, str7x_info->write_algorithm->address, 20 * 4, (u8*)str7x_flash_write_code); /* memory buffer */ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) @@ -508,10 +404,10 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou if (str7x_info->write_algorithm) target_free_working_area(target, str7x_info->write_algorithm); - WARNING("no large enough working area available, can't do block memory writes"); + LOG_WARNING("no large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - }; + } armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.core_mode = ARMV4_5_MODE_SVC; @@ -522,6 +418,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou init_reg_param(®_params[2], "r2", 32, PARAM_OUT); init_reg_param(®_params[3], "r3", 32, PARAM_OUT); init_reg_param(®_params[4], "r4", 32, PARAM_IN); + init_reg_param(®_params[5], "r5", 32, PARAM_OUT); while (count > 0) { @@ -533,16 +430,18 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou buf_set_u32(reg_params[1].value, 0, 32, address); buf_set_u32(reg_params[2].value, 0, 32, str7x_get_flash_adr(bank, FLASH_CR0)); buf_set_u32(reg_params[3].value, 0, 32, thisrun_count); + buf_set_u32(reg_params[5].value, 0, 32, str7x_info->busy_bits); - if ((retval = target->type->run_algorithm(target, 0, NULL, 5, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK) + if ((retval = target->type->run_algorithm(target, 0, NULL, 6, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK) { - ERROR("error executing str7x flash write algorithm"); - return ERROR_FLASH_OPERATION_FAILED; + LOG_ERROR("error executing str7x flash write algorithm"); + break; } if (buf_get_u32(reg_params[4].value, 0, 32) != 0x00) { - return ERROR_FLASH_OPERATION_FAILED; + retval = ERROR_FLASH_OPERATION_FAILED; + break; } buffer += thisrun_count * 8; @@ -551,20 +450,22 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou } target_free_working_area(target, source); + target_free_working_area(target, str7x_info->write_algorithm); destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); destroy_reg_param(®_params[2]); destroy_reg_param(®_params[3]); destroy_reg_param(®_params[4]); + destroy_reg_param(®_params[5]); - return ERROR_OK; + return retval; } int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { + target_t *target = bank->target; str7x_flash_bank_t *str7x_info = bank->driver_priv; - target_t *target = str7x_info->target; u32 dwords_remaining = (count / 8); u32 bytes_remaining = (count & 0x00000007); u32 address = bank->base + offset; @@ -574,14 +475,14 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) u32 check_address = offset; int i; - if (str7x_info->target->state != TARGET_HALTED) + if (bank->target->state != TARGET_HALTED) { return ERROR_TARGET_NOT_HALTED; } - + if (offset & 0x7) { - WARNING("offset 0x%x breaks required 8-byte alignment", offset); + LOG_WARNING("offset 0x%x breaks required 8-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -617,14 +518,14 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { /* if block write failed (no sufficient working area), * we use normal (slow) single dword accesses */ - WARNING("couldn't use block writes, falling back to single memory accesses"); + LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); } else if (retval == ERROR_FLASH_OPERATION_FAILED) { /* if an error occured, we examine the reason, and quit */ retval = str7x_result(bank); - ERROR("flash writing failed with error code: 0x%x", retval); + LOG_ERROR("flash writing failed with error code: 0x%x", retval); return ERROR_FLASH_OPERATION_FAILED; } } @@ -638,18 +539,18 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) while (dwords_remaining > 0) { - // command + /* command */ cmd = FLASH_DWPG; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - // address + /* address */ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address); - // data word 1 + /* data word 1 */ target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, buffer + bytes_written); bytes_written += 4; - // data word 2 + /* data word 2 */ target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, buffer + bytes_written); bytes_written += 4; @@ -657,7 +558,7 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) cmd = FLASH_DWPG | FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - while (((retval = str7x_status(bank)) & (FLASH_BSYA1 | FLASH_BSYA2))) + while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) { usleep(1000); } @@ -685,18 +586,18 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) bytes_written++; } - // command + /* command */ cmd = FLASH_DWPG; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - // address + /* address */ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address); - // data word 1 + /* data word 1 */ target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, last_dword); bytes_written += 4; - // data word 2 + /* data word 2 */ target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, last_dword + 4); bytes_written += 4; @@ -704,7 +605,7 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) cmd = FLASH_DWPG | FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - while (((retval = str7x_status(bank)) & (FLASH_BSYA1 | FLASH_BSYA2))) + while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) { usleep(1000); } @@ -730,13 +631,81 @@ int str7x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, c return ERROR_OK; } -int str7x_erase_check(struct flash_bank_s *bank) +int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size) { - return str7x_blank_check(bank, 0, bank->num_sectors - 1); + snprintf(buf, buf_size, "str7x flash driver info" ); + return ERROR_OK; } -int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size) +int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - snprintf(buf, buf_size, "str7x flash driver info" ); + flash_bank_t *bank; + target_t *target = NULL; + str7x_flash_bank_t *str7x_info = NULL; + + u32 flash_cmd; + u32 retval; + u16 ProtectionLevel = 0; + u16 ProtectionRegs; + + if (argc < 1) + { + command_print(cmd_ctx, "str7x disable_jtag "); + return ERROR_OK; + } + + bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); + if (!bank) + { + command_print(cmd_ctx, "str7x disable_jtag ok"); + return ERROR_OK; + } + + str7x_info = bank->driver_priv; + + target = bank->target; + + if (target->state != TARGET_HALTED) + { + return ERROR_TARGET_NOT_HALTED; + } + + /* first we get protection status */ + target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR0), &retval); + + if (!(retval & str7x_info->disable_bit)) + { + ProtectionLevel = 1; + } + + target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR1), &retval); + ProtectionRegs = ~(retval >> 16); + + while (((ProtectionRegs) != 0) && (ProtectionLevel < 16)) + { + ProtectionRegs >>= 1; + ProtectionLevel++; + } + + if (ProtectionLevel == 0) + { + flash_cmd = FLASH_SPR; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFB8); + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), 0xFFFFFFFD); + flash_cmd = FLASH_SPR | FLASH_WMS; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); + } + else + { + flash_cmd = FLASH_SPR; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFBC); + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), ~(1<<(15+ProtectionLevel))); + flash_cmd = FLASH_SPR | FLASH_WMS; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); + } + return ERROR_OK; } +