X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fpic32mx.c;h=95e2c637349c5bfe91d0a27d9bbcaac00db9840b;hp=32481273a8705fd184c7c73731a6bbe524f64250;hb=7bf1a86e473a12882bf6f71cb4d0d416394b69d4;hpb=eba5608b5227696e00437543c0226ed04cae12d5
diff --git a/src/flash/pic32mx.c b/src/flash/pic32mx.c
index 32481273a8..95e2c63734 100644
--- a/src/flash/pic32mx.c
+++ b/src/flash/pic32mx.c
@@ -57,8 +57,8 @@ struct pic32mx_devs_s {
{ 0x00, NULL, 0 }
};
-static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32_t srcaddr);
-static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint32_t word);
+static int pic32mx_write_row(struct flash_bank *bank, uint32_t address, uint32_t srcaddr);
+static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_t word);
/* flash bank pic32mx 0 0
*/
@@ -66,7 +66,7 @@ FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
{
struct pic32mx_flash_bank *pic32mx_info;
- if (argc < 6)
+ if (CMD_ARGC < 6)
{
LOG_WARNING("incomplete flash_bank pic32mx configuration");
return ERROR_FLASH_BANK_INVALID;
@@ -81,9 +81,9 @@ FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
return ERROR_OK;
}
-static uint32_t pic32mx_get_flash_status(flash_bank_t *bank)
+static uint32_t pic32mx_get_flash_status(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
target_read_u32(target, PIC32MX_NVMCON, &status);
@@ -91,7 +91,7 @@ static uint32_t pic32mx_get_flash_status(flash_bank_t *bank)
return status;
}
-static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
+static uint32_t pic32mx_wait_status_busy(struct flash_bank *bank, int timeout)
{
uint32_t status;
@@ -107,9 +107,9 @@ static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
return status;
}
-static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t timeout)
+static int pic32mx_nvm_exec(struct flash_bank *bank, uint32_t op, uint32_t timeout)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN | op);
@@ -129,9 +129,9 @@ static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t tim
return status;
}
-static int pic32mx_protect_check(struct flash_bank_s *bank)
+static int pic32mx_protect_check(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t devcfg0;
int s;
@@ -163,9 +163,9 @@ static int pic32mx_protect_check(struct flash_bank_s *bank)
return ERROR_OK;
}
-static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
+static int pic32mx_erase(struct flash_bank *bank, int first, int last)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t status;
@@ -205,10 +205,10 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
return ERROR_OK;
}
-static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last)
{
struct pic32mx_flash_bank *pic32mx_info = NULL;
- target_t *target = bank->target;
+ struct target *target = bank->target;
#if 0
uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
int i, reg, bit;
@@ -298,16 +298,16 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
#endif
}
-static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t buffer_size = 512;
- working_area_t *source;
+ struct working_area *source;
uint32_t address = bank->base + offset;
int retval = ERROR_OK;
#if 0
struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
- armv7m_algorithm_t armv7m_info;
+ struct armv7m_algorithm armv7m_info;
uint8_t pic32mx_flash_write_code[] = {
/* write: */
@@ -427,9 +427,9 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3
return retval;
}
-static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint32_t word)
+static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_t word)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
@@ -443,9 +443,9 @@ static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint3
/*
* Write a 128 word (512 byte) row to flash address from RAM srcaddr.
*/
-static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32_t srcaddr)
+static int pic32mx_write_row(struct flash_bank *bank, uint32_t address, uint32_t srcaddr)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
LOG_DEBUG("addr: 0x%08" PRIx32 " srcaddr: 0x%08" PRIx32 "", address, srcaddr);
@@ -461,7 +461,7 @@ static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32
return pic32mx_nvm_exec(bank, NVMCON_OP_ROW_PROG, 100);
}
-static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
uint32_t words_remaining = (count / 4);
uint32_t bytes_remaining = (count & 0x00000003);
@@ -539,12 +539,12 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
return ERROR_OK;
}
-static int pic32mx_probe(struct flash_bank_s *bank)
+static int pic32mx_probe(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
int i;
uint16_t num_pages = 0;
uint32_t device_id;
@@ -622,7 +622,7 @@ static int pic32mx_probe(struct flash_bank_s *bank)
return ERROR_OK;
}
-static int pic32mx_auto_probe(struct flash_bank_s *bank)
+static int pic32mx_auto_probe(struct flash_bank *bank)
{
struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
if (pic32mx_info->probed)
@@ -637,11 +637,11 @@ COMMAND_HANDLER(pic32mx_handle_part_id_command)
}
#endif
-static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
{
- target_t *target = bank->target;
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct target *target = bank->target;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t device_id;
int printed = 0, i;
@@ -674,17 +674,17 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
#if 0
COMMAND_HANDLER(pic32mx_handle_lock_command)
{
- target_t *target = NULL;
+ struct target *target = NULL;
struct pic32mx_flash_bank *pic32mx_info = NULL;
- if (argc < 1)
+ if (CMD_ARGC < 1)
{
command_print(cmd_ctx, "pic32mx lock ");
return ERROR_OK;
}
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank_by_num, 0, &bank);
if (ERROR_OK != retval)
return retval;
@@ -720,17 +720,17 @@ COMMAND_HANDLER(pic32mx_handle_lock_command)
COMMAND_HANDLER(pic32mx_handle_unlock_command)
{
- target_t *target = NULL;
+ struct target *target = NULL;
struct pic32mx_flash_bank *pic32mx_info = NULL;
- if (argc < 1)
+ if (CMD_ARGC < 1)
{
command_print(cmd_ctx, "pic32mx unlock ");
return ERROR_OK;
}
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank_by_num, 0, &bank);
if (ERROR_OK != retval)
return retval;
@@ -763,9 +763,9 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
#endif
#if 0
-static int pic32mx_chip_erase(struct flash_bank_s *bank)
+static int pic32mx_chip_erase(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
#if 0
uint32_t status;
#endif
@@ -813,14 +813,14 @@ COMMAND_HANDLER(pic32mx_handle_chip_erase_command)
#if 0
int i;
- if (argc != 0)
+ if (CMD_ARGC != 0)
{
command_print(cmd_ctx, "pic32mx chip_erase");
return ERROR_OK;
}
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank_by_num, 0, &bank);
if (ERROR_OK != retval)
return retval;
@@ -848,7 +848,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
uint32_t address, value;
int status, res;
- if (argc != 3)
+ if (CMD_ARGC != 3)
{
command_print(cmd_ctx, "pic32mx pgm_word ");
return ERROR_OK;
@@ -857,8 +857,8 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
COMMAND_PARSE_NUMBER(u32, args[0], address);
COMMAND_PARSE_NUMBER(u32, args[1], value);
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[2], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank_by_num, 2, &bank);
if (ERROR_OK != retval)
return retval;
@@ -883,9 +883,9 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
return ERROR_OK;
}
-static int pic32mx_register_commands(struct command_context_s *cmd_ctx)
+static int pic32mx_register_commands(struct command_context *cmd_ctx)
{
- command_t *pic32mx_cmd = register_command(cmd_ctx, NULL, "pic32mx",
+ struct command *pic32mx_cmd = register_command(cmd_ctx, NULL, "pic32mx",
NULL, COMMAND_ANY, "pic32mx flash specific commands");
#if 0
register_command(cmd_ctx, pic32mx_cmd, "lock",