X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fpic32mx.c;h=05e047468d2a8c0cb2f119ea6c60000374e17fa8;hp=d9966bf557538862c8acc493f6a64644deeeb189;hb=23402315ce01071f30d7ec0c5ca7563ce41f1cc6;hpb=fc116380bf26ac00b8d0a37fee91e74118e12d8d
diff --git a/src/flash/pic32mx.c b/src/flash/pic32mx.c
index d9966bf557..05e047468d 100644
--- a/src/flash/pic32mx.c
+++ b/src/flash/pic32mx.c
@@ -57,72 +57,22 @@ struct pic32mx_devs_s {
{ 0x00, NULL, 0 }
};
-static int pic32mx_register_commands(struct command_context_s *cmd_ctx);
-static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-static int pic32mx_erase(struct flash_bank_s *bank, int first, int last);
-static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
-static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32_t srcaddr);
-static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint32_t word);
-static int pic32mx_probe(struct flash_bank_s *bank);
-static int pic32mx_auto_probe(struct flash_bank_s *bank);
-//static int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-static int pic32mx_protect_check(struct flash_bank_s *bank);
-static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size);
-
-#if 0
-int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-#endif
-static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-//static int pic32mx_chip_erase(struct flash_bank_s *bank);
-
-flash_driver_t pic32mx_flash =
-{
- .name = "pic32mx",
- .register_commands = pic32mx_register_commands,
- .flash_bank_command = pic32mx_flash_bank_command,
- .erase = pic32mx_erase,
- .protect = pic32mx_protect,
- .write = pic32mx_write,
- .probe = pic32mx_probe,
- .auto_probe = pic32mx_auto_probe,
- .erase_check = default_flash_mem_blank_check,
- .protect_check = pic32mx_protect_check,
- .info = pic32mx_info
-};
-
-static int pic32mx_register_commands(struct command_context_s *cmd_ctx)
-{
- command_t *pic32mx_cmd = register_command(cmd_ctx, NULL, "pic32mx", NULL, COMMAND_ANY, "pic32mx flash specific commands");
-
-#if 0
- register_command(cmd_ctx, pic32mx_cmd, "lock", pic32mx_handle_lock_command, COMMAND_EXEC,
- "lock device");
- register_command(cmd_ctx, pic32mx_cmd, "unlock", pic32mx_handle_unlock_command, COMMAND_EXEC,
- "unlock protected device");
-#endif
- register_command(cmd_ctx, pic32mx_cmd, "chip_erase", pic32mx_handle_chip_erase_command, COMMAND_EXEC,
- "erase device");
- register_command(cmd_ctx, pic32mx_cmd, "pgm_word", pic32mx_handle_pgm_word_command, COMMAND_EXEC,
- "program a word");
- return ERROR_OK;
-}
+static int pic32mx_write_row(struct flash_bank *bank, uint32_t address, uint32_t srcaddr);
+static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_t word);
/* flash bank pic32mx 0 0
*/
-static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
{
- pic32mx_flash_bank_t *pic32mx_info;
+ struct pic32mx_flash_bank *pic32mx_info;
- if (argc < 6)
+ if (CMD_ARGC < 6)
{
LOG_WARNING("incomplete flash_bank pic32mx configuration");
return ERROR_FLASH_BANK_INVALID;
}
- pic32mx_info = malloc(sizeof(pic32mx_flash_bank_t));
+ pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank));
bank->driver_priv = pic32mx_info;
pic32mx_info->write_algorithm = NULL;
@@ -131,9 +81,9 @@ static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *c
return ERROR_OK;
}
-static uint32_t pic32mx_get_flash_status(flash_bank_t *bank)
+static uint32_t pic32mx_get_flash_status(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
target_read_u32(target, PIC32MX_NVMCON, &status);
@@ -141,7 +91,7 @@ static uint32_t pic32mx_get_flash_status(flash_bank_t *bank)
return status;
}
-static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
+static uint32_t pic32mx_wait_status_busy(struct flash_bank *bank, int timeout)
{
uint32_t status;
@@ -157,9 +107,9 @@ static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
return status;
}
-static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t timeout)
+static int pic32mx_nvm_exec(struct flash_bank *bank, uint32_t op, uint32_t timeout)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t status;
target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN | op);
@@ -179,9 +129,9 @@ static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t tim
return status;
}
-static int pic32mx_protect_check(struct flash_bank_s *bank)
+static int pic32mx_protect_check(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t devcfg0;
int s;
@@ -213,9 +163,9 @@ static int pic32mx_protect_check(struct flash_bank_s *bank)
return ERROR_OK;
}
-static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
+static int pic32mx_erase(struct flash_bank *bank, int first, int last)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
int i;
uint32_t status;
@@ -255,10 +205,10 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
return ERROR_OK;
}
-static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last)
{
- pic32mx_flash_bank_t *pic32mx_info = NULL;
- target_t *target = bank->target;
+ struct pic32mx_flash_bank *pic32mx_info = NULL;
+ struct target *target = bank->target;
#if 0
uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
int i, reg, bit;
@@ -348,16 +298,16 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
#endif
}
-static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
uint32_t buffer_size = 512;
- working_area_t *source;
+ struct working_area *source;
uint32_t address = bank->base + offset;
int retval = ERROR_OK;
#if 0
- pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
- armv7m_algorithm_t armv7m_info;
+ struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
+ struct armv7m_algorithm armv7m_info;
uint8_t pic32mx_flash_write_code[] = {
/* write: */
@@ -477,9 +427,9 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3
return retval;
}
-static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint32_t word)
+static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_t word)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
@@ -493,9 +443,9 @@ static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint3
/*
* Write a 128 word (512 byte) row to flash address from RAM srcaddr.
*/
-static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32_t srcaddr)
+static int pic32mx_write_row(struct flash_bank *bank, uint32_t address, uint32_t srcaddr)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
LOG_DEBUG("addr: 0x%08" PRIx32 " srcaddr: 0x%08" PRIx32 "", address, srcaddr);
@@ -511,7 +461,7 @@ static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32
return pic32mx_nvm_exec(bank, NVMCON_OP_ROW_PROG, 100);
}
-static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
uint32_t words_remaining = (count / 4);
uint32_t bytes_remaining = (count & 0x00000003);
@@ -589,12 +539,12 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
return ERROR_OK;
}
-static int pic32mx_probe(struct flash_bank_s *bank)
+static int pic32mx_probe(struct flash_bank *bank)
{
- target_t *target = bank->target;
- pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct target *target = bank->target;
+ struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
int i;
uint16_t num_pages = 0;
uint32_t device_id;
@@ -657,7 +607,7 @@ static int pic32mx_probe(struct flash_bank_s *bank)
bank->num_sectors = num_pages;
bank->chip_width = 4;
bank->bus_width = 4;
- bank->sectors = malloc(sizeof(flash_sector_t) * num_pages);
+ bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
for (i = 0; i < num_pages; i++)
{
@@ -672,26 +622,26 @@ static int pic32mx_probe(struct flash_bank_s *bank)
return ERROR_OK;
}
-static int pic32mx_auto_probe(struct flash_bank_s *bank)
+static int pic32mx_auto_probe(struct flash_bank *bank)
{
- pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
+ struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
if (pic32mx_info->probed)
return ERROR_OK;
return pic32mx_probe(bank);
}
#if 0
-static int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(pic32mx_handle_part_id_command)
{
return ERROR_OK;
}
#endif
-static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
{
- target_t *target = bank->target;
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct target *target = bank->target;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t device_id;
int printed = 0, i;
@@ -722,19 +672,19 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
}
#if 0
-int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(pic32mx_handle_lock_command)
{
- target_t *target = NULL;
- pic32mx_flash_bank_t *pic32mx_info = NULL;
+ struct target *target = NULL;
+ struct pic32mx_flash_bank *pic32mx_info = NULL;
- if (argc < 1)
+ if (CMD_ARGC < 1)
{
command_print(cmd_ctx, "pic32mx lock ");
return ERROR_OK;
}
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank_by_num, 0, &bank);
if (ERROR_OK != retval)
return retval;
@@ -768,19 +718,19 @@ int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, ch
return ERROR_OK;
}
-int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(pic32mx_handle_unlock_command)
{
- target_t *target = NULL;
- pic32mx_flash_bank_t *pic32mx_info = NULL;
+ struct target *target = NULL;
+ struct pic32mx_flash_bank *pic32mx_info = NULL;
- if (argc < 1)
+ if (CMD_ARGC < 1)
{
command_print(cmd_ctx, "pic32mx unlock ");
return ERROR_OK;
}
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank_by_num, 0, &bank);
if (ERROR_OK != retval)
return retval;
@@ -813,9 +763,9 @@ int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd,
#endif
#if 0
-static int pic32mx_chip_erase(struct flash_bank_s *bank)
+static int pic32mx_chip_erase(struct flash_bank *bank)
{
- target_t *target = bank->target;
+ struct target *target = bank->target;
#if 0
uint32_t status;
#endif
@@ -858,19 +808,19 @@ static int pic32mx_chip_erase(struct flash_bank_s *bank)
}
#endif
-static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(pic32mx_handle_chip_erase_command)
{
#if 0
int i;
- if (argc != 0)
+ if (CMD_ARGC != 0)
{
command_print(cmd_ctx, "pic32mx chip_erase");
return ERROR_OK;
}
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank_by_num, 0, &bank);
if (ERROR_OK != retval)
return retval;
@@ -893,28 +843,28 @@ static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx,
return ERROR_OK;
}
-static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
{
uint32_t address, value;
int status, res;
- if (argc != 3)
+ if (CMD_ARGC != 3)
{
command_print(cmd_ctx, "pic32mx pgm_word ");
return ERROR_OK;
}
- COMMAND_PARSE_NUMBER(u32, args[0], address);
- COMMAND_PARSE_NUMBER(u32, args[1], value);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
- flash_bank_t *bank;
- int retval = flash_command_get_bank_by_num(cmd_ctx, args[2], &bank);
+ struct flash_bank *bank;
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank_by_num, 2, &bank);
if (ERROR_OK != retval)
return retval;
if (address < bank->base || address >= (bank->base + bank->size))
{
- command_print(cmd_ctx, "flash address '%s' is out of bounds", args[0]);
+ command_print(cmd_ctx, "flash address '%s' is out of bounds", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -932,3 +882,38 @@ static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, ch
return ERROR_OK;
}
+
+static int pic32mx_register_commands(struct command_context *cmd_ctx)
+{
+ struct command *pic32mx_cmd = register_command(cmd_ctx, NULL, "pic32mx",
+ NULL, COMMAND_ANY, "pic32mx flash specific commands");
+#if 0
+ register_command(cmd_ctx, pic32mx_cmd, "lock",
+ pic32mx_handle_lock_command, COMMAND_EXEC,
+ "lock device");
+ register_command(cmd_ctx, pic32mx_cmd, "unlock",
+ pic32mx_handle_unlock_command, COMMAND_EXEC,
+ "unlock protected device");
+#endif
+ register_command(cmd_ctx, pic32mx_cmd, "chip_erase",
+ pic32mx_handle_chip_erase_command, COMMAND_EXEC,
+ "erase device");
+ register_command(cmd_ctx, pic32mx_cmd, "pgm_word",
+ pic32mx_handle_pgm_word_command, COMMAND_EXEC,
+ "program a word");
+ return ERROR_OK;
+}
+
+struct flash_driver pic32mx_flash = {
+ .name = "pic32mx",
+ .register_commands = &pic32mx_register_commands,
+ .flash_bank_command = &pic32mx_flash_bank_command,
+ .erase = &pic32mx_erase,
+ .protect = &pic32mx_protect,
+ .write = &pic32mx_write,
+ .probe = &pic32mx_probe,
+ .auto_probe = &pic32mx_auto_probe,
+ .erase_check = &default_flash_mem_blank_check,
+ .protect_check = &pic32mx_protect_check,
+ .info = &pic32mx_info,
+ };