X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstr7x.c;h=91ef77b709bf2b6585d5651df6121ce5df9acf6a;hp=4f93ec9a84698052ac36a4a18c7e7bc7c8a4c99a;hb=16b6b5e7a86353dbc0c4823fe3d772c0faca7c1c;hpb=d9dc604a4d790f557a7ba502babdabffa27eaa17 diff --git a/src/flash/nor/str7x.c b/src/flash/nor/str7x.c index 4f93ec9a84..91ef77b709 100644 --- a/src/flash/nor/str7x.c +++ b/src/flash/nor/str7x.c @@ -5,6 +5,9 @@ * Copyright (C) 2008 by Spencer Oliver * * spen@spen-soft.co.uk * * * + * Copyright (C) 2010 Øyvind Harboe * + * oyvind.harboe@zylin.com * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -25,13 +28,95 @@ #endif #include "imp.h" -#include "str7x.h" -#include +#include #include #include -struct str7x_mem_layout mem_layout_str7bank0[] = { +/* Flash registers */ + +#define FLASH_CR0 0x00000000 +#define FLASH_CR1 0x00000004 +#define FLASH_DR0 0x00000008 +#define FLASH_DR1 0x0000000C +#define FLASH_AR 0x00000010 +#define FLASH_ER 0x00000014 +#define FLASH_NVWPAR 0x0000DFB0 +#define FLASH_NVAPR0 0x0000DFB8 +#define FLASH_NVAPR1 0x0000DFBC + +/* FLASH_CR0 register bits */ + +#define FLASH_WMS 0x80000000 +#define FLASH_SUSP 0x40000000 +#define FLASH_WPG 0x20000000 +#define FLASH_DWPG 0x10000000 +#define FLASH_SER 0x08000000 +#define FLASH_SPR 0x01000000 +#define FLASH_BER 0x04000000 +#define FLASH_MER 0x02000000 +#define FLASH_LOCK 0x00000010 +#define FLASH_BSYA1 0x00000004 +#define FLASH_BSYA0 0x00000002 + +/* FLASH_CR1 register bits */ + +#define FLASH_B1S 0x02000000 +#define FLASH_B0S 0x01000000 +#define FLASH_B1F1 0x00020000 +#define FLASH_B1F0 0x00010000 +#define FLASH_B0F7 0x00000080 +#define FLASH_B0F6 0x00000040 +#define FLASH_B0F5 0x00000020 +#define FLASH_B0F4 0x00000010 +#define FLASH_B0F3 0x00000008 +#define FLASH_B0F2 0x00000004 +#define FLASH_B0F1 0x00000002 +#define FLASH_B0F0 0x00000001 + +/* FLASH_ER register bits */ + +#define FLASH_WPF 0x00000100 +#define FLASH_RESER 0x00000080 +#define FLASH_SEQER 0x00000040 +#define FLASH_10ER 0x00000008 +#define FLASH_PGER 0x00000004 +#define FLASH_ERER 0x00000002 +#define FLASH_ERR 0x00000001 + + +struct str7x_flash_bank +{ + uint32_t *sector_bits; + uint32_t disable_bit; + uint32_t busy_bits; + uint32_t register_base; + struct working_area *write_algorithm; +}; + +struct str7x_mem_layout { + uint32_t sector_start; + uint32_t sector_size; + uint32_t sector_bit; +}; + +enum str7x_status_codes +{ + STR7X_CMD_SUCCESS = 0, + STR7X_INVALID_COMMAND = 1, + STR7X_SRC_ADDR_ERROR = 2, + STR7X_DST_ADDR_ERROR = 3, + STR7X_SRC_ADDR_NOT_MAPPED = 4, + STR7X_DST_ADDR_NOT_MAPPED = 5, + STR7X_COUNT_ERROR = 6, + STR7X_INVALID_SECTOR = 7, + STR7X_SECTOR_NOT_BLANK = 8, + STR7X_SECTOR_NOT_PREPARED = 9, + STR7X_COMPARE_ERROR = 10, + STR7X_BUSY = 11 +}; + +static struct str7x_mem_layout mem_layout_str7bank0[] = { {0x00000000, 0x02000, 0x01}, {0x00002000, 0x02000, 0x02}, {0x00004000, 0x02000, 0x04}, @@ -42,7 +127,7 @@ struct str7x_mem_layout mem_layout_str7bank0[] = { {0x00030000, 0x10000, 0x80} }; -struct str7x_mem_layout mem_layout_str7bank1[] = { +static struct str7x_mem_layout mem_layout_str7bank1[] = { {0x00000000, 0x02000, 0x10000}, {0x00002000, 0x02000, 0x20000} }; @@ -93,7 +178,10 @@ static int str7x_build_block_list(struct flash_bank *bank) bank->sectors[num_sectors].offset = mem_layout_str7bank0[i].sector_start; bank->sectors[num_sectors].size = mem_layout_str7bank0[i].sector_size; bank->sectors[num_sectors].is_erased = -1; - bank->sectors[num_sectors].is_protected = 1; + /* the reset_init handler marks all the sectors unprotected, + * matching hardware after reset; keep the driver in sync + */ + bank->sectors[num_sectors].is_protected = 0; str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank0[i].sector_bit; } @@ -102,7 +190,10 @@ static int str7x_build_block_list(struct flash_bank *bank) bank->sectors[num_sectors].offset = mem_layout_str7bank1[i].sector_start; bank->sectors[num_sectors].size = mem_layout_str7bank1[i].sector_size; bank->sectors[num_sectors].is_erased = -1; - bank->sectors[num_sectors].is_protected = 1; + /* the reset_init handler marks all the sectors unprotected, + * matching hardware after reset; keep the driver in sync + */ + bank->sectors[num_sectors].is_protected = 0; str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank1[i].sector_bit; } @@ -117,8 +208,7 @@ FLASH_BANK_COMMAND_HANDLER(str7x_flash_bank_command) if (CMD_ARGC < 7) { - LOG_WARNING("incomplete flash_bank str7x configuration"); - return ERROR_FLASH_BANK_INVALID; + return ERROR_COMMAND_SYNTAX_ERROR; } str7x_info = malloc(sizeof(struct str7x_flash_bank)); @@ -156,22 +246,84 @@ FLASH_BANK_COMMAND_HANDLER(str7x_flash_bank_command) return ERROR_OK; } -static uint32_t str7x_status(struct flash_bank *bank) +/* wait for flash to become idle or report errors. + + FIX!!! what's the maximum timeout??? The documentation doesn't + state any maximum time.... by inspection it seems > 1000ms is to be + expected. + + 10000ms is long enough that it should cover anything, yet not + quite be equivalent to an infinite loop. + + */ +static int str7x_waitbusy(struct flash_bank *bank) { + int err; + int i; struct target *target = bank->target; - uint32_t retval; + struct str7x_flash_bank *str7x_info = bank->driver_priv; - target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval); + for (i = 0 ; i < 10000; i++) + { + uint32_t retval; + err = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval); + if (err != ERROR_OK) + return err; - return retval; + if ((retval & str7x_info->busy_bits) == 0) + return ERROR_OK; + + alive_sleep(1); + } + LOG_ERROR("Timed out waiting for str7x flash"); + return ERROR_FAIL; } -static uint32_t str7x_result(struct flash_bank *bank) + +static int str7x_result(struct flash_bank *bank) { struct target *target = bank->target; - uint32_t retval; + uint32_t flash_flags; + + int retval; + retval = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &flash_flags); + if (retval != ERROR_OK) + return retval; - target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &retval); + if (flash_flags & FLASH_WPF) + { + LOG_ERROR("str7x hw write protection set"); + retval = ERROR_FAIL; + } + if (flash_flags & FLASH_RESER) + { + LOG_ERROR("str7x suspended program erase not resumed"); + retval = ERROR_FAIL; + } + if (flash_flags & FLASH_10ER) + { + LOG_ERROR("str7x trying to set bit to 1 when it is already 0"); + retval = ERROR_FAIL; + } + if (flash_flags & FLASH_PGER) + { + LOG_ERROR("str7x program error"); + retval = ERROR_FAIL; + } + if (flash_flags & FLASH_ERER) + { + LOG_ERROR("str7x erase error"); + retval = ERROR_FAIL; + } + if (retval == ERROR_OK) + { + if (flash_flags & FLASH_ERR) + { + /* this should always be set if one of the others are set... */ + LOG_ERROR("str7x write operation failed / bad setup"); + retval = ERROR_FAIL; + } + } return retval; } @@ -182,7 +334,7 @@ static int str7x_protect_check(struct flash_bank *bank) struct target *target = bank->target; int i; - uint32_t retval; + uint32_t flash_flags; if (bank->target->state != TARGET_HALTED) { @@ -190,11 +342,14 @@ static int str7x_protect_check(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVWPAR), &retval); + int retval; + retval = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVWPAR), &flash_flags); + if (retval != ERROR_OK) + return retval; for (i = 0; i < bank->num_sectors; i++) { - if (retval & str7x_info->sector_bits[i]) + if (flash_flags & str7x_info->sector_bits[i]) bank->sectors[i].is_protected = 0; else bank->sectors[i].is_protected = 1; @@ -210,8 +365,8 @@ static int str7x_erase(struct flash_bank *bank, int first, int last) int i; uint32_t cmd; - uint32_t retval; uint32_t sectors = 0; + int err; if (bank->target->state != TARGET_HALTED) { @@ -227,28 +382,32 @@ static int str7x_erase(struct flash_bank *bank, int first, int last) LOG_DEBUG("sectors: 0x%" PRIx32 "", sectors); /* clear FLASH_ER register */ - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + if (err != ERROR_OK) + return err; cmd = FLASH_SER; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + if (err != ERROR_OK) + return err; cmd = sectors; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); + if (err != ERROR_OK) + return err; cmd = FLASH_SER | FLASH_WMS; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + if (err != ERROR_OK) + return err; - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) { - alive_sleep(1); - } + err = str7x_waitbusy(bank); + if (err != ERROR_OK) + return err; - retval = str7x_result(bank); - - if (retval) - { - LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%" PRIx32 "", retval); - return ERROR_FLASH_OPERATION_FAILED; - } + err = str7x_result(bank); + if (err != ERROR_OK) + return err; for (i = first; i <= last; i++) bank->sectors[i].is_erased = 1; @@ -262,7 +421,6 @@ static int str7x_protect(struct flash_bank *bank, int set, int first, int last) struct target *target = bank->target; int i; uint32_t cmd; - uint32_t retval; uint32_t protect_blocks; if (bank->target->state != TARGET_HALTED) @@ -280,48 +438,57 @@ static int str7x_protect(struct flash_bank *bank, int set, int first, int last) } /* clear FLASH_ER register */ - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + int err; + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + if (err != ERROR_OK) + return err; cmd = FLASH_SPR; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + if (err != ERROR_OK) + return err; cmd = str7x_get_flash_adr(bank, FLASH_NVWPAR); - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), cmd); + if (err != ERROR_OK) + return err; cmd = protect_blocks; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), cmd); + if (err != ERROR_OK) + return err; cmd = FLASH_SPR | FLASH_WMS; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + if (err != ERROR_OK) + return err; - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) { - alive_sleep(1); - } + err = str7x_waitbusy(bank); + if (err != ERROR_OK) + return err; - retval = str7x_result(bank); - - LOG_DEBUG("retval: 0x%8.8" PRIx32 "", retval); - - if (retval & FLASH_ERER) - return ERROR_FLASH_SECTOR_NOT_ERASED; - else if (retval & FLASH_WPF) - return ERROR_FLASH_OPERATION_FAILED; + err = str7x_result(bank); + if (err != ERROR_OK) + return err; return ERROR_OK; } -static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, + uint32_t offset, uint32_t count) { struct str7x_flash_bank *str7x_info = bank->driver_priv; struct target *target = bank->target; - uint32_t buffer_size = 8192; + uint32_t buffer_size = 32768; struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[6]; - struct armv4_5_algorithm armv4_5_info; + struct arm_algorithm armv4_5_info; int retval = ERROR_OK; - uint32_t str7x_flash_write_code[] = { + /* see contib/loaders/flash/str7x.s for src */ + + static const uint32_t str7x_flash_write_code[] = { /* write: */ 0xe3a04201, /* mov r4, #0x10000000 */ 0xe5824000, /* str r4, [r2, #0x0] */ @@ -348,21 +515,24 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t }; /* flash write code */ - if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK) + if (target_alloc_working_area_try(target, sizeof(str7x_flash_write_code), + &str7x_info->write_algorithm) != ERROR_OK) { - LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - target_write_buffer(target, str7x_info->write_algorithm->address, 20 * 4, (uint8_t*)str7x_flash_write_code); + target_write_buffer(target, str7x_info->write_algorithm->address, + sizeof(str7x_flash_write_code), + (uint8_t*)str7x_flash_write_code); /* memory buffer */ - while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) + while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { buffer_size /= 2; if (buffer_size <= 256) { - /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */ + /* if we already allocated the writing code, but failed to get a + * buffer, free the algorithm */ if (str7x_info->write_algorithm) target_free_working_area(target, str7x_info->write_algorithm); @@ -371,9 +541,9 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t } } - armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; - armv4_5_info.core_mode = ARMV4_5_MODE_SVC; - armv4_5_info.core_state = ARMV4_5_STATE_ARM; + armv4_5_info.common_magic = ARM_COMMON_MAGIC; + armv4_5_info.core_mode = ARM_MODE_SVC; + armv4_5_info.core_state = ARM_STATE_ARM; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); init_reg_param(®_params[1], "r1", 32, PARAM_OUT); @@ -394,16 +564,17 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t buf_set_u32(reg_params[3].value, 0, 32, thisrun_count); buf_set_u32(reg_params[5].value, 0, 32, str7x_info->busy_bits); - if ((retval = target_run_algorithm(target, 0, NULL, 6, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK) + if ((retval = target_run_algorithm(target, 0, NULL, 6, reg_params, + str7x_info->write_algorithm->address, + str7x_info->write_algorithm->address + (sizeof(str7x_flash_write_code) - 4), + 10000, &armv4_5_info)) != ERROR_OK) { - LOG_ERROR("error executing str7x flash write algorithm"); - retval = ERROR_FLASH_OPERATION_FAILED; break; } if (buf_get_u32(reg_params[4].value, 0, 32) != 0x00) { - retval = ERROR_FLASH_OPERATION_FAILED; + retval = str7x_result(bank); break; } @@ -425,10 +596,10 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t return retval; } -static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int str7x_write(struct flash_bank *bank, uint8_t *buffer, + uint32_t offset, uint32_t count) { struct target *target = bank->target; - struct str7x_flash_bank *str7x_info = bank->driver_priv; uint32_t dwords_remaining = (count / 8); uint32_t bytes_remaining = (count & 0x00000007); uint32_t address = bank->base + offset; @@ -476,21 +647,17 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset if (dwords_remaining > 0) { /* try using a block write */ - if ((retval = str7x_write_block(bank, buffer, offset, dwords_remaining)) != ERROR_OK) + if ((retval = str7x_write_block(bank, buffer, offset, + dwords_remaining)) != ERROR_OK) { if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { /* if block write failed (no sufficient working area), * we use normal (slow) single dword accesses */ LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); - } - else if (retval == ERROR_FLASH_OPERATION_FAILED) + } else { - /* if an error occured, we examine the reason, and quit */ - retval = str7x_result(bank); - - LOG_ERROR("flash writing failed with error code: 0x%x", retval); - return ERROR_FLASH_OPERATION_FAILED; + return retval; } } else @@ -511,28 +678,27 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address); /* data word 1 */ - target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, buffer + bytes_written); + target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), + 4, 1, buffer + bytes_written); bytes_written += 4; /* data word 2 */ - target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, buffer + bytes_written); + target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), + 4, 1, buffer + bytes_written); bytes_written += 4; /* start programming cycle */ cmd = FLASH_DWPG | FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) - { - alive_sleep(1); - } - - retval = str7x_result(bank); + int err; + err = str7x_waitbusy(bank); + if (err != ERROR_OK) + return err; - if (retval & FLASH_PGER) - return ERROR_FLASH_OPERATION_FAILED; - else if (retval & FLASH_WPF) - return ERROR_FLASH_OPERATION_FAILED; + err = str7x_result(bank); + if (err != ERROR_OK) + return err; dwords_remaining--; address += 8; @@ -541,7 +707,7 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset if (bytes_remaining) { uint8_t last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - int i = 0; + i = 0; while (bytes_remaining > 0) { @@ -558,28 +724,27 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address); /* data word 1 */ - target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, last_dword); + target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), + 4, 1, last_dword); bytes_written += 4; /* data word 2 */ - target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, last_dword + 4); + target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), + 4, 1, last_dword + 4); bytes_written += 4; /* start programming cycle */ cmd = FLASH_DWPG | FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) - { - alive_sleep(1); - } - - retval = str7x_result(bank); + int err; + err = str7x_waitbusy(bank); + if (err != ERROR_OK) + return err; - if (retval & FLASH_PGER) - return ERROR_FLASH_OPERATION_FAILED; - else if (retval & FLASH_WPF) - return ERROR_FLASH_OPERATION_FAILED; + err = str7x_result(bank); + if (err != ERROR_OK) + return err; } return ERROR_OK; @@ -597,9 +762,15 @@ COMMAND_HANDLER(str7x_handle_part_id_command) } #endif -static int str7x_info(struct flash_bank *bank, char *buf, int buf_size) +static int get_str7x_info(struct flash_bank *bank, char *buf, int buf_size) { snprintf(buf, buf_size, "str7x flash driver info"); + /* STR7x flash doesn't support sector protection interrogation. + * FLASH_NVWPAR acts as a write only register; its read value + * doesn't reflect the actual protection state of the sectors. + */ + LOG_WARNING("STR7x flash lock information might not be correct " + "due to hardware limitations."); return ERROR_OK; } @@ -614,8 +785,7 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command) if (CMD_ARGC < 1) { - command_print(CMD_CTX, "str7x disable_jtag "); - return ERROR_OK; + return ERROR_COMMAND_SYNTAX_ERROR; } struct flash_bank *bank; @@ -665,7 +835,8 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command) flash_cmd = FLASH_SPR; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFBC); - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), ~(1 << (15 + ProtectionLevel))); + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), + ~(1 << (15 + ProtectionLevel))); flash_cmd = FLASH_SPR | FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); } @@ -676,12 +847,14 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command) static const struct command_registration str7x_exec_command_handlers[] = { { .name = "disable_jtag", - .handler = &str7x_handle_disable_jtag_command, + .usage = "", + .handler = str7x_handle_disable_jtag_command, .mode = COMMAND_EXEC, .help = "disable jtag access", }, COMMAND_REGISTRATION_DONE }; + static const struct command_registration str7x_command_handlers[] = { { .name = "str7x", @@ -693,15 +866,16 @@ static const struct command_registration str7x_command_handlers[] = { }; struct flash_driver str7x_flash = { - .name = "str7x", - .commands = str7x_command_handlers, - .flash_bank_command = &str7x_flash_bank_command, - .erase = &str7x_erase, - .protect = &str7x_protect, - .write = &str7x_write, - .probe = &str7x_probe, - .auto_probe = &str7x_probe, - .erase_check = &default_flash_blank_check, - .protect_check = &str7x_protect_check, - .info = &str7x_info, - }; + .name = "str7x", + .commands = str7x_command_handlers, + .flash_bank_command = str7x_flash_bank_command, + .erase = str7x_erase, + .protect = str7x_protect, + .write = str7x_write, + .read = default_flash_read, + .probe = str7x_probe, + .auto_probe = str7x_probe, + .erase_check = default_flash_blank_check, + .protect_check = str7x_protect_check, + .info = get_str7x_info, +};