X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstm32f2x.c;h=4269c44619f29abee94f63249d6c5def9aa1adc1;hp=56fd9f66255fc5b28608a86f8199872cca82b287;hb=d0e763ac7ef6aa17b17bd00ccdfbccfb4eacda69;hpb=7bcf1d838dc2b007598df9594725d17e918c75e2 diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c index 56fd9f6625..4269c44619 100644 --- a/src/flash/nor/stm32f2x.c +++ b/src/flash/nor/stm32f2x.c @@ -19,9 +19,7 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + * along with this program. If not, see . * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -59,21 +57,33 @@ * To reduce testing complexity and dangers of regressions, * a seperate file is used for stm32fx2x. * - * 1mByte part with 4 x 16, 1 x 64, 7 x 128kBytes sectors + * Sector sizes in kiBytes: + * 1 MiByte part with 4 x 16, 1 x 64, 7 x 128. + * 2 MiByte part with 4 x 16, 1 x 64, 7 x 128, 4 x 16, 1 x 64, 7 x 128. + * 1 MiByte STM32F42x/43x part with DB1M Option set: + * 4 x 16, 1 x 64, 3 x 128, 4 x 16, 1 x 64, 3 x 128. * - * What's the protection page size??? + * STM32F7 + * 1 MiByte part with 4 x 32, 1 x 128, 3 x 256. + * + * Protection size is sector size. * * Tested with STM3220F-EVAL board. * - * STM32F21xx series for reference. + * STM32F4xx series for reference. * - * RM0033 - * http://www.st.com/internet/mcu/product/250192.jsp + * RM0090 + * http://www.st.com/web/en/resource/technical/document/reference_manual/DM00031020.pdf * * PM0059 * www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/ * PROGRAMMING_MANUAL/CD00233952.pdf * + * STM32F7xx series for reference. + * + * RM0385 + * http://www.st.com/web/en/resource/technical/document/reference_manual/DM00124865.pdf + * * STM32F1x series - notice that this code was copy, pasted and knocked * into a stm32f2x driver, so in case something has been converted or * bugs haven't been fixed, here are the original manuals: @@ -140,6 +150,7 @@ #define OPT_RDRSTSTOP 3 #define OPT_RDRSTSTDBY 4 #define OPT_BFB2 5 /* dual flash bank only */ +#define OPT_DB1M 14 /* 1 MiB devices dual flash bank option */ /* register unlock keys */ @@ -344,8 +355,8 @@ static int stm32x_write_options(struct flash_bank *bank) /* rebuild option data */ optiondata = stm32x_info->option_bytes.user_options; - buf_set_u32(&optiondata, 8, 8, stm32x_info->option_bytes.RDP); - buf_set_u32(&optiondata, 16, 12, stm32x_info->option_bytes.protection); + optiondata |= stm32x_info->option_bytes.RDP << 8; + optiondata |= (stm32x_info->option_bytes.protection & 0x0fff) << 16; /* program options */ retval = target_write_u32(target, STM32_FLASH_OPTCR, optiondata); @@ -355,7 +366,7 @@ static int stm32x_write_options(struct flash_bank *bank) if (stm32x_info->has_large_mem) { uint32_t optiondata2 = 0; - buf_set_u32(&optiondata2, 16, 12, stm32x_info->option_bytes.protection >> 12); + optiondata2 |= (stm32x_info->option_bytes.protection & 0x00fff000) << 4; retval = target_write_u32(target, STM32_FLASH_OPTCR1, optiondata2); if (retval != ERROR_OK) return retval; @@ -504,10 +515,11 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, 0x47, 0x45, /* cmp r7, r8 */ 0xF7, 0xD0, /* beq wait_fifo */ - 0xDF, 0xF8, 0x30, 0x60, /* ldr r6, STM32_PROG16 */ + 0xDF, 0xF8, 0x34, 0x60, /* ldr r6, STM32_PROG16 */ 0x26, 0x61, /* str r6, [r4, #STM32_FLASH_CR_OFFSET] */ 0x37, 0xF8, 0x02, 0x6B, /* ldrh r6, [r7], #0x02 */ 0x22, 0xF8, 0x02, 0x6B, /* strh r6, [r2], #0x02 */ + 0xBF, 0xF3, 0x4F, 0x8F, /* dsb sy */ /* busy: */ 0xE6, 0x68, /* ldr r6, [r4, #STM32_FLASH_SR_OFFSET] */ 0x16, 0xF4, 0x80, 0x3F, /* tst r6, #0x10000 */ @@ -521,7 +533,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, 0x47, 0x60, /* str r7, [r0, #4] */ 0x01, 0x3B, /* subs r3, r3, #1 */ 0x13, 0xB1, /* cbz r3, exit */ - 0xE1, 0xE7, /* b wait_fifo */ + 0xDF, 0xE7, /* b wait_fifo */ /* error: */ 0x00, 0x21, /* movs r1, #0 */ 0x41, 0x60, /* str r1, [r0, #4] */ @@ -537,7 +549,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, &write_algorithm) != ERROR_OK) { LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; - }; + } retval = target_write_buffer(target, write_algorithm->address, sizeof(stm32x_flash_write_code), @@ -556,7 +568,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, LOG_WARNING("no large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - }; + } armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARM_MODE_THREAD; @@ -754,6 +766,8 @@ static int stm32x_probe(struct flash_bank *bank) struct stm32x_flash_bank *stm32x_info = bank->driver_priv; int i; uint16_t flash_size_in_kb; + uint32_t flash_size_reg = 0x1FFF7A22; + uint16_t max_sector_size_in_kb = 128; uint16_t max_flash_size_in_kb; uint32_t device_id; uint32_t base_address = 0x08000000; @@ -771,24 +785,36 @@ static int stm32x_probe(struct flash_bank *bank) switch (device_id & 0xfff) { case 0x411: case 0x413: + case 0x441: max_flash_size_in_kb = 1024; break; case 0x419: + case 0x434: max_flash_size_in_kb = 2048; break; case 0x423: max_flash_size_in_kb = 256; break; + case 0x431: case 0x433: + case 0x421: max_flash_size_in_kb = 512; break; + case 0x458: + max_flash_size_in_kb = 128; + break; + case 0x449: + max_flash_size_in_kb = 1024; + max_sector_size_in_kb = 256; + flash_size_reg = 0x1FF0F442; + break; default: LOG_WARNING("Cannot identify target as a STM32 family."); return ERROR_FAIL; } /* get flash size from target. */ - retval = target_read_u16(target, 0x1FFF7A22, &flash_size_in_kb); + retval = target_read_u16(target, flash_size_reg, &flash_size_in_kb); /* failed reading flash size or flash size invalid (early silicon), * default to max target family */ @@ -805,19 +831,33 @@ static int stm32x_probe(struct flash_bank *bank) flash_size_in_kb = stm32x_info->user_bank_size / 1024; } - /* only devices with > 1024kB have dual banks */ - if (flash_size_in_kb > 1024) - stm32x_info->has_large_mem = true; - LOG_INFO("flash size = %dkbytes", flash_size_in_kb); /* did we assign flash size? */ assert(flash_size_in_kb != 0xffff); /* calculate numbers of pages */ - int num_pages = (flash_size_in_kb / 128) + 4; + int num_pages = (flash_size_in_kb / max_sector_size_in_kb) + 4; + + /* Devices with > 1024 kiByte always are dual-banked */ + if (flash_size_in_kb > 1024) + stm32x_info->has_large_mem = true; + + /* F42x/43x 1024 kiByte devices have a dual bank option */ + if ((device_id & 0xfff) == 0x419 && (flash_size_in_kb == 1024)) { + uint32_t optiondata; + retval = target_read_u32(target, STM32_FLASH_OPTCR, &optiondata); + if (retval != ERROR_OK) { + LOG_DEBUG("unable to read option bytes"); + return retval; + } + if (optiondata & (1 << OPT_DB1M)) { + stm32x_info->has_large_mem = true; + LOG_INFO("Dual Bank 1024 kiB STM32F42x/43x found"); + } + } - /* check for larger 2048 bytes devices */ + /* check for dual-banked devices */ if (stm32x_info->has_large_mem) num_pages += 4; @@ -835,22 +875,25 @@ static int stm32x_probe(struct flash_bank *bank) bank->size = 0; /* fixed memory */ - setup_sector(bank, 0, 4, 16 * 1024); - setup_sector(bank, 4, 1, 64 * 1024); - - /* dynamic memory */ - setup_sector(bank, 4 + 1, MIN(12, num_pages) - 5, 128 * 1024); + setup_sector(bank, 0, 4, (max_sector_size_in_kb / 8) * 1024); + setup_sector(bank, 4, 1, (max_sector_size_in_kb / 2) * 1024); if (stm32x_info->has_large_mem) { - - /* fixed memory for larger devices */ - setup_sector(bank, 12, 4, 16 * 1024); - setup_sector(bank, 16, 1, 64 * 1024); - - /* dynamic memory for larger devices */ - setup_sector(bank, 16 + 1, num_pages - 5 - 12, 128 * 1024); + if (flash_size_in_kb == 1024) { + setup_sector(bank, 5, 3, 128 * 1024); + setup_sector(bank, 12, 4, 16 * 1024); + setup_sector(bank, 16, 1, 64 * 1024); + setup_sector(bank, 17, 3, 128 * 1024); + } else { + setup_sector(bank, 5, 7, 128 * 1024); + setup_sector(bank, 12, 4, 16 * 1024); + setup_sector(bank, 16, 1, 64 * 1024); + setup_sector(bank, 17, 7, 128 * 1024); + } + } else { + setup_sector(bank, 4 + 1, MIN(12, num_pages) - 5, + max_sector_size_in_kb * 1024); } - for (i = 0; i < num_pages; i++) { bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = 0; @@ -926,11 +969,30 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size) case 0x1003: rev_str = "Y"; break; + + case 0x1007: + rev_str = "1"; + break; + + case 0x2001: + rev_str = "3"; + break; } break; + case 0x421: + device_str = "STM32F446"; + switch (rev_id) { + case 0x1000: + rev_str = "A"; + break; + } + break; case 0x423: + case 0x431: case 0x433: + case 0x458: + case 0x441: device_str = "STM32F4xx (Low Power)"; switch (rev_id) { @@ -944,8 +1006,31 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size) } break; + case 0x449: + device_str = "STM32F7[4|5]x"; + + switch (rev_id) { + case 0x1000: + rev_str = "A"; + break; + + case 0x1001: + rev_str = "Z"; + break; + } + break; + case 0x434: + device_str = "STM32F46x/F47x"; + + switch (rev_id) { + case 0x1000: + rev_str = "A"; + break; + } + break; + default: - snprintf(buf, buf_size, "Cannot identify target as a STM32F2/4\n"); + snprintf(buf, buf_size, "Cannot identify target as a STM32F2/4/7\n"); return ERROR_FAIL; } @@ -1041,6 +1126,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command) static int stm32x_mass_erase(struct flash_bank *bank) { int retval; + uint32_t flash_mer; struct target *target = bank->target; struct stm32x_flash_bank *stm32x_info = NULL; @@ -1057,13 +1143,14 @@ static int stm32x_mass_erase(struct flash_bank *bank) /* mass erase flash memory */ if (stm32x_info->has_large_mem) - retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER | FLASH_MER1); + flash_mer = FLASH_MER | FLASH_MER1; else - retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER); + flash_mer = FLASH_MER; + retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), flash_mer); if (retval != ERROR_OK) return retval; retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), - FLASH_MER | FLASH_STRT); + flash_mer | FLASH_STRT); if (retval != ERROR_OK) return retval;