X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstm32f1x.c;h=baf6b2752c10ea8ec252cfea03285989fece8f69;hp=5d9da90351c16e024a62c91d0601e469f9d82374;hb=c89eb70a20230edfc79153c17c0c4c3f9dc64819;hpb=16b6b5e7a86353dbc0c4823fe3d772c0faca7c1c
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 5d9da90351..baf6b2752c 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -23,6 +23,7 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
+
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -101,15 +102,13 @@
#define KEY1 0x45670123
#define KEY2 0xCDEF89AB
-struct stm32x_options
-{
+struct stm32x_options {
uint16_t RDP;
uint16_t user_options;
uint16_t protection[4];
};
-struct stm32x_flash_bank
-{
+struct stm32x_flash_bank {
struct stm32x_options option_bytes;
struct working_area *write_algorithm;
int ppage_size;
@@ -121,6 +120,7 @@ struct stm32x_flash_bank
};
static int stm32x_mass_erase(struct flash_bank *bank);
+static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id);
/* flash bank stm32x 0 0
*/
@@ -129,13 +129,11 @@ FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command)
struct stm32x_flash_bank *stm32x_info;
if (CMD_ARGC < 6)
- {
return ERROR_COMMAND_SYNTAX_ERROR;
- }
stm32x_info = malloc(sizeof(struct stm32x_flash_bank));
- bank->driver_priv = stm32x_info;
+ bank->driver_priv = stm32x_info;
stm32x_info->write_algorithm = NULL;
stm32x_info->probed = 0;
stm32x_info->has_dual_banks = false;
@@ -163,37 +161,32 @@ static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
int retval = ERROR_OK;
/* wait for busy to clear */
- for (;;)
- {
+ for (;;) {
retval = stm32x_get_flash_status(bank, &status);
if (retval != ERROR_OK)
return retval;
LOG_DEBUG("status: 0x%" PRIx32 "", status);
if ((status & FLASH_BSY) == 0)
break;
- if (timeout-- <= 0)
- {
+ if (timeout-- <= 0) {
LOG_ERROR("timed out waiting for flash");
return ERROR_FAIL;
}
alive_sleep(1);
}
- if (status & FLASH_WRPRTERR)
- {
+ if (status & FLASH_WRPRTERR) {
LOG_ERROR("stm32x device protected");
retval = ERROR_FAIL;
}
- if (status & FLASH_PGERR)
- {
+ if (status & FLASH_PGERR) {
LOG_ERROR("stm32x device programming failed");
retval = ERROR_FAIL;
}
/* Clear but report errors */
- if (status & (FLASH_WRPRTERR | FLASH_PGERR))
- {
+ if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
/* If this operation fails, we ignore it and report the original
* retval
*/
@@ -209,8 +202,7 @@ int stm32x_check_operation_supported(struct flash_bank *bank)
/* if we have a dual flash bank device then
* we need to perform option byte stuff on bank0 only */
- if (stm32x_info->register_base != FLASH_REG_BASE_B0)
- {
+ if (stm32x_info->register_base != FLASH_REG_BASE_B0) {
LOG_ERROR("Option Byte Operation's must use bank0");
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -395,8 +387,7 @@ static int stm32x_protect_check(struct flash_bank *bank)
int num_bits;
int set;
- if (target->state != TARGET_HALTED)
- {
+ if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -415,8 +406,7 @@ static int stm32x_protect_check(struct flash_bank *bank)
* high density - each protection bit is for 2 * 2K pages */
num_bits = (bank->num_sectors / stm32x_info->ppage_size);
- if (stm32x_info->ppage_size == 2)
- {
+ if (stm32x_info->ppage_size == 2) {
/* high density flash/connectivity line protection */
set = 1;
@@ -427,15 +417,12 @@ static int stm32x_protect_check(struct flash_bank *bank)
/* bit 31 controls sector 62 - 255 protection for high density
* bit 31 controls sector 62 - 127 protection for connectivity line */
for (s = 62; s < bank->num_sectors; s++)
- {
bank->sectors[s].is_protected = set;
- }
if (bank->num_sectors > 61)
num_bits = 31;
- for (i = 0; i < num_bits; i++)
- {
+ for (i = 0; i < num_bits; i++) {
set = 1;
if (protection & (1 << i))
@@ -444,12 +431,9 @@ static int stm32x_protect_check(struct flash_bank *bank)
for (s = 0; s < stm32x_info->ppage_size; s++)
bank->sectors[(i * stm32x_info->ppage_size) + s].is_protected = set;
}
- }
- else
- {
+ } else {
/* low/medium density flash protection */
- for (i = 0; i < num_bits; i++)
- {
+ for (i = 0; i < num_bits; i++) {
set = 1;
if (protection & (1 << i))
@@ -468,16 +452,13 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last)
struct target *target = bank->target;
int i;
- if (bank->target->state != TARGET_HALTED)
- {
+ if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if ((first == 0) && (last == (bank->num_sectors - 1)))
- {
return stm32x_mass_erase(bank);
- }
/* unlock flash registers */
int retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY1);
@@ -487,8 +468,7 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last)
if (retval != ERROR_OK)
return retval;
- for (i = first; i <= last; i++)
- {
+ for (i = first; i <= last; i++) {
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PER);
if (retval != ERROR_OK)
return retval;
@@ -526,8 +506,7 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
stm32x_info = bank->driver_priv;
- if (target->state != TARGET_HALTED)
- {
+ if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -536,14 +515,12 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
if (ERROR_OK != retval)
return retval;
- if ((first % stm32x_info->ppage_size) != 0)
- {
+ if ((first % stm32x_info->ppage_size) != 0) {
LOG_WARNING("aligned start protect sector to a %d sector boundary",
stm32x_info->ppage_size);
first = first - (first % stm32x_info->ppage_size);
}
- if (((last + 1) % stm32x_info->ppage_size) != 0)
- {
+ if (((last + 1) % stm32x_info->ppage_size) != 0) {
LOG_WARNING("aligned end protect sector to a %d sector boundary",
stm32x_info->ppage_size);
last++;
@@ -562,13 +539,11 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
prot_reg[2] = (uint16_t)(protection >> 16);
prot_reg[3] = (uint16_t)(protection >> 24);
- if (stm32x_info->ppage_size == 2)
- {
+ if (stm32x_info->ppage_size == 2) {
/* high density flash */
/* bit 7 controls sector 62 - 255 protection */
- if (last > 61)
- {
+ if (last > 61) {
if (set)
prot_reg[3] &= ~(1 << 7);
else
@@ -580,8 +555,7 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
if (last > 61)
last = 61;
- for (i = first; i <= last; i++)
- {
+ for (i = first; i <= last; i++) {
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
@@ -590,12 +564,9 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
else
prot_reg[reg] |= (1 << bit);
}
- }
- else
- {
+ } else {
/* medium density flash */
- for (i = first; i <= last; i++)
- {
+ for (i = first; i <= last; i++) {
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
@@ -606,7 +577,8 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
}
}
- if ((status = stm32x_erase_options(bank)) != ERROR_OK)
+ status = stm32x_erase_options(bank);
+ if (status != ERROR_OK)
return status;
stm32x_info->option_bytes.protection[0] = prot_reg[0];
@@ -632,60 +604,61 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
/* see contrib/loaders/flash/stm32f1x.S for src */
static const uint8_t stm32x_flash_write_code[] = {
- /* #define STM32_FLASH_CR_OFFSET 0x10 */
/* #define STM32_FLASH_SR_OFFSET 0x0C */
/* wait_fifo: */
- 0x16, 0x68, /* ldr r6, [r2, #0] */
- 0x00, 0x2e, /* cmp r6, #0 */
- 0x1a, 0xd0, /* beq exit */
- 0x55, 0x68, /* ldr r5, [r2, #4] */
- 0xb5, 0x42, /* cmp r5, r6 */
- 0xf9, 0xd0, /* beq wait_fifo */
- 0x01, 0x26, /* movs r6, #1 */
- 0x06, 0x61, /* str r6, [r0, #STM32_FLASH_CR_OFFSET] */
- 0x35, 0xf8, 0x02, 0x6b, /* ldrh r6, [r5], #2 */
- 0x24, 0xf8, 0x02, 0x6b, /* strh r6, [r4], #2 */
+ 0x16, 0x68, /* ldr r6, [r2, #0] */
+ 0x00, 0x2e, /* cmp r6, #0 */
+ 0x18, 0xd0, /* beq exit */
+ 0x55, 0x68, /* ldr r5, [r2, #4] */
+ 0xb5, 0x42, /* cmp r5, r6 */
+ 0xf9, 0xd0, /* beq wait_fifo */
+ 0x2e, 0x88, /* ldrh r6, [r5, #0] */
+ 0x26, 0x80, /* strh r6, [r4, #0] */
+ 0x02, 0x35, /* adds r5, #2 */
+ 0x02, 0x34, /* adds r4, #2 */
/* busy: */
- 0xc6, 0x68, /* ldr r6, [r0, #STM32_FLASH_SR_OFFSET] */
- 0x16, 0xf0, 0x01, 0x0f, /* tst r6, #1 */
- 0xfb, 0xd1, /* bne busy */
- 0x16, 0xf0, 0x14, 0x0f, /* tst r6, #0x14 */
- 0x07, 0xd1, /* bne error */
- 0x9d, 0x42, /* cmp r5, r3 */
- 0x28, 0xbf, /* it cs */
- 0x02, 0xf1, 0x08, 0x05, /* addcs r5, r2, #8 */
- 0x55, 0x60, /* str r5, [r2, #4] */
- 0x01, 0x39, /* subs r1, r1, #1 */
- 0x19, 0xb1, /* cbz r1, exit */
- 0xe4, 0xe7, /* b wait_fifo */
+ 0xc6, 0x68, /* ldr r6, [r0, #STM32_FLASH_SR_OFFSET] */
+ 0x01, 0x27, /* movs r7, #1 */
+ 0x3e, 0x42, /* tst r6, r7 */
+ 0xfb, 0xd1, /* bne busy */
+ 0x14, 0x27, /* movs r7, #0x14 */
+ 0x3e, 0x42, /* tst r6, r7 */
+ 0x08, 0xd1, /* bne error */
+ 0x9d, 0x42, /* cmp r5, r3 */
+ 0x01, 0xd3, /* bcc no_wrap */
+ 0x15, 0x46, /* mov r5, r2 */
+ 0x08, 0x35, /* adds r5, #8 */
+ /* no_wrap: */
+ 0x55, 0x60, /* str r5, [r2, #4] */
+ 0x01, 0x39, /* subs r1, r1, #1 */
+ 0x00, 0x29, /* cmp r1, #0 */
+ 0x02, 0xd0, /* beq exit */
+ 0xe5, 0xe7, /* b wait_fifo */
/* error: */
- 0x00, 0x20, /* movs r0, #0 */
- 0xc2, 0xf8, 0x02, 0x00, /* str r0, [r2, #2] */
+ 0x00, 0x20, /* movs r0, #0 */
+ 0x50, 0x60, /* str r0, [r2, #4] */
/* exit: */
- 0x30, 0x46, /* mov r0, r6 */
- 0x00, 0xbe, /* bkpt #0 */
+ 0x30, 0x46, /* mov r0, r6 */
+ 0x00, 0xbe, /* bkpt #0 */
};
/* flash write code */
if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code),
- &stm32x_info->write_algorithm) != ERROR_OK)
- {
+ &stm32x_info->write_algorithm) != ERROR_OK) {
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
- if ((retval = target_write_buffer(target, stm32x_info->write_algorithm->address,
- sizeof(stm32x_flash_write_code),
- (uint8_t*)stm32x_flash_write_code)) != ERROR_OK)
+ retval = target_write_buffer(target, stm32x_info->write_algorithm->address,
+ sizeof(stm32x_flash_write_code), (uint8_t *)stm32x_flash_write_code);
+ if (retval != ERROR_OK)
return retval;
/* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK)
- {
+ while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
buffer_size /= 2;
- buffer_size &= ~3UL; // Make sure it's 4 byte aligned
- if (buffer_size <= 256)
- {
+ buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
+ if (buffer_size <= 256) {
/* if we already allocated the writing code, but failed to get a
* buffer, free the algorithm */
if (stm32x_info->write_algorithm)
@@ -696,23 +669,6 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
}
};
- /* Set up working area. First word is write pointer, second word is read pointer,
- * rest is fifo data area. */
- uint32_t wp_addr = source->address;
- uint32_t rp_addr = source->address + 4;
- uint32_t fifo_start_addr = source->address + 8;
- uint32_t fifo_end_addr = source->address + source->size;
-
- uint32_t wp = fifo_start_addr;
- uint32_t rp = fifo_start_addr;
-
- retval = target_write_u32(target, wp_addr, wp);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, rp_addr, rp);
- if (retval != ERROR_OK)
- return retval;
-
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (halfword-16bit) */
init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer start */
@@ -728,120 +684,30 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARMV7M_MODE_ANY;
- /* Start up algorithm on target and let it idle while writing the first chunk */
- if ((retval = target_start_algorithm(target, 0, NULL, 5, reg_params,
- stm32x_info->write_algorithm->address,
- 0,
- &armv7m_info)) != ERROR_OK)
- {
- LOG_ERROR("error starting stm32x flash write algorithm");
- goto cleanup;
- }
+ retval = target_run_flash_async_algorithm(target, buffer, count, 2,
+ 0, NULL,
+ 5, reg_params,
+ source->address, source->size,
+ stm32x_info->write_algorithm->address, 0,
+ &armv7m_info);
- while (count > 0)
- {
- retval = target_read_u32(target, rp_addr, &rp);
- if (retval != ERROR_OK)
- {
- LOG_ERROR("failed to get read pointer");
- break;
- }
-
- LOG_DEBUG("count 0x%"PRIx32" wp 0x%"PRIx32" rp 0x%"PRIx32, count, wp, rp);
-
- if (rp == 0)
- {
- LOG_ERROR("flash write algorithm aborted by target");
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- if ((rp & 1) || rp < fifo_start_addr || rp >= fifo_end_addr)
- {
- LOG_ERROR("corrupted fifo read pointer 0x%"PRIx32, rp);
- break;
- }
-
- /* Count the number of bytes available in the fifo without
- * crossing the wrap around. Make sure to not fill it completely,
- * because that would make wp == rp and that's the empty condition. */
- uint32_t thisrun_bytes;
- if (rp > wp)
- thisrun_bytes = rp - wp - 2;
- else if (rp > fifo_start_addr)
- thisrun_bytes = fifo_end_addr - wp;
- else
- thisrun_bytes = fifo_end_addr - wp - 2;
-
- if (thisrun_bytes == 0)
- {
- /* Throttle polling a bit if transfer is (much) faster than flash
- * programming. The exact delay shouldn't matter as long as it's
- * less than buffer size / flash speed. This is very unlikely to
- * run when using high latency connections such as USB. */
- alive_sleep(10);
- continue;
- }
-
- /* Limit to the amount of data we actually want to write */
- if (thisrun_bytes > count * 2)
- thisrun_bytes = count * 2;
-
- /* Write data to fifo */
- retval = target_write_buffer(target, wp, thisrun_bytes, buffer);
- if (retval != ERROR_OK)
- break;
-
- /* Update counters and wrap write pointer */
- buffer += thisrun_bytes;
- count -= thisrun_bytes / 2;
- wp += thisrun_bytes;
- if (wp >= fifo_end_addr)
- wp = fifo_start_addr;
-
- /* Store updated write pointer to target */
- retval = target_write_u32(target, wp_addr, wp);
- if (retval != ERROR_OK)
- break;
- }
-
- if (retval != ERROR_OK)
- {
- /* abort flash write algorithm on target */
- target_write_u32(target, wp_addr, 0);
- }
-
- int retval2;
- if ((retval2 = target_wait_algorithm(target, 0, NULL, 5, reg_params,
- 0,
- 10000,
- &armv7m_info)) != ERROR_OK)
- {
- LOG_ERROR("error waiting for stm32x flash write algorithm");
- retval = retval2;
- }
-
- if (retval == ERROR_FLASH_OPERATION_FAILED)
- {
+ if (retval == ERROR_FLASH_OPERATION_FAILED) {
LOG_ERROR("flash write failed at address 0x%"PRIx32,
buf_get_u32(reg_params[4].value, 0, 32));
- if (buf_get_u32(reg_params[0].value, 0, 32) & FLASH_PGERR)
- {
+ if (buf_get_u32(reg_params[0].value, 0, 32) & FLASH_PGERR) {
LOG_ERROR("flash memory not erased before writing");
/* Clear but report errors */
- target_write_u32(target, STM32_FLASH_SR_B0, FLASH_PGERR);
+ target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR), FLASH_PGERR);
}
- if (buf_get_u32(reg_params[0].value, 0, 32) & FLASH_WRPRTERR)
- {
+ if (buf_get_u32(reg_params[0].value, 0, 32) & FLASH_WRPRTERR) {
LOG_ERROR("flash memory write protected");
/* Clear but report errors */
- target_write_u32(target, STM32_FLASH_SR_B0, FLASH_WRPRTERR);
+ target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR), FLASH_WRPRTERR);
}
}
-cleanup:
target_free_working_area(target, source);
target_free_working_area(target, stm32x_info->write_algorithm);
@@ -858,103 +724,158 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
- uint32_t words_remaining = (count / 2);
- uint32_t bytes_remaining = (count & 0x00000001);
- uint32_t address = bank->base + offset;
- uint32_t bytes_written = 0;
- int retval;
+ uint8_t *new_buffer = NULL;
- if (bank->target->state != TARGET_HALTED)
- {
+ if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
- if (offset & 0x1)
- {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
+ if (offset & 0x1) {
+ LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
+ /* If there's an odd number of bytes, the data has to be padded. Duplicate
+ * the buffer and use the normal code path with a single block write since
+ * it's probably cheaper than to special case the last odd write using
+ * discrete accesses. */
+ if (count & 1) {
+ new_buffer = malloc(count + 1);
+ if (new_buffer == NULL) {
+ LOG_ERROR("odd number of bytes to write and no memory for padding buffer");
+ return ERROR_FAIL;
+ }
+ LOG_INFO("odd number of bytes to write, padding with 0xff");
+ buffer = memcpy(new_buffer, buffer, count);
+ buffer[count++] = 0xff;
+ }
+
+ uint32_t words_remaining = count / 2;
+ int retval, retval2;
+
/* unlock flash registers */
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY1);
if (retval != ERROR_OK)
- return retval;
+ goto cleanup;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
if (retval != ERROR_OK)
- return retval;
+ goto cleanup;
- /* multiple half words (2-byte) to be programmed? */
- if (words_remaining > 0)
- {
- /* try using a block write */
- if ((retval = stm32x_write_block(bank, buffer, offset, words_remaining)) != ERROR_OK)
- {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
- {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single dword accesses */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
- }
- }
- else
- {
- buffer += words_remaining * 2;
- address += words_remaining * 2;
- words_remaining = 0;
+ retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
+ if (retval != ERROR_OK)
+ goto cleanup;
+
+ /* try using a block write */
+ retval = stm32x_write_block(bank, buffer, offset, words_remaining);
+
+ if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
+ /* if block write failed (no sufficient working area),
+ * we use normal (slow) single halfword accesses */
+ LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
+
+ while (words_remaining > 0) {
+ uint16_t value;
+ memcpy(&value, buffer, sizeof(uint16_t));
+
+ retval = target_write_u16(target, bank->base + offset, value);
+ if (retval != ERROR_OK)
+ goto reset_pg_and_lock;
+
+ retval = stm32x_wait_status_busy(bank, 5);
+ if (retval != ERROR_OK)
+ goto reset_pg_and_lock;
+
+ words_remaining--;
+ buffer += 2;
+ offset += 2;
}
}
- if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
- return retval;
+reset_pg_and_lock:
+ retval2 = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
+ if (retval == ERROR_OK)
+ retval = retval2;
- while (words_remaining > 0)
- {
- uint16_t value;
- memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
+cleanup:
+ if (new_buffer)
+ free(new_buffer);
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u16(target, address, value);
- if (retval != ERROR_OK)
- return retval;
+ return retval;
+}
- retval = stm32x_wait_status_busy(bank, 5);
- if (retval != ERROR_OK)
- return retval;
+static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
+{
+ /* This check the device CPUID core register to detect
+ * the M0 from the M3 devices. */
+
+ struct target *target = bank->target;
+ uint32_t cpuid, device_id_register = 0;
- bytes_written += 2;
- words_remaining--;
- address += 2;
+ /* Get the CPUID from the ARM Core
+ * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0432c/DDI0432C_cortex_m0_r0p0_trm.pdf 4.2.1 */
+ int retval = target_read_u32(target, 0xE000ED00, &cpuid);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (((cpuid >> 4) & 0xFFF) == 0xC20) {
+ /* 0xC20 is M0 devices */
+ device_id_register = 0x40015800;
+ } else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
+ /* 0xC23 is M3 devices */
+ device_id_register = 0xE0042000;
+ } else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
+ /* 0xC24 is M4 devices */
+ device_id_register = 0xE0042000;
+ } else {
+ LOG_ERROR("Cannot identify target as a stm32x");
+ return ERROR_FAIL;
}
- if (bytes_remaining)
- {
- uint16_t value = 0xffff;
- memcpy(&value, buffer + bytes_written, bytes_remaining);
+ /* read stm32 device id register */
+ retval = target_read_u32(target, device_id_register, device_id);
+ if (retval != ERROR_OK)
+ return retval;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u16(target, address, value);
- if (retval != ERROR_OK)
- return retval;
+ return retval;
+}
- retval = stm32x_wait_status_busy(bank, 5);
- if (retval != ERROR_OK)
- return retval;
+static int stm32x_get_flash_size(struct flash_bank *bank, uint16_t *flash_size_in_kb)
+{
+ struct target *target = bank->target;
+ uint32_t cpuid, flash_size_reg;
+
+ int retval = target_read_u32(target, 0xE000ED00, &cpuid);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (((cpuid >> 4) & 0xFFF) == 0xC20) {
+ /* 0xC20 is M0 devices */
+ flash_size_reg = 0x1FFFF7CC;
+ } else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
+ /* 0xC23 is M3 devices */
+ flash_size_reg = 0x1FFFF7E0;
+ } else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
+ /* 0xC24 is M4 devices */
+ flash_size_reg = 0x1FFFF7CC;
+ } else {
+ LOG_ERROR("Cannot identify target as a stm32x");
+ return ERROR_FAIL;
}
- return target_write_u32(target, STM32_FLASH_CR_B0, FLASH_LOCK);
+ retval = target_read_u16(target, flash_size_reg, flash_size_in_kb);
+ if (retval != ERROR_OK)
+ return retval;
+
+ return retval;
}
static int stm32x_probe(struct flash_bank *bank)
{
- struct target *target = bank->target;
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
int i;
uint16_t flash_size_in_kb;
+ uint16_t max_flash_size_in_kb;
uint32_t device_id;
int page_size;
uint32_t base_address = 0x08000000;
@@ -963,146 +884,93 @@ static int stm32x_probe(struct flash_bank *bank)
stm32x_info->register_base = FLASH_REG_BASE_B0;
/* read stm32 device id register */
- int retval = target_read_u32(target, 0xE0042000, &device_id);
+ int retval = stm32x_get_device_id(bank, &device_id);
if (retval != ERROR_OK)
return retval;
- LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
- /* get flash size from target. */
- retval = target_read_u16(target, 0x1FFFF7E0, &flash_size_in_kb);
- if (retval != ERROR_OK)
- {
- LOG_WARNING("failed reading flash size, default to max target family");
- /* failed reading flash size, default to max target family */
- flash_size_in_kb = 0xffff;
- }
+ LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
- if ((device_id & 0x7ff) == 0x410)
- {
- /* medium density - we have 1k pages
- * 4 pages for a protection area */
+ /* set page size, protection granularity and max flash size depending on family */
+ switch (device_id & 0xfff) {
+ case 0x410: /* medium density */
page_size = 1024;
stm32x_info->ppage_size = 4;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff)
- {
- /* number of sectors incorrect on revA */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash");
- flash_size_in_kb = 128;
- }
- }
- else if ((device_id & 0x7ff) == 0x412)
- {
- /* low density - we have 1k pages
- * 4 pages for a protection area */
+ max_flash_size_in_kb = 128;
+ break;
+ case 0x412: /* low density */
page_size = 1024;
stm32x_info->ppage_size = 4;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff)
- {
- /* number of sectors incorrect on revA */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 32k flash");
- flash_size_in_kb = 32;
- }
- }
- else if ((device_id & 0x7ff) == 0x414)
- {
- /* high density - we have 2k pages
- * 2 pages for a protection area */
+ max_flash_size_in_kb = 32;
+ break;
+ case 0x414: /* high density */
page_size = 2048;
stm32x_info->ppage_size = 2;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff)
- {
- /* number of sectors incorrect on revZ */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 512k flash");
- flash_size_in_kb = 512;
- }
- }
- else if ((device_id & 0x7ff) == 0x418)
- {
- /* connectivity line density - we have 2k pages
- * 2 pages for a protection area */
+ max_flash_size_in_kb = 512;
+ break;
+ case 0x418: /* connectivity line density */
page_size = 2048;
stm32x_info->ppage_size = 2;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff)
- {
- /* number of sectors incorrect on revZ */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 256k flash");
- flash_size_in_kb = 256;
- }
- }
- else if ((device_id & 0x7ff) == 0x420)
- {
- /* value line density - we have 1k pages
- * 4 pages for a protection area */
+ max_flash_size_in_kb = 256;
+ break;
+ case 0x420: /* value line density */
page_size = 1024;
stm32x_info->ppage_size = 4;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff)
- {
- /* number of sectors may be incorrrect on early silicon */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash");
- flash_size_in_kb = 128;
- }
- }
- else if ((device_id & 0x7ff) == 0x428)
- {
- /* value line High density - we have 2k pages
- * 4 pages for a protection area */
+ max_flash_size_in_kb = 128;
+ break;
+ case 0x422: /* stm32f30x */
+ page_size = 2048;
+ stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 256;
+ break;
+ case 0x428: /* value line High density */
page_size = 2048;
stm32x_info->ppage_size = 4;
-
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff)
- {
- /* number of sectors may be incorrrect on early silicon */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash");
- flash_size_in_kb = 128;
- }
- }
-
- else if ((device_id & 0x7ff) == 0x430)
- {
- /* xl line density - we have 2k pages
- * 2 pages for a protection area */
+ max_flash_size_in_kb = 128;
+ break;
+ case 0x430: /* xl line density (dual flash banks) */
page_size = 2048;
stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 1024;
stm32x_info->has_dual_banks = true;
+ break;
+ case 0x432: /* stm32f37x */
+ page_size = 2048;
+ stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 256;
+ break;
+ case 0x440: /* stm32f0x */
+ page_size = 1024;
+ stm32x_info->ppage_size = 4;
+ max_flash_size_in_kb = 64;
+ break;
+ default:
+ LOG_WARNING("Cannot identify target as a STM32 family.");
+ return ERROR_FAIL;
+ }
- /* check for early silicon */
- if (flash_size_in_kb == 0xffff)
- {
- /* number of sectors may be incorrrect on early silicon */
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 1024k flash");
- flash_size_in_kb = 1024;
- }
+ /* get flash size from target. */
+ retval = stm32x_get_flash_size(bank, &flash_size_in_kb);
+
+ /* failed reading flash size or flash size invalid (early silicon),
+ * default to max target family */
+ if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
+ LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
+ max_flash_size_in_kb);
+ flash_size_in_kb = max_flash_size_in_kb;
+ }
+ if (stm32x_info->has_dual_banks) {
/* split reported size into matching bank */
- if (bank->base != 0x08080000)
- {
+ if (bank->base != 0x08080000) {
/* bank 0 will be fixed 512k */
flash_size_in_kb = 512;
- }
- else
- {
+ } else {
flash_size_in_kb -= 512;
/* bank1 also uses a register offset */
stm32x_info->register_base = FLASH_REG_BASE_B1;
base_address = 0x08080000;
}
}
- else
- {
- LOG_WARNING("Cannot identify target as a STM32 family.");
- return ERROR_FAIL;
- }
LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
@@ -1115,8 +983,7 @@ static int stm32x_probe(struct flash_bank *bank)
/* check that calculation result makes sense */
assert(num_pages > 0);
- if (bank->sectors)
- {
+ if (bank->sectors) {
free(bank->sectors);
bank->sectors = NULL;
}
@@ -1126,8 +993,7 @@ static int stm32x_probe(struct flash_bank *bank)
bank->num_sectors = num_pages;
bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
- for (i = 0; i < num_pages; i++)
- {
+ for (i = 0; i < num_pages; i++) {
bank->sectors[i].offset = i * page_size;
bank->sectors[i].size = page_size;
bank->sectors[i].is_erased = -1;
@@ -1156,23 +1022,20 @@ COMMAND_HANDLER(stm32x_handle_part_id_command)
static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
{
- struct target *target = bank->target;
uint32_t device_id;
int printed;
- /* read stm32 device id register */
- int retval = target_read_u32(target, 0xE0042000, &device_id);
+ /* read stm32 device id register */
+ int retval = stm32x_get_device_id(bank, &device_id);
if (retval != ERROR_OK)
return retval;
- if ((device_id & 0x7ff) == 0x410)
- {
+ if ((device_id & 0xfff) == 0x410) {
printed = snprintf(buf, buf_size, "stm32x (Medium Density) - Rev: ");
buf += printed;
buf_size -= printed;
- switch (device_id >> 16)
- {
+ switch (device_id >> 16) {
case 0x0000:
snprintf(buf, buf_size, "A");
break;
@@ -1193,15 +1056,12 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
snprintf(buf, buf_size, "unknown");
break;
}
- }
- else if ((device_id & 0x7ff) == 0x412)
- {
+ } else if ((device_id & 0xfff) == 0x412) {
printed = snprintf(buf, buf_size, "stm32x (Low Density) - Rev: ");
buf += printed;
buf_size -= printed;
- switch (device_id >> 16)
- {
+ switch (device_id >> 16) {
case 0x1000:
snprintf(buf, buf_size, "A");
break;
@@ -1210,15 +1070,12 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
snprintf(buf, buf_size, "unknown");
break;
}
- }
- else if ((device_id & 0x7ff) == 0x414)
- {
+ } else if ((device_id & 0xfff) == 0x414) {
printed = snprintf(buf, buf_size, "stm32x (High Density) - Rev: ");
buf += printed;
buf_size -= printed;
- switch (device_id >> 16)
- {
+ switch (device_id >> 16) {
case 0x1000:
snprintf(buf, buf_size, "A");
break;
@@ -1231,15 +1088,12 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
snprintf(buf, buf_size, "unknown");
break;
}
- }
- else if ((device_id & 0x7ff) == 0x418)
- {
+ } else if ((device_id & 0xfff) == 0x418) {
printed = snprintf(buf, buf_size, "stm32x (Connectivity) - Rev: ");
buf += printed;
buf_size -= printed;
- switch (device_id >> 16)
- {
+ switch (device_id >> 16) {
case 0x1000:
snprintf(buf, buf_size, "A");
break;
@@ -1252,15 +1106,12 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
snprintf(buf, buf_size, "unknown");
break;
}
- }
- else if ((device_id & 0x7ff) == 0x420)
- {
+ } else if ((device_id & 0xfff) == 0x420) {
printed = snprintf(buf, buf_size, "stm32x (Value) - Rev: ");
buf += printed;
buf_size -= printed;
- switch (device_id >> 16)
- {
+ switch (device_id >> 16) {
case 0x1000:
snprintf(buf, buf_size, "A");
break;
@@ -1273,15 +1124,26 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
snprintf(buf, buf_size, "unknown");
break;
}
- }
- else if ((device_id & 0x7ff) == 0x428)
- {
+ } else if ((device_id & 0xfff) == 0x422) {
+ printed = snprintf(buf, buf_size, "stm32f30x - Rev: ");
+ buf += printed;
+ buf_size -= printed;
+
+ switch (device_id >> 16) {
+ case 0x1000:
+ snprintf(buf, buf_size, "1.0");
+ break;
+
+ default:
+ snprintf(buf, buf_size, "unknown");
+ break;
+ }
+ } else if ((device_id & 0xfff) == 0x428) {
printed = snprintf(buf, buf_size, "stm32x (Value HD) - Rev: ");
buf += printed;
buf_size -= printed;
- switch (device_id >> 16)
- {
+ switch (device_id >> 16) {
case 0x1000:
snprintf(buf, buf_size, "A");
break;
@@ -1294,15 +1156,12 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
snprintf(buf, buf_size, "unknown");
break;
}
- }
- else if ((device_id & 0x7ff) == 0x430)
- {
+ } else if ((device_id & 0xfff) == 0x430) {
printed = snprintf(buf, buf_size, "stm32x (XL) - Rev: ");
buf += printed;
buf_size -= printed;
- switch (device_id >> 16)
- {
+ switch (device_id >> 16) {
case 0x1000:
snprintf(buf, buf_size, "A");
break;
@@ -1311,9 +1170,39 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
snprintf(buf, buf_size, "unknown");
break;
}
- }
- else
- {
+ } else if ((device_id & 0xfff) == 0x432) {
+ printed = snprintf(buf, buf_size, "stm32f37x - Rev: ");
+ buf += printed;
+ buf_size -= printed;
+
+ switch (device_id >> 16) {
+ case 0x1000:
+ snprintf(buf, buf_size, "1.0");
+ break;
+
+ default:
+ snprintf(buf, buf_size, "unknown");
+ break;
+ }
+ } else if ((device_id & 0xfff) == 0x440) {
+ printed = snprintf(buf, buf_size, "stm32f0x - Rev: ");
+ buf += printed;
+ buf_size -= printed;
+
+ switch (device_id >> 16) {
+ case 0x1000:
+ snprintf(buf, buf_size, "1.0");
+ break;
+
+ case 0x2000:
+ snprintf(buf, buf_size, "2.0");
+ break;
+
+ default:
+ snprintf(buf, buf_size, "unknown");
+ break;
+ }
+ } else {
snprintf(buf, buf_size, "Cannot identify target as a stm32x\n");
return ERROR_FAIL;
}
@@ -1327,9 +1216,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
struct stm32x_flash_bank *stm32x_info = NULL;
if (CMD_ARGC < 1)
- {
return ERROR_COMMAND_SYNTAX_ERROR;
- }
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
@@ -1340,8 +1227,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
target = bank->target;
- if (target->state != TARGET_HALTED)
- {
+ if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -1350,8 +1236,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
if (ERROR_OK != retval)
return retval;
- if (stm32x_erase_options(bank) != ERROR_OK)
- {
+ if (stm32x_erase_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to erase options");
return ERROR_OK;
}
@@ -1359,8 +1244,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
/* set readout protection */
stm32x_info->option_bytes.RDP = 0;
- if (stm32x_write_options(bank) != ERROR_OK)
- {
+ if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to lock device");
return ERROR_OK;
}
@@ -1375,9 +1259,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
struct target *target = NULL;
if (CMD_ARGC < 1)
- {
return ERROR_COMMAND_SYNTAX_ERROR;
- }
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
@@ -1386,8 +1268,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
target = bank->target;
- if (target->state != TARGET_HALTED)
- {
+ if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -1396,14 +1277,12 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
if (ERROR_OK != retval)
return retval;
- if (stm32x_erase_options(bank) != ERROR_OK)
- {
+ if (stm32x_erase_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to unlock device");
return ERROR_OK;
}
- if (stm32x_write_options(bank) != ERROR_OK)
- {
+ if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to lock device");
return ERROR_OK;
}
@@ -1422,9 +1301,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
struct stm32x_flash_bank *stm32x_info = NULL;
if (CMD_ARGC < 1)
- {
return ERROR_COMMAND_SYNTAX_ERROR;
- }
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
@@ -1435,8 +1312,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
target = bank->target;
- if (target->state != TARGET_HALTED)
- {
+ if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -1450,32 +1326,31 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
return retval;
command_print(CMD_CTX, "Option Byte: 0x%" PRIx32 "", optionbyte);
- if (buf_get_u32((uint8_t*)&optionbyte, OPT_ERROR, 1))
+ if (buf_get_u32((uint8_t *)&optionbyte, OPT_ERROR, 1))
command_print(CMD_CTX, "Option Byte Complement Error");
- if (buf_get_u32((uint8_t*)&optionbyte, OPT_READOUT, 1))
+ if (buf_get_u32((uint8_t *)&optionbyte, OPT_READOUT, 1))
command_print(CMD_CTX, "Readout Protection On");
else
command_print(CMD_CTX, "Readout Protection Off");
- if (buf_get_u32((uint8_t*)&optionbyte, OPT_RDWDGSW, 1))
+ if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDWDGSW, 1))
command_print(CMD_CTX, "Software Watchdog");
else
command_print(CMD_CTX, "Hardware Watchdog");
- if (buf_get_u32((uint8_t*)&optionbyte, OPT_RDRSTSTOP, 1))
+ if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDRSTSTOP, 1))
command_print(CMD_CTX, "Stop: No reset generated");
else
command_print(CMD_CTX, "Stop: Reset generated");
- if (buf_get_u32((uint8_t*)&optionbyte, OPT_RDRSTSTDBY, 1))
+ if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDRSTSTDBY, 1))
command_print(CMD_CTX, "Standby: No reset generated");
else
command_print(CMD_CTX, "Standby: Reset generated");
- if (stm32x_info->has_dual_banks)
- {
- if (buf_get_u32((uint8_t*)&optionbyte, OPT_BFB2, 1))
+ if (stm32x_info->has_dual_banks) {
+ if (buf_get_u32((uint8_t *)&optionbyte, OPT_BFB2, 1))
command_print(CMD_CTX, "Boot: Bank 0");
else
command_print(CMD_CTX, "Boot: Bank 1");
@@ -1491,9 +1366,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
uint16_t optionbyte = 0xF8;
if (CMD_ARGC < 4)
- {
return ERROR_COMMAND_SYNTAX_ERROR;
- }
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
@@ -1504,8 +1377,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
target = bank->target;
- if (target->state != TARGET_HALTED)
- {
+ if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -1520,57 +1392,38 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
/* OPT_RDWDGSW */
if (strcmp(CMD_ARGV[1], "SWWDG") == 0)
- {
optionbyte |= (1 << 0);
- }
else /* REVISIT must be "HWWDG" then ... */
- {
optionbyte &= ~(1 << 0);
- }
/* OPT_RDRSTSTOP */
if (strcmp(CMD_ARGV[2], "NORSTSTOP") == 0)
- {
optionbyte |= (1 << 1);
- }
else /* REVISIT must be "RSTSTNDBY" then ... */
- {
optionbyte &= ~(1 << 1);
- }
/* OPT_RDRSTSTDBY */
if (strcmp(CMD_ARGV[3], "NORSTSTNDBY") == 0)
- {
optionbyte |= (1 << 2);
- }
else /* REVISIT must be "RSTSTOP" then ... */
- {
optionbyte &= ~(1 << 2);
- }
- if (CMD_ARGC > 4 && stm32x_info->has_dual_banks)
- {
+ if (CMD_ARGC > 4 && stm32x_info->has_dual_banks) {
/* OPT_BFB2 */
if (strcmp(CMD_ARGV[4], "BOOT0") == 0)
- {
optionbyte |= (1 << 3);
- }
else
- {
optionbyte &= ~(1 << 3);
- }
}
- if (stm32x_erase_options(bank) != ERROR_OK)
- {
+ if (stm32x_erase_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to erase options");
return ERROR_OK;
}
stm32x_info->option_bytes.user_options = optionbyte;
- if (stm32x_write_options(bank) != ERROR_OK)
- {
+ if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to write options");
return ERROR_OK;
}
@@ -1586,8 +1439,7 @@ static int stm32x_mass_erase(struct flash_bank *bank)
{
struct target *target = bank->target;
- if (target->state != TARGET_HALTED)
- {
+ if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -1604,7 +1456,8 @@ static int stm32x_mass_erase(struct flash_bank *bank)
retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER | FLASH_STRT);
+ retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
+ FLASH_MER | FLASH_STRT);
if (retval != ERROR_OK)
return retval;
@@ -1624,9 +1477,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
int i;
if (CMD_ARGC < 1)
- {
return ERROR_COMMAND_SYNTAX_ERROR;
- }
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
@@ -1634,20 +1485,14 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
return retval;
retval = stm32x_mass_erase(bank);
- if (retval == ERROR_OK)
- {
+ if (retval == ERROR_OK) {
/* set all sectors as erased */
for (i = 0; i < bank->num_sectors; i++)
- {
bank->sectors[i].is_erased = 1;
- }
command_print(CMD_CTX, "stm32x mass erase complete");
- }
- else
- {
+ } else
command_print(CMD_CTX, "stm32x mass erase failed");
- }
return retval;
}
@@ -1698,6 +1543,7 @@ static const struct command_registration stm32x_command_handlers[] = {
.name = "stm32f1x",
.mode = COMMAND_ANY,
.help = "stm32f1x flash command group",
+ .usage = "",
.chain = stm32x_exec_command_handlers,
},
COMMAND_REGISTRATION_DONE
@@ -1713,7 +1559,7 @@ struct flash_driver stm32f1x_flash = {
.read = default_flash_read,
.probe = stm32x_probe,
.auto_probe = stm32x_auto_probe,
- .erase_check = default_flash_mem_blank_check,
+ .erase_check = default_flash_blank_check,
.protect_check = stm32x_protect_check,
.info = get_stm32x_info,
};