X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstellaris.c;h=6a81047a5ded2f593850b8b94e553f01920200ea;hp=287be12d7021ee20974fe208c512ca37a433e2b2;hb=a72741818431d693e48b0f016258be0fec1f79da;hpb=1ca286557a7b41211cae7026c99d41af031af177

diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index 287be12d70..6a81047a5d 100644
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -29,19 +29,105 @@
 #endif
 
 #include "imp.h"
-#include "stellaris.h"
 #include <target/algorithm.h>
 #include <target/armv7m.h>
 
 
 #define DID0_VER(did0) ((did0 >> 28)&0x07)
 
+/* STELLARIS control registers */
+#define SCB_BASE	0x400FE000
+#define DID0		0x000
+#define DID1		0x004
+#define DC0			0x008
+#define DC1			0x010
+#define DC2			0x014
+#define DC3			0x018
+#define DC4			0x01C
+
+#define RIS			0x050
+#define RCC			0x060
+#define PLLCFG		0x064
+#define RCC2		0x070
+#define NVMSTAT		0x1a0
+
+/* "legacy" flash memory protection registers (64KB max) */
+#define FMPRE		0x130
+#define FMPPE		0x134
+
+/* new flash memory protection registers (for more than 64KB) */
+#define FMPRE0		0x200		/* PRE1 = PRE0 + 4, etc */
+#define FMPPE0		0x400		/* PPE1 = PPE0 + 4, etc */
+
+#define USECRL		0x140
+
+#define FLASH_CONTROL_BASE	0x400FD000
+#define FLASH_FMA	(FLASH_CONTROL_BASE | 0x000)
+#define FLASH_FMD	(FLASH_CONTROL_BASE | 0x004)
+#define FLASH_FMC	(FLASH_CONTROL_BASE | 0x008)
+#define FLASH_CRIS	(FLASH_CONTROL_BASE | 0x00C)
+#define FLASH_CIM	(FLASH_CONTROL_BASE | 0x010)
+#define FLASH_MISC	(FLASH_CONTROL_BASE | 0x014)
+
+#define AMISC	1
+#define PMISC	2
+
+#define AMASK	1
+#define PMASK	2
+
+/* Flash Controller Command bits */
+#define FMC_WRKEY	(0xA442 << 16)
+#define FMC_COMT	(1 << 3)
+#define FMC_MERASE	(1 << 2)
+#define FMC_ERASE	(1 << 1)
+#define FMC_WRITE	(1 << 0)
+
+/* STELLARIS constants */
+
+/* values to write in FMA to commit write-"once" values */
+#define FLASH_FMA_PRE(x)	(2 * (x))	/* for FMPPREx */
+#define FLASH_FMA_PPE(x)	(2 * (x) + 1)	/* for FMPPPEx */
+
+
 static void stellaris_read_clock_info(struct flash_bank *bank);
 static int stellaris_mass_erase(struct flash_bank *bank);
 
+struct stellaris_flash_bank
+{
+	/* chip id register */
+	uint32_t did0;
+	uint32_t did1;
+	uint32_t dc0;
+	uint32_t dc1;
+
+	const char * target_name;
+
+	uint32_t sramsiz;
+	uint32_t flshsz;
+	/* flash geometry */
+	uint32_t num_pages;
+	uint32_t pagesize;
+	uint32_t pages_in_lockregion;
+
+	/* nv memory bits */
+	uint16_t num_lockbits;
+
+	/* main clock status */
+	uint32_t rcc;
+	uint32_t rcc2;
+	uint8_t  mck_valid;
+	uint8_t  xtal_mask;
+	uint32_t iosc_freq;
+	uint32_t mck_freq;
+	const char *iosc_desc;
+	const char *mck_desc;
+};
+
+// Autogenerated by contrib/gen-stellaris-part-header.pl
+// From Stellaris Firmware Development Package revision 6734
 static struct {
 	uint32_t partno;
-	char *partname;
+	const char *partname;
 }	StellarisParts[] =
 {
 	{0x0001,"LM3S101"},
@@ -94,6 +180,7 @@ static struct {
 	{0x1005,"LM3S1627"},
 	{0x10B3,"LM3S1635"},
 	{0x10BD,"LM3S1637"},
+	{0x10B1,"LM3S1651"},
 	{0x10B9,"LM3S1751"},
 	{0x1010,"LM3S1776"},
 	{0x1016,"LM3S1811"},
@@ -109,6 +196,8 @@ static struct {
 	{0x103C,"LM3S1J16"},
 	{0x100E,"LM3S1N11"},
 	{0x103B,"LM3S1N16"},
+	{0x10B2,"LM3S1P51"},
+	{0x109E,"LM3S1R21"},
 	{0x1030,"LM3S1W16"},
 	{0x102F,"LM3S1Z16"},
 	{0x1051,"LM3S2110"},
@@ -137,6 +226,7 @@ static struct {
 	{0x1058,"LM3S2950"},
 	{0x1055,"LM3S2965"},
 	{0x106C,"LM3S2B93"},
+	{0x1008,"LM3S3634"},
 	{0x1043,"LM3S3651"},
 	{0x1044,"LM3S3739"},
 	{0x1049,"LM3S3748"},
@@ -773,6 +863,8 @@ static int stellaris_protect(struct flash_bank *bank, int set, int first, int la
 	return ERROR_OK;
 }
 
+/* see contib/loaders/flash/stellaris.s for src */
+
 static const uint8_t stellaris_write_code[] =
 {
 /*