X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fnrf5.c;h=4041bfbe4bf09592ab76f80db2dc39ddf9039b23;hp=16459c7f8b1f278de3c0e0bc666a0040f1e788e2;hb=2caa3455ada686baea01a50d092e4244c461e101;hpb=7ce8624dbfc3c26a4dfb7ca089a99ccf52a8539b diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c index 16459c7f8b..4041bfbe4b 100644 --- a/src/flash/nor/nrf5.c +++ b/src/flash/nor/nrf5.c @@ -26,6 +26,7 @@ #include #include #include +#include enum { NRF5_FLASH_BASE = 0x00000000, @@ -203,9 +204,17 @@ static const struct nrf5_device_spec nrf5_known_devices_table[] = { NRF5_DEVICE_DEF(0x007A, "51422", "CEAA", "C0", 256), NRF5_DEVICE_DEF(0x0088, "51422", "CFAC", "A0", 256), + /* nRF52810 Devices */ + NRF5_DEVICE_DEF(0x0142, "52810", "QFAA", "B0", 192), + NRF5_DEVICE_DEF(0x0143, "52810", "QCAA", "C0", 192), + /* nRF52832 Devices */ NRF5_DEVICE_DEF(0x00C7, "52832", "QFAA", "B0", 512), NRF5_DEVICE_DEF(0x0139, "52832", "QFAA", "E0", 512), + NRF5_DEVICE_DEF(0x00E3, "52832", "CIAA", "B0", 512), + + /* nRF52840 Devices */ + NRF5_DEVICE_DEF(0x0150, "52840", "QIAA", "C0", 1024), }; static int nrf5_bank_is_probed(struct flash_bank *bank) @@ -240,7 +249,8 @@ static int nrf5_wait_for_nvmc(struct nrf5_info *chip) { uint32_t ready; int res; - int timeout = 100; + int timeout_ms = 340; + int64_t ts_start = timeval_ms(); do { res = target_read_u32(chip->target, NRF5_NVMC_READY, &ready); @@ -252,8 +262,9 @@ static int nrf5_wait_for_nvmc(struct nrf5_info *chip) if (ready == 0x00000001) return ERROR_OK; - alive_sleep(1); - } while (timeout--); + keep_alive(); + + } while ((timeval_ms()-ts_start) < timeout_ms); LOG_DEBUG("Timed out waiting for NVMC_READY"); return ERROR_FLASH_BUSY; @@ -895,7 +906,7 @@ FLASH_BANK_COMMAND_HANDLER(nrf5_flash_bank_command) bank->bank_number = 1; break; default: - LOG_ERROR("Invalid bank address 0x%08" PRIx32, bank->base); + LOG_ERROR("Invalid bank address " TARGET_ADDR_FMT, bank->base); return ERROR_FAIL; } @@ -1107,6 +1118,7 @@ static const struct command_registration nrf5_exec_command_handlers[] = { .handler = nrf5_handle_mass_erase_command, .mode = COMMAND_EXEC, .help = "Erase all flash contents of the chip.", + .usage = "", }, COMMAND_REGISTRATION_DONE }; @@ -1129,7 +1141,7 @@ static const struct command_registration nrf5_command_handlers[] = { COMMAND_REGISTRATION_DONE }; -struct flash_driver nrf5_flash = { +const struct flash_driver nrf5_flash = { .name = "nrf5", .commands = nrf5_command_handlers, .flash_bank_command = nrf5_flash_bank_command, @@ -1147,7 +1159,7 @@ struct flash_driver nrf5_flash = { /* We need to retain the flash-driver name as well as the commands * for backwards compatability */ -struct flash_driver nrf51_flash = { +const struct flash_driver nrf51_flash = { .name = "nrf51", .commands = nrf5_command_handlers, .flash_bank_command = nrf5_flash_bank_command,