X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fnrf5.c;h=1784bcde5a0d52597cbaa486707e4291886a4f7a;hp=02c144810608ab5a66a22e5cde10e490ba69e89d;hb=c1f4d9e6e8f9cdab122db36299e039a73151ffe4;hpb=a5bf98f846eba410cdfc678b5b223052a68439c1

diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index 02c1448106..1784bcde5a 100644
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -158,7 +158,7 @@ struct nrf5_info {
 	bool ficr_info_valid;
 	struct nrf52_ficr_info ficr_info;
 	const struct nrf5_device_spec *spec;
-	uint32_t hwid;
+	uint16_t hwid;
 	enum nrf5_features features;
 	unsigned int flash_size_kb;
 	unsigned int ram_size_kb;
@@ -648,7 +648,7 @@ static int nrf5_info(struct flash_bank *bank, char *buf, int buf_size)
 				variant, &variant[2]);
 
 	} else {
-		res = snprintf(buf, buf_size, "nRF51xxx (HWID 0x%08" PRIx32 ")",
+		res = snprintf(buf, buf_size, "nRF51xxx (HWID 0x%04" PRIx16 ")",
 				chip->hwid);
 	}
 	if (res <= 0)
@@ -765,14 +765,15 @@ static int nrf5_probe(struct flash_bank *bank)
 	struct nrf5_info *chip = nbank->chip;
 	struct target *target = chip->target;
 
-	res = target_read_u32(target, NRF5_FICR_CONFIGID, &chip->hwid);
+	uint32_t configid;
+	res = target_read_u32(target, NRF5_FICR_CONFIGID, &configid);
 	if (res != ERROR_OK) {
 		LOG_ERROR("Couldn't read CONFIGID register");
 		return res;
 	}
 
-	chip->hwid &= 0xFFFF;	/* HWID is stored in the lower two
-			 * bytes of the CONFIGID register */
+	/* HWID is stored in the lower two bytes of the CONFIGID register */
+	chip->hwid = configid & 0xFFFF;
 
 	/* guess a nRF51 series if the device has no FICR INFO and we don't know HWID */
 	chip->features = NRF5_FEATURE_SERIES_51;