X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Ffm3.c;h=eeefa3f43e5fe6daeede6bf9e3537ab9ad39178d;hp=32e81798f3a05577da6d471184148ea7d141d7fc;hb=HEAD;hpb=08d4411b59dd8bd0e7d8009003b71d23acbf6eee diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c index 32e81798f3..48f4493ab6 100644 --- a/src/flash/nor/fm3.c +++ b/src/flash/nor/fm3.c @@ -1,22 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + /*************************************************************************** * Copyright (C) 2011 by Marc Willam, Holger Wech * * openOCD.fseu(AT)de.fujitsu.com * * Copyright (C) 2011 Ronny Strutz * * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + * Copyright (C) 2013 Nemui Trinomius * + * nemuisan_kawausogasuki@live.jp * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -28,39 +18,39 @@ #include #include -#define FLASH_DQ6 0x00000040 /* Data toggle flag bit (TOGG) position */ -#define FLASH_DQ5 0x00000020 /* Time limit exceeding flag bit (TLOV) position */ +#define FLASH_DQ6 0x40 /* Data toggle flag bit (TOGG) position */ +#define FLASH_DQ5 0x20 /* Time limit exceeding flag bit (TLOV) position */ enum fm3_variant { - mb9bfxx1, /* Flash Type '1' */ - mb9bfxx2, - mb9bfxx3, - mb9bfxx4, - mb9bfxx5, - mb9bfxx6, - mb9bfxx7, - mb9bfxx8, - - mb9afxx1, /* Flash Type '2' */ - mb9afxx2, - mb9afxx3, - mb9afxx4, - mb9afxx5, - mb9afxx6, - mb9afxx7, - mb9afxx8, + MB9BFXX1, /* Flash Type '1' */ + MB9BFXX2, + MB9BFXX3, + MB9BFXX4, + MB9BFXX5, + MB9BFXX6, + MB9BFXX7, + MB9BFXX8, + + MB9AFXX1, /* Flash Type '2' */ + MB9AFXX2, + MB9AFXX3, + MB9AFXX4, + MB9AFXX5, + MB9AFXX6, + MB9AFXX7, + MB9AFXX8, }; enum fm3_flash_type { - fm3_no_flash_type = 0, - fm3_flash_type1 = 1, - fm3_flash_type2 = 2 + FM3_NO_FLASH_TYPE = 0, + FM3_FLASH_TYPE1 = 1, + FM3_FLASH_TYPE2 = 2 }; struct fm3_flash_bank { enum fm3_variant variant; enum fm3_flash_type flashtype; - int probed; + bool probed; }; FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) @@ -75,53 +65,53 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) /* Flash type '1' */ if (strcmp(CMD_ARGV[5], "mb9bfxx1.cpu") == 0) { - fm3_info->variant = mb9bfxx1; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX1; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx2.cpu") == 0) { - fm3_info->variant = mb9bfxx2; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX2; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx3.cpu") == 0) { - fm3_info->variant = mb9bfxx3; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX3; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx4.cpu") == 0) { - fm3_info->variant = mb9bfxx4; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX4; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx5.cpu") == 0) { - fm3_info->variant = mb9bfxx5; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX5; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx6.cpu") == 0) { - fm3_info->variant = mb9bfxx6; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX6; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx7.cpu") == 0) { - fm3_info->variant = mb9bfxx7; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX7; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9bfxx8.cpu") == 0) { - fm3_info->variant = mb9bfxx8; - fm3_info->flashtype = fm3_flash_type1; + fm3_info->variant = MB9BFXX8; + fm3_info->flashtype = FM3_FLASH_TYPE1; } else if (strcmp(CMD_ARGV[5], "mb9afxx1.cpu") == 0) { /* Flash type '2' */ - fm3_info->variant = mb9afxx1; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX1; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx2.cpu") == 0) { - fm3_info->variant = mb9afxx2; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX2; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx3.cpu") == 0) { - fm3_info->variant = mb9afxx3; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX3; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx4.cpu") == 0) { - fm3_info->variant = mb9afxx4; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX4; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx5.cpu") == 0) { - fm3_info->variant = mb9afxx5; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX5; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx6.cpu") == 0) { - fm3_info->variant = mb9afxx6; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX6; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx7.cpu") == 0) { - fm3_info->variant = mb9afxx7; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX7; + fm3_info->flashtype = FM3_FLASH_TYPE2; } else if (strcmp(CMD_ARGV[5], "mb9afxx8.cpu") == 0) { - fm3_info->variant = mb9afxx8; - fm3_info->flashtype = fm3_flash_type2; + fm3_info->variant = MB9AFXX8; + fm3_info->flashtype = FM3_FLASH_TYPE2; } /* unknown Flash type */ @@ -131,7 +121,7 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) return ERROR_FLASH_BANK_INVALID; } - fm3_info->probed = 0; + fm3_info->probed = false; return ERROR_OK; } @@ -140,23 +130,23 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms) { int retval = ERROR_OK; - uint16_t state1, state2; + uint8_t state1, state2; int ms = 0; /* While(1) loop exit via "break" and "return" on error */ while (1) { /* dummy-read - see flash manual */ - retval = target_read_u16(target, offset, &state1); + retval = target_read_u8(target, offset, &state1); if (retval != ERROR_OK) return retval; /* Data polling 1 */ - retval = target_read_u16(target, offset, &state1); + retval = target_read_u8(target, offset, &state1); if (retval != ERROR_OK) return retval; /* Data polling 2 */ - retval = target_read_u16(target, offset, &state2); + retval = target_read_u8(target, offset, &state2); if (retval != ERROR_OK) return retval; @@ -168,12 +158,12 @@ static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms) /* Retry data polling */ /* Data polling 1 */ - retval = target_read_u16(target, offset, &state1); + retval = target_read_u8(target, offset, &state1); if (retval != ERROR_OK) return retval; /* Data polling 2 */ - retval = target_read_u16(target, offset, &state2); + retval = target_read_u8(target, offset, &state2); if (retval != ERROR_OK) return retval; @@ -195,30 +185,35 @@ static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms) } if (retval == ERROR_OK) - LOG_DEBUG("fm3_busy_wait(%x) needs about %d ms", offset, ms); + LOG_DEBUG("fm3_busy_wait(%" PRIx32 ") needs about %d ms", offset, ms); return retval; } -static int fm3_erase(struct flash_bank *bank, int first, int last) +static int fm3_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct fm3_flash_bank *fm3_info = bank->driver_priv; struct target *target = bank->target; int retval = ERROR_OK; - uint32_t u32DummyRead; - int sector, odd; - uint32_t u32FlashType; - uint32_t u32FlashSeqAddress1; - uint32_t u32FlashSeqAddress2; - - u32FlashType = (uint32_t) fm3_info->flashtype; - - if (u32FlashType == fm3_flash_type1) { - u32FlashSeqAddress1 = 0x00001550; - u32FlashSeqAddress2 = 0x00000AA8; - } else if (u32FlashType == fm3_flash_type2) { - u32FlashSeqAddress1 = 0x00000AA8; - u32FlashSeqAddress2 = 0x00000554; + uint32_t u32_dummy_read; + int odd; + uint32_t u32_flash_type; + uint32_t u32_flash_seq_address1; + uint32_t u32_flash_seq_address2; + + struct working_area *write_algorithm; + struct reg_param reg_params[3]; + struct armv7m_algorithm armv7m_info; + + u32_flash_type = (uint32_t) fm3_info->flashtype; + + if (u32_flash_type == FM3_FLASH_TYPE1) { + u32_flash_seq_address1 = 0x00001550; + u32_flash_seq_address2 = 0x00000AA8; + } else if (u32_flash_type == FM3_FLASH_TYPE2) { + u32_flash_seq_address1 = 0x00000AA8; + u32_flash_seq_address2 = 0x00000554; } else { LOG_ERROR("Flash/Device type unknown!"); return ERROR_FLASH_OPERATION_FAILED; @@ -229,92 +224,144 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) return ERROR_TARGET_NOT_HALTED; } - LOG_INFO("Fujitsu MB9Bxxx: Sector Erase ... (%d to %d)", first, last); + /* RAMCODE used for fm3 Flash sector erase: */ + /* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */ + /* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */ + /* R2 keeps Flash Offset address (ofs) */ + static const uint8_t fm3_flash_erase_sector_code[] = { + /* *(uint16_t*)u32FlashSeq1 = 0xAA; */ + 0xAA, 0x24, /* MOVS R4, #0xAA */ + 0x04, 0x80, /* STRH R4, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq2 = 0x55; */ + 0x55, 0x23, /* MOVS R3, #0x55 */ + 0x0B, 0x80, /* STRH R3, [R1, #0] */ + /* *(uint16_t*)u32FlashSeq1 = 0x80; */ + 0x80, 0x25, /* MOVS R5, #0x80 */ + 0x05, 0x80, /* STRH R5, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq1 = 0xAA; */ + 0x04, 0x80, /* STRH R4, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq2 = 0x55; */ + 0x0B, 0x80, /* STRH R3, [R1, #0] */ + /* Sector_Erase Command (0x30) */ + /* *(uint16_t*)ofs = 0x30; */ + 0x30, 0x20, /* MOVS R0, #0x30 */ + 0x10, 0x80, /* STRH R0, [R2, #0] */ + /* End Code */ + 0x00, 0xBE, /* BKPT #0 */ + }; + + LOG_INFO("Fujitsu MB9[A/B]FXXX: Sector Erase ... (%u to %u)", first, last); + + /* disable HW watchdog */ + retval = target_write_u32(target, 0x40011C00, 0x1ACCE551); + if (retval != ERROR_OK) + return retval; + + retval = target_write_u32(target, 0x40011C00, 0xE5331AAE); + if (retval != ERROR_OK) + return retval; + + retval = target_write_u32(target, 0x40011008, 0x00000000); + if (retval != ERROR_OK) + return retval; - /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash acccess) */ + /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */ retval = target_write_u32(target, 0x40000000, 0x0001); if (retval != ERROR_OK) return retval; /* dummy read of FASZR */ - retval = target_read_u32(target, 0x40000000, &u32DummyRead); + retval = target_read_u32(target, 0x40000000, &u32_dummy_read); if (retval != ERROR_OK) return retval; - for (sector = first ; sector <= last ; sector++) { + /* allocate working area with flash sector erase code */ + if (target_alloc_working_area(target, sizeof(fm3_flash_erase_sector_code), + &write_algorithm) != ERROR_OK) { + LOG_WARNING("no working area available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + retval = target_write_buffer(target, write_algorithm->address, + sizeof(fm3_flash_erase_sector_code), fm3_flash_erase_sector_code); + if (retval != ERROR_OK) + return retval; + + armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; + armv7m_info.core_mode = ARM_MODE_THREAD; + + init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32_flash_seq_address1 */ + init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32_flash_seq_address2 */ + init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* offset */ + + /* write code buffer and use Flash sector erase code within fm3 */ + for (unsigned int sector = first ; sector <= last ; sector++) { uint32_t offset = bank->sectors[sector].offset; for (odd = 0; odd < 2 ; odd++) { if (odd) offset += 4; - /* Flash unlock sequence */ - retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA); - if (retval != ERROR_OK) - return retval; + buf_set_u32(reg_params[0].value, 0, 32, u32_flash_seq_address1); + buf_set_u32(reg_params[1].value, 0, 32, u32_flash_seq_address2); + buf_set_u32(reg_params[2].value, 0, 32, offset); - retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055); - if (retval != ERROR_OK) - return retval; - - retval = target_write_u16(target, u32FlashSeqAddress1, 0x0080); - if (retval != ERROR_OK) - return retval; - - retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA); - if (retval != ERROR_OK) - return retval; - - retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055); - if (retval != ERROR_OK) - return retval; - - /* Sector erase command (0x0030) */ - retval = target_write_u16(target, offset, 0x0030); - if (retval != ERROR_OK) + retval = target_run_algorithm(target, 0, NULL, 3, reg_params, + write_algorithm->address, 0, 100000, &armv7m_info); + if (retval != ERROR_OK) { + LOG_ERROR("Error executing flash erase programming algorithm"); + retval = ERROR_FLASH_OPERATION_FAILED; return retval; + } retval = fm3_busy_wait(target, offset, 500); if (retval != ERROR_OK) return retval; } - bank->sectors[sector].is_erased = 1; } - /* FASZR = 0x02, Enables CPU Run Mode (32-bit Flash acccess) */ + target_free_working_area(target, write_algorithm); + destroy_reg_param(®_params[0]); + destroy_reg_param(®_params[1]); + destroy_reg_param(®_params[2]); + + /* FASZR = 0x02, Enables CPU Run Mode (32-bit Flash access) */ retval = target_write_u32(target, 0x40000000, 0x0002); if (retval != ERROR_OK) return retval; - retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */ + retval = target_read_u32(target, 0x40000000, &u32_dummy_read); /* dummy read of FASZR */ return retval; } -static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, +static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { struct fm3_flash_bank *fm3_info = bank->driver_priv; struct target *target = bank->target; - uint32_t buffer_size = 2048; /* 8192 for MB9Bxx6! */ + uint32_t buffer_size = 2048; /* Default minimum value */ struct working_area *write_algorithm; struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[6]; struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; - uint32_t u32FlashType; - uint32_t u32FlashSeqAddress1; - uint32_t u32FlashSeqAddress2; - - u32FlashType = (uint32_t) fm3_info->flashtype; - - if (u32FlashType == fm3_flash_type1) { - u32FlashSeqAddress1 = 0x00001550; - u32FlashSeqAddress2 = 0x00000AA8; - } else if (u32FlashType == fm3_flash_type2) { - u32FlashSeqAddress1 = 0x00000AA8; - u32FlashSeqAddress2 = 0x00000554; + uint32_t u32_flash_type; + uint32_t u32_flash_seq_address1; + uint32_t u32_flash_seq_address2; + + /* Increase buffer_size if needed */ + if (buffer_size < (target->working_area_size / 2)) + buffer_size = (target->working_area_size / 2); + + u32_flash_type = (uint32_t) fm3_info->flashtype; + + if (u32_flash_type == FM3_FLASH_TYPE1) { + u32_flash_seq_address1 = 0x00001550; + u32_flash_seq_address2 = 0x00000AA8; + } else if (u32_flash_type == FM3_FLASH_TYPE2) { + u32_flash_seq_address1 = 0x00000AA8; + u32_flash_seq_address2 = 0x00000554; } else { LOG_ERROR("Flash/Device type unknown!"); return ERROR_FLASH_OPERATION_FAILED; @@ -328,7 +375,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, /* R4 keeps Flash Sequence address 2 (u32FlashSeq2) */ /* R5 returns result value (u32FlashResult) */ - const uint8_t fm3_flash_write_code[] = { + static const uint8_t fm3_flash_write_code[] = { /* fm3_FLASH_IF->FASZ &= 0xFFFD; */ 0x5F, 0xF0, 0x80, 0x45, /* MOVS.W R5, #(fm3_FLASH_IF->FASZ) */ 0x2D, 0x68, /* LDR R5, [R5] */ @@ -342,8 +389,8 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, 0x55, 0xF0, 0x01, 0x05, /* ORRS.W R5, R5, #1 */ 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */ 0x35, 0x60, /* STR R5, [R6] */ - /* u32DummyRead = fm3_FLASH_IF->FASZ; */ - 0x28, 0x4D, /* LDR.N R5, ??u32DummyRead */ + /* u32_dummy_read = fm3_FLASH_IF->FASZ; */ + 0x28, 0x4D, /* LDR.N R5, ??u32_dummy_read */ 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */ 0x36, 0x68, /* LDR R6, [R6] */ 0x2E, 0x60, /* STR R6, [R5] */ @@ -433,8 +480,8 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, 0x55, 0xF0, 0x02, 0x05, /* ORRS.W R5, R5, #2 */ 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */ 0x35, 0x60, /* STR R5, [R6] */ - /* u32DummyRead = fm3_FLASH_IF->FASZ; */ - 0x04, 0x4D, /* LDR.N R5, ??u32DummyRead */ + /* u32_dummy_read = fm3_FLASH_IF->FASZ; */ + 0x04, 0x4D, /* LDR.N R5, ??u32_dummy_read */ 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */ 0x36, 0x68, /* LDR R6, [R6] */ 0x2E, 0x60, /* STR R6, [R5] */ @@ -446,13 +493,14 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, 0x00, 0xBE, /* BKPT #0 */ /* The following address pointers assume, that the code is running from */ - /* address 0x1FFF8008. These address pointers will be patched, if a */ + /* SRAM basic-address + 8.These address pointers will be patched, if a */ /* different start address in RAM is used (e.g. for Flash type 2)! */ - 0x00, 0x80, 0xFF, 0x1F, /* u32DummyRead address in RAM (0x1FFF8000) */ - 0x04, 0x80, 0xFF, 0x1F /* u32FlashResult address in RAM (0x1FFF8004) */ + /* Default SRAM basic-address is 0x20000000. */ + 0x00, 0x00, 0x00, 0x20, /* u32_dummy_read address in RAM (0x20000000) */ + 0x04, 0x00, 0x00, 0x20 /* u32FlashResult address in RAM (0x20000004) */ }; - LOG_INFO("Fujitsu MB9B500: FLASH Write ..."); + LOG_INFO("Fujitsu MB9[A/B]FXXX: FLASH Write ..."); /* disable HW watchdog */ retval = target_write_u32(target, 0x40011C00, 0x1ACCE551); @@ -475,18 +523,30 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } - /* allocate working area with flash programming code */ - if (target_alloc_working_area(target, sizeof(fm3_flash_write_code), + /* allocate working area and variables with flash programming code */ + if (target_alloc_working_area(target, sizeof(fm3_flash_write_code) + 8, &write_algorithm) != ERROR_OK) { LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - retval = target_write_buffer(target, write_algorithm->address, + retval = target_write_buffer(target, write_algorithm->address + 8, sizeof(fm3_flash_write_code), fm3_flash_write_code); if (retval != ERROR_OK) return retval; + /* Patching 'local variable address' */ + /* Algorithm: u32_dummy_read: */ + retval = target_write_u32(target, (write_algorithm->address + 8) + + sizeof(fm3_flash_write_code) - 8, (write_algorithm->address)); + if (retval != ERROR_OK) + return retval; + /* Algorithm: u32FlashResult: */ + retval = target_write_u32(target, (write_algorithm->address + 8) + + sizeof(fm3_flash_write_code) - 4, (write_algorithm->address) + 4); + if (retval != ERROR_OK) + return retval; + /* memory buffer */ @@ -516,26 +576,6 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, while (count > 0) { uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count; - retval = target_write_buffer(target, write_algorithm->address, 8, - fm3_flash_write_code); - if (retval != ERROR_OK) - break; - - /* Patching 'local variable address' for different RAM addresses */ - if (write_algorithm->address != 0x1FFF8008) { - /* Algorithm: u32DummyRead: */ - retval = target_write_u32(target, (write_algorithm->address) - + sizeof(fm3_flash_write_code) - 8, (write_algorithm->address) - 8); - if (retval != ERROR_OK) - break; - - /* Algorithm: u32FlashResult: */ - retval = target_write_u32(target, (write_algorithm->address) - + sizeof(fm3_flash_write_code) - 4, (write_algorithm->address) - 4); - if (retval != ERROR_OK) - break; - } - retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer); if (retval != ERROR_OK) break; @@ -543,11 +583,11 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); buf_set_u32(reg_params[2].value, 0, 32, thisrun_count); - buf_set_u32(reg_params[3].value, 0, 32, u32FlashSeqAddress1); - buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2); + buf_set_u32(reg_params[3].value, 0, 32, u32_flash_seq_address1); + buf_set_u32(reg_params[4].value, 0, 32, u32_flash_seq_address2); retval = target_run_algorithm(target, 0, NULL, 6, reg_params, - write_algorithm->address, 0, 1000, &armv7m_info); + (write_algorithm->address + 8), 0, 1000, &armv7m_info); if (retval != ERROR_OK) { LOG_ERROR("Error executing fm3 Flash programming algorithm"); retval = ERROR_FLASH_OPERATION_FAILED; @@ -555,7 +595,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, } if (buf_get_u32(reg_params[5].value, 0, 32) != ERROR_OK) { - LOG_ERROR("Fujitsu MB9[A/B]FXXX: Flash programming ERROR (Timeout) -> Reg R3: %x", + LOG_ERROR("Fujitsu MB9[A/B]FXXX: Flash programming ERROR (Timeout) -> Reg R3: %" PRIx32, buf_get_u32(reg_params[5].value, 0, 32)); retval = ERROR_FLASH_OPERATION_FAILED; break; @@ -605,7 +645,7 @@ static int fm3_probe(struct flash_bank *bank) */ num_pages = 10; /* max number of Flash pages for malloc */ - fm3_info->probed = 0; + fm3_info->probed = false; bank->sectors = malloc(sizeof(struct flash_sector) * num_pages); bank->base = 0x00000000; @@ -621,8 +661,8 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[1].is_erased = -1; bank->sectors[1].is_protected = -1; - if ((fm3_info->variant == mb9bfxx1) - || (fm3_info->variant == mb9afxx1)) { + if ((fm3_info->variant == MB9BFXX1) + || (fm3_info->variant == MB9AFXX1)) { num_pages = 3; bank->size = 64 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -633,18 +673,18 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[2].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx2) - || (fm3_info->variant == mb9bfxx4) - || (fm3_info->variant == mb9bfxx5) - || (fm3_info->variant == mb9bfxx6) - || (fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx2) - || (fm3_info->variant == mb9afxx4) - || (fm3_info->variant == mb9afxx5) - || (fm3_info->variant == mb9afxx6) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX2) + || (fm3_info->variant == MB9BFXX4) + || (fm3_info->variant == MB9BFXX5) + || (fm3_info->variant == MB9BFXX6) + || (fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX2) + || (fm3_info->variant == MB9AFXX4) + || (fm3_info->variant == MB9AFXX5) + || (fm3_info->variant == MB9AFXX6) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 3; bank->size = 128 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -655,16 +695,16 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[2].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx4) - || (fm3_info->variant == mb9bfxx5) - || (fm3_info->variant == mb9bfxx6) - || (fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx4) - || (fm3_info->variant == mb9afxx5) - || (fm3_info->variant == mb9afxx6) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX4) + || (fm3_info->variant == MB9BFXX5) + || (fm3_info->variant == MB9BFXX6) + || (fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX4) + || (fm3_info->variant == MB9AFXX5) + || (fm3_info->variant == MB9AFXX6) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 4; bank->size = 256 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -675,14 +715,14 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[3].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx5) - || (fm3_info->variant == mb9bfxx6) - || (fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx5) - || (fm3_info->variant == mb9afxx6) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX5) + || (fm3_info->variant == MB9BFXX6) + || (fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX5) + || (fm3_info->variant == MB9AFXX6) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 5; bank->size = 384 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -693,12 +733,12 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[4].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx6) - || (fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx6) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX6) + || (fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX6) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 6; bank->size = 512 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -709,10 +749,10 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[5].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx7) - || (fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx7) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX7) + || (fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX7) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 8; bank->size = 768 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -728,8 +768,8 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[7].is_protected = -1; } - if ((fm3_info->variant == mb9bfxx8) - || (fm3_info->variant == mb9afxx8)) { + if ((fm3_info->variant == MB9BFXX8) + || (fm3_info->variant == MB9AFXX8)) { num_pages = 10; bank->size = 1024 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -745,7 +785,7 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[9].is_protected = -1; } - fm3_info->probed = 1; + fm3_info->probed = true; return ERROR_OK; } @@ -758,33 +798,31 @@ static int fm3_auto_probe(struct flash_bank *bank) return fm3_probe(bank); } -static int fm3_info(struct flash_bank *bank, char *buf, int buf_size) -{ - snprintf(buf, buf_size, "Fujitsu fm3 Device does not support Chip-ID (Type unknown)"); - return ERROR_OK; -} - /* Chip erase */ static int fm3_chip_erase(struct flash_bank *bank) { struct target *target = bank->target; struct fm3_flash_bank *fm3_info2 = bank->driver_priv; int retval = ERROR_OK; - uint32_t u32DummyRead; - uint32_t u32FlashType; - uint32_t u32FlashSeqAddress1; - uint32_t u32FlashSeqAddress2; + uint32_t u32_dummy_read; + uint32_t u32_flash_type; + uint32_t u32_flash_seq_address1; + uint32_t u32_flash_seq_address2; - u32FlashType = (uint32_t) fm3_info2->flashtype; + struct working_area *write_algorithm; + struct reg_param reg_params[3]; + struct armv7m_algorithm armv7m_info; - if (u32FlashType == fm3_flash_type1) { + u32_flash_type = (uint32_t) fm3_info2->flashtype; + + if (u32_flash_type == FM3_FLASH_TYPE1) { LOG_INFO("*** Erasing mb9bfxxx type"); - u32FlashSeqAddress1 = 0x00001550; - u32FlashSeqAddress2 = 0x00000AA8; - } else if (u32FlashType == fm3_flash_type2) { + u32_flash_seq_address1 = 0x00001550; + u32_flash_seq_address2 = 0x00000AA8; + } else if (u32_flash_type == FM3_FLASH_TYPE2) { LOG_INFO("*** Erasing mb9afxxx type"); - u32FlashSeqAddress1 = 0x00000AA8; - u32FlashSeqAddress2 = 0x00000554; + u32_flash_seq_address1 = 0x00000AA8; + u32_flash_seq_address2 = 0x00000554; } else { LOG_ERROR("Flash/Device type unknown!"); return ERROR_FLASH_OPERATION_FAILED; @@ -795,47 +833,90 @@ static int fm3_chip_erase(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - LOG_INFO("Fujitsu MB9[AB]xxx: Chip Erase ... (may take several seconds)"); + /* RAMCODE used for fm3 Flash chip erase: */ + /* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */ + /* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */ + static const uint8_t fm3_flash_erase_chip_code[] = { + /* *(uint16_t*)u32FlashSeq1 = 0xAA; */ + 0xAA, 0x22, /* MOVS R2, #0xAA */ + 0x02, 0x80, /* STRH R2, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq2 = 0x55; */ + 0x55, 0x23, /* MOVS R3, #0x55 */ + 0x0B, 0x80, /* STRH R3, [R1, #0] */ + /* *(uint16_t*)u32FlashSeq1 = 0x80; */ + 0x80, 0x24, /* MOVS R4, #0x80 */ + 0x04, 0x80, /* STRH R4, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq1 = 0xAA; */ + 0x02, 0x80, /* STRH R2, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq2 = 0x55; */ + 0x0B, 0x80, /* STRH R3, [R1, #0] */ + /* Chip_Erase Command 0x10 */ + /* *(uint16_t*)u32FlashSeq1 = 0x10; */ + 0x10, 0x21, /* MOVS R1, #0x10 */ + 0x01, 0x80, /* STRH R1, [R0, #0] */ + /* End Code */ + 0x00, 0xBE, /* BKPT #0 */ + }; - /* Implement Flash chip erase (mass erase) completely on host */ + LOG_INFO("Fujitsu MB9[A/B]xxx: Chip Erase ... (may take several seconds)"); - /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */ - retval = target_write_u32(target, 0x40000000, 0x0001); + /* disable HW watchdog */ + retval = target_write_u32(target, 0x40011C00, 0x1ACCE551); if (retval != ERROR_OK) return retval; - /* dummy read of FASZR */ - retval = target_read_u32(target, 0x40000000, &u32DummyRead); + retval = target_write_u32(target, 0x40011C00, 0xE5331AAE); if (retval != ERROR_OK) return retval; - /* Flash unlock sequence */ - retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA); + retval = target_write_u32(target, 0x40011008, 0x00000000); if (retval != ERROR_OK) return retval; - retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055); + /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */ + retval = target_write_u32(target, 0x40000000, 0x0001); if (retval != ERROR_OK) return retval; - retval = target_write_u16(target, u32FlashSeqAddress1, 0x0080); + /* dummy read of FASZR */ + retval = target_read_u32(target, 0x40000000, &u32_dummy_read); if (retval != ERROR_OK) return retval; - retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA); + /* allocate working area with flash chip erase code */ + if (target_alloc_working_area(target, sizeof(fm3_flash_erase_chip_code), + &write_algorithm) != ERROR_OK) { + LOG_WARNING("no working area available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + retval = target_write_buffer(target, write_algorithm->address, + sizeof(fm3_flash_erase_chip_code), fm3_flash_erase_chip_code); if (retval != ERROR_OK) return retval; - retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055); - if (retval != ERROR_OK) - return retval; + armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; + armv7m_info.core_mode = ARM_MODE_THREAD; - /* Chip Erase command (0x0010) */ - retval = target_write_u16(target, u32FlashSeqAddress1, 0x0010); - if (retval != ERROR_OK) + init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32_flash_seq_address1 */ + init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32_flash_seq_address2 */ + + buf_set_u32(reg_params[0].value, 0, 32, u32_flash_seq_address1); + buf_set_u32(reg_params[1].value, 0, 32, u32_flash_seq_address2); + + retval = target_run_algorithm(target, 0, NULL, 2, reg_params, + write_algorithm->address, 0, 100000, &armv7m_info); + if (retval != ERROR_OK) { + LOG_ERROR("Error executing flash erase programming algorithm"); + retval = ERROR_FLASH_OPERATION_FAILED; return retval; + } + + target_free_working_area(target, write_algorithm); - retval = fm3_busy_wait(target, u32FlashSeqAddress2, 20000); /* 20s timeout */ + destroy_reg_param(®_params[0]); + destroy_reg_param(®_params[1]); + + retval = fm3_busy_wait(target, u32_flash_seq_address2, 20000); /* 20s timeout */ if (retval != ERROR_OK) return retval; @@ -844,31 +925,25 @@ static int fm3_chip_erase(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */ + retval = target_read_u32(target, 0x40000000, &u32_dummy_read); /* dummy read of FASZR */ return retval; } COMMAND_HANDLER(fm3_handle_chip_erase_command) { - int i; - if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (fm3_chip_erase(bank) == ERROR_OK) { - /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) - bank->sectors[i].is_erased = 1; - - command_print(CMD_CTX, "fm3 chip erase complete"); + command_print(CMD, "fm3 chip erase complete"); } else { - command_print(CMD_CTX, "fm3 chip erase failed"); + command_print(CMD, "fm3 chip erase failed"); } return ERROR_OK; @@ -896,7 +971,7 @@ static const struct command_registration fm3_command_handlers[] = { COMMAND_REGISTRATION_DONE }; -struct flash_driver fm3_flash = { +const struct flash_driver fm3_flash = { .name = "fm3", .commands = fm3_command_handlers, .flash_bank_command = fm3_flash_bank_command, @@ -905,5 +980,5 @@ struct flash_driver fm3_flash = { .probe = fm3_probe, .auto_probe = fm3_auto_probe, .erase_check = default_flash_blank_check, - .info = fm3_info, + .free_driver_priv = default_flash_free_driver_priv, };