X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Ffm3.c;h=6269a6536c683259d39cc0e60f39ec3c4f5bcd66;hp=e852589bdf21ecbcfb3ba87e1dce2ae73d68a541;hb=d0e763ac7ef6aa17b17bd00ccdfbccfb4eacda69;hpb=dad38502643de668d751c6a5ff23334270e650b7 diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c index e852589bdf..6269a6536c 100644 --- a/src/flash/nor/fm3.c +++ b/src/flash/nor/fm3.c @@ -1,9 +1,11 @@ /*************************************************************************** * Copyright (C) 2011 by Marc Willam, Holger Wech * - * openOCD.fseu(AT)de.fujitsu.com * - * * + * openOCD.fseu(AT)de.fujitsu.com * * Copyright (C) 2011 Ronny Strutz * * * + * Copyright (C) 2013 Nemui Trinomius * + * nemuisan_kawausogasuki@live.jp * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -15,9 +17,7 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * along with this program. If not, see . * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -29,35 +29,36 @@ #include #include -#define FLASH_DQ6 0x00000040 /* Data toggle flag bit (TOGG) */ -#define FLASH_DQ5 0x00000020 /* Time limit exceeding flag bit (TLOV) */ +#define FLASH_DQ6 0x40 /* Data toggle flag bit (TOGG) position */ +#define FLASH_DQ5 0x20 /* Time limit exceeding flag bit (TLOV) position */ -enum fm3_variant -{ +enum fm3_variant { mb9bfxx1, /* Flash Type '1' */ mb9bfxx2, mb9bfxx3, mb9bfxx4, mb9bfxx5, mb9bfxx6, + mb9bfxx7, + mb9bfxx8, + mb9afxx1, /* Flash Type '2' */ mb9afxx2, mb9afxx3, mb9afxx4, mb9afxx5, - mb9afxx6 + mb9afxx6, + mb9afxx7, + mb9afxx8, }; -enum fm3_flash_type -{ +enum fm3_flash_type { fm3_no_flash_type = 0, fm3_flash_type1 = 1, fm3_flash_type2 = 2 }; -struct fm3_flash_bank -{ - struct working_area *write_algorithm; +struct fm3_flash_bank { enum fm3_variant variant; enum fm3_flash_type flashtype; int probed; @@ -68,87 +69,69 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) struct fm3_flash_bank *fm3_info; if (CMD_ARGC < 6) - { - LOG_WARNING("incomplete flash_bank fm3 configuration"); - return ERROR_FLASH_BANK_INVALID; - } + return ERROR_COMMAND_SYNTAX_ERROR; fm3_info = malloc(sizeof(struct fm3_flash_bank)); bank->driver_priv = fm3_info; /* Flash type '1' */ - if (strcmp(CMD_ARGV[5], "mb9bfxx1.cpu") == 0) - { + if (strcmp(CMD_ARGV[5], "mb9bfxx1.cpu") == 0) { fm3_info->variant = mb9bfxx1; fm3_info->flashtype = fm3_flash_type1; - } - else if (strcmp(CMD_ARGV[5], "mb9bfxx2.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9bfxx2.cpu") == 0) { fm3_info->variant = mb9bfxx2; fm3_info->flashtype = fm3_flash_type1; - } - else if (strcmp(CMD_ARGV[5], "mb9bfxx3.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9bfxx3.cpu") == 0) { fm3_info->variant = mb9bfxx3; fm3_info->flashtype = fm3_flash_type1; - } - else if (strcmp(CMD_ARGV[5], "mb9bfxx4.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9bfxx4.cpu") == 0) { fm3_info->variant = mb9bfxx4; fm3_info->flashtype = fm3_flash_type1; - } - else if (strcmp(CMD_ARGV[5], "mb9bfxx5.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9bfxx5.cpu") == 0) { fm3_info->variant = mb9bfxx5; fm3_info->flashtype = fm3_flash_type1; - } - else if (strcmp(CMD_ARGV[5], "mb9bfxx6.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9bfxx6.cpu") == 0) { fm3_info->variant = mb9bfxx6; fm3_info->flashtype = fm3_flash_type1; - } - - /* Flash type '2' */ - else if (strcmp(CMD_ARGV[5], "mb9afxx1.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9bfxx7.cpu") == 0) { + fm3_info->variant = mb9bfxx7; + fm3_info->flashtype = fm3_flash_type1; + } else if (strcmp(CMD_ARGV[5], "mb9bfxx8.cpu") == 0) { + fm3_info->variant = mb9bfxx8; + fm3_info->flashtype = fm3_flash_type1; + } else if (strcmp(CMD_ARGV[5], "mb9afxx1.cpu") == 0) { /* Flash type '2' */ fm3_info->variant = mb9afxx1; fm3_info->flashtype = fm3_flash_type2; - } - else if (strcmp(CMD_ARGV[5], "mb9afxx2.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9afxx2.cpu") == 0) { fm3_info->variant = mb9afxx2; fm3_info->flashtype = fm3_flash_type2; - } - else if (strcmp(CMD_ARGV[5], "mb9afxx3.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9afxx3.cpu") == 0) { fm3_info->variant = mb9afxx3; fm3_info->flashtype = fm3_flash_type2; - } - else if (strcmp(CMD_ARGV[5], "mb9afxx4.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9afxx4.cpu") == 0) { fm3_info->variant = mb9afxx4; fm3_info->flashtype = fm3_flash_type2; - } - else if (strcmp(CMD_ARGV[5], "mb9afxx5.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9afxx5.cpu") == 0) { fm3_info->variant = mb9afxx5; fm3_info->flashtype = fm3_flash_type2; - } - else if (strcmp(CMD_ARGV[5], "mb9afxx6.cpu") == 0) - { + } else if (strcmp(CMD_ARGV[5], "mb9afxx6.cpu") == 0) { fm3_info->variant = mb9afxx6; fm3_info->flashtype = fm3_flash_type2; + } else if (strcmp(CMD_ARGV[5], "mb9afxx7.cpu") == 0) { + fm3_info->variant = mb9afxx7; + fm3_info->flashtype = fm3_flash_type2; + } else if (strcmp(CMD_ARGV[5], "mb9afxx8.cpu") == 0) { + fm3_info->variant = mb9afxx8; + fm3_info->flashtype = fm3_flash_type2; } /* unknown Flash type */ - else - { + else { LOG_ERROR("unknown fm3 variant: %s", CMD_ARGV[5]); free(fm3_info); return ERROR_FLASH_BANK_INVALID; } - fm3_info->write_algorithm = NULL; fm3_info->probed = 0; return ERROR_OK; @@ -158,52 +141,46 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms) { int retval = ERROR_OK; - uint16_t state1, state2; + uint8_t state1, state2; int ms = 0; /* While(1) loop exit via "break" and "return" on error */ - while(1) - { + while (1) { /* dummy-read - see flash manual */ - retval = target_read_u16(target, offset, &state1); + retval = target_read_u8(target, offset, &state1); if (retval != ERROR_OK) return retval; /* Data polling 1 */ - retval = target_read_u16(target, offset, &state1); + retval = target_read_u8(target, offset, &state1); if (retval != ERROR_OK) return retval; /* Data polling 2 */ - retval = target_read_u16(target, offset, &state2); + retval = target_read_u8(target, offset, &state2); if (retval != ERROR_OK) return retval; /* Flash command finished via polled data equal? */ - if ( (state1 & FLASH_DQ6) == (state2 & FLASH_DQ6) ) - { + if ((state1 & FLASH_DQ6) == (state2 & FLASH_DQ6)) break; - } /* Timeout Flag? */ - else if (state1 & FLASH_DQ5) - { + else if (state1 & FLASH_DQ5) { /* Retry data polling */ /* Data polling 1 */ - retval = target_read_u16(target, offset, &state1); + retval = target_read_u8(target, offset, &state1); if (retval != ERROR_OK) return retval; /* Data polling 2 */ - retval = target_read_u16(target, offset, &state2); + retval = target_read_u8(target, offset, &state2); if (retval != ERROR_OK) return retval; /* Flash command finished via polled data equal? */ - if ( (state1 & FLASH_DQ6) != (state2 & FLASH_DQ6) ) - { + if ((state1 & FLASH_DQ6) != (state2 & FLASH_DQ6)) return ERROR_FLASH_OPERATION_FAILED; - } /* finish anyway */ break; @@ -212,15 +189,14 @@ static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms) ++ms; /* Polling time exceeded? */ - if (ms > timeout_ms) - { + if (ms > timeout_ms) { LOG_ERROR("Polling data reading timed out!"); return ERROR_FLASH_OPERATION_FAILED; } } if (retval == ERROR_OK) - LOG_DEBUG("fm3_busy_wait(%x) needs about %d ms", offset, ms); + LOG_DEBUG("fm3_busy_wait(%" PRIx32 ") needs about %d ms", offset, ms); return retval; } @@ -236,20 +212,19 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) uint32_t u32FlashSeqAddress1; uint32_t u32FlashSeqAddress2; + struct working_area *write_algorithm; + struct reg_param reg_params[3]; + struct armv7m_algorithm armv7m_info; + u32FlashType = (uint32_t) fm3_info->flashtype; - if (u32FlashType == fm3_flash_type1) - { + if (u32FlashType == fm3_flash_type1) { u32FlashSeqAddress1 = 0x00001550; u32FlashSeqAddress2 = 0x00000AA8; - } - else if (u32FlashType == fm3_flash_type2) - { + } else if (u32FlashType == fm3_flash_type2) { u32FlashSeqAddress1 = 0x00000AA8; u32FlashSeqAddress2 = 0x00000554; - } - else - { + } else { LOG_ERROR("Flash/Device type unknown!"); return ERROR_FLASH_OPERATION_FAILED; } @@ -259,7 +234,46 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) return ERROR_TARGET_NOT_HALTED; } - LOG_INFO("Fujitsu MB9Bxxx: Sector Erase ... (%d to %d)", first, last); + /* RAMCODE used for fm3 Flash sector erase: */ + /* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */ + /* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */ + /* R2 keeps Flash Offset address (ofs) */ + static const uint8_t fm3_flash_erase_sector_code[] = { + /* *(uint16_t*)u32FlashSeq1 = 0xAA; */ + 0xAA, 0x24, /* MOVS R4, #0xAA */ + 0x04, 0x80, /* STRH R4, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq2 = 0x55; */ + 0x55, 0x23, /* MOVS R3, #0x55 */ + 0x0B, 0x80, /* STRH R3, [R1, #0] */ + /* *(uint16_t*)u32FlashSeq1 = 0x80; */ + 0x80, 0x25, /* MOVS R5, #0x80 */ + 0x05, 0x80, /* STRH R5, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq1 = 0xAA; */ + 0x04, 0x80, /* STRH R4, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq2 = 0x55; */ + 0x0B, 0x80, /* STRH R3, [R1, #0] */ + /* Sector_Erase Command (0x30) */ + /* *(uint16_t*)ofs = 0x30; */ + 0x30, 0x20, /* MOVS R0, #0x30 */ + 0x10, 0x80, /* STRH R0, [R2, #0] */ + /* End Code */ + 0x00, 0xBE, /* BKPT #0 */ + }; + + LOG_INFO("Fujitsu MB9[A/B]FXXX: Sector Erase ... (%d to %d)", first, last); + + /* disable HW watchdog */ + retval = target_write_u32(target, 0x40011C00, 0x1ACCE551); + if (retval != ERROR_OK) + return retval; + + retval = target_write_u32(target, 0x40011C00, 0xE5331AAE); + if (retval != ERROR_OK) + return retval; + + retval = target_write_u32(target, 0x40011008, 0x00000000); + if (retval != ERROR_OK) + return retval; /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash acccess) */ retval = target_write_u32(target, 0x40000000, 0x0001); @@ -271,40 +285,43 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - for (sector = first ; sector <= last ; sector++) - { - uint32_t offset = bank->sectors[sector].offset; - - for (odd = 0; odd < 2 ; odd++) - { - if (odd) - offset += 4; + /* allocate working area with flash sector erase code */ + if (target_alloc_working_area(target, sizeof(fm3_flash_erase_sector_code), + &write_algorithm) != ERROR_OK) { + LOG_WARNING("no working area available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + retval = target_write_buffer(target, write_algorithm->address, + sizeof(fm3_flash_erase_sector_code), fm3_flash_erase_sector_code); + if (retval != ERROR_OK) + return retval; - /* Flash unlock sequence */ - retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA); - if (retval != ERROR_OK) - return retval; + armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; + armv7m_info.core_mode = ARM_MODE_THREAD; - retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055); - if (retval != ERROR_OK) - return retval; + init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */ + init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */ + init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* offset */ - retval = target_write_u16(target, u32FlashSeqAddress1, 0x0080); - if (retval != ERROR_OK) - return retval; + /* write code buffer and use Flash sector erase code within fm3 */ + for (sector = first ; sector <= last ; sector++) { + uint32_t offset = bank->sectors[sector].offset; - retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA); - if (retval != ERROR_OK) - return retval; + for (odd = 0; odd < 2 ; odd++) { + if (odd) + offset += 4; - retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055); - if (retval != ERROR_OK) - return retval; + buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1); + buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2); + buf_set_u32(reg_params[2].value, 0, 32, offset); - /* Sector erase command (0x0030) */ - retval = target_write_u16(target, offset, 0x0030); - if (retval != ERROR_OK) + retval = target_run_algorithm(target, 0, NULL, 3, reg_params, + write_algorithm->address, 0, 100000, &armv7m_info); + if (retval != ERROR_OK) { + LOG_ERROR("Error executing flash erase programming algorithm"); + retval = ERROR_FLASH_OPERATION_FAILED; return retval; + } retval = fm3_busy_wait(target, offset, 500); if (retval != ERROR_OK) @@ -313,23 +330,28 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) bank->sectors[sector].is_erased = 1; } + target_free_working_area(target, write_algorithm); + destroy_reg_param(®_params[0]); + destroy_reg_param(®_params[1]); + destroy_reg_param(®_params[2]); + /* FASZR = 0x02, Enables CPU Run Mode (32-bit Flash acccess) */ retval = target_write_u32(target, 0x40000000, 0x0002); if (retval != ERROR_OK) return retval; - /* dummy read of FASZR */ - retval = target_read_u32(target, 0x40000000, &u32DummyRead); + retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */ return retval; } -static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, +static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { struct fm3_flash_bank *fm3_info = bank->driver_priv; struct target *target = bank->target; - uint32_t buffer_size = 2048; /* 8192 for MB9Bxx6! */ + uint32_t buffer_size = 2048; /* Default minimum value */ + struct working_area *write_algorithm; struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[6]; @@ -339,20 +361,19 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t u32FlashSeqAddress1; uint32_t u32FlashSeqAddress2; + /* Increase buffer_size if needed */ + if (buffer_size < (target->working_area_size / 2)) + buffer_size = (target->working_area_size / 2); + u32FlashType = (uint32_t) fm3_info->flashtype; - if (u32FlashType == fm3_flash_type1) - { + if (u32FlashType == fm3_flash_type1) { u32FlashSeqAddress1 = 0x00001550; u32FlashSeqAddress2 = 0x00000AA8; - } - else if (u32FlashType == fm3_flash_type2) - { + } else if (u32FlashType == fm3_flash_type2) { u32FlashSeqAddress1 = 0x00000AA8; u32FlashSeqAddress2 = 0x00000554; - } - else - { + } else { LOG_ERROR("Flash/Device type unknown!"); return ERROR_FLASH_OPERATION_FAILED; } @@ -365,7 +386,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, /* R4 keeps Flash Sequence address 2 (u32FlashSeq2) */ /* R5 returns result value (u32FlashResult) */ - const uint8_t fm3_flash_write_code[] = { + static const uint8_t fm3_flash_write_code[] = { /* fm3_FLASH_IF->FASZ &= 0xFFFD; */ 0x5F, 0xF0, 0x80, 0x45, /* MOVS.W R5, #(fm3_FLASH_IF->FASZ) */ 0x2D, 0x68, /* LDR R5, [R5] */ @@ -483,13 +504,14 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, 0x00, 0xBE, /* BKPT #0 */ /* The following address pointers assume, that the code is running from */ - /* address 0x1FFF8008. These address pointers will be patched, if a */ + /* SRAM basic-address + 8.These address pointers will be patched, if a */ /* different start address in RAM is used (e.g. for Flash type 2)! */ - 0x00, 0x80, 0xFF, 0x1F, /* u32DummyRead address in RAM (0x1FFF8000) */ - 0x04, 0x80, 0xFF, 0x1F /* u32FlashResult address in RAM (0x1FFF8004) */ + /* Default SRAM basic-address is 0x20000000. */ + 0x00, 0x00, 0x00, 0x20, /* u32DummyRead address in RAM (0x20000000) */ + 0x04, 0x00, 0x00, 0x20 /* u32FlashResult address in RAM (0x20000004) */ }; - LOG_INFO("Fujitsu MB9B500: FLASH Write ..."); + LOG_INFO("Fujitsu MB9[A/B]FXXX: FLASH Write ..."); /* disable HW watchdog */ retval = target_write_u32(target, 0x40011C00, 0x1ACCE551); @@ -507,36 +529,43 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, count = count / 2; /* number bytes -> number halfwords */ /* check code alignment */ - if (offset & 0x1) - { + if (offset & 0x1) { LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } - /* allocate working area with flash programming code */ - if (target_alloc_working_area(target, sizeof(fm3_flash_write_code), - &fm3_info->write_algorithm) != ERROR_OK) - { + /* allocate working area and variables with flash programming code */ + if (target_alloc_working_area(target, sizeof(fm3_flash_write_code) + 8, + &write_algorithm) != ERROR_OK) { LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - retval = target_write_buffer(target, fm3_info->write_algorithm->address, + retval = target_write_buffer(target, write_algorithm->address + 8, sizeof(fm3_flash_write_code), fm3_flash_write_code); if (retval != ERROR_OK) return retval; + /* Patching 'local variable address' */ + /* Algorithm: u32DummyRead: */ + retval = target_write_u32(target, (write_algorithm->address + 8) + + sizeof(fm3_flash_write_code) - 8, (write_algorithm->address)); + if (retval != ERROR_OK) + return retval; + /* Algorithm: u32FlashResult: */ + retval = target_write_u32(target, (write_algorithm->address + 8) + + sizeof(fm3_flash_write_code) - 4, (write_algorithm->address) + 4); + if (retval != ERROR_OK) + return retval; + + + /* memory buffer */ - while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) - { + while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) { buffer_size /= 2; - if (buffer_size <= 256) - { - /* free working area, if write algorithm already allocated */ - if (fm3_info->write_algorithm) - { - target_free_working_area(target, fm3_info->write_algorithm); - } + if (buffer_size <= 256) { + /* free working area, write algorithm already allocated */ + target_free_working_area(target, write_algorithm); LOG_WARNING("No large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; @@ -544,7 +573,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, } armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARMV7M_MODE_ANY; + armv7m_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* source start address */ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* target start address */ @@ -553,36 +582,12 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* Flash Sequence address 1 */ init_reg_param(®_params[5], "r5", 32, PARAM_IN); /* result */ - /* write code buffer and use Flash programming code within fm3 */ - /* Set breakpoint to 0 with time-out of 1000 ms */ - while (count > 0) - { + /* write code buffer and use Flash programming code within fm3 */ + /* Set breakpoint to 0 with time-out of 1000 ms */ + while (count > 0) { uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count; - retval = target_write_buffer(target, fm3_info->write_algorithm->address, - 8, fm3_flash_write_code); - if (retval != ERROR_OK) - break; - - /* Patching 'local variable address' for different RAM addresses */ - if (fm3_info->write_algorithm->address != 0x1FFF8008) - { - /* Algorithm: u32DummyRead: */ - retval = target_write_u32(target, (fm3_info->write_algorithm->address) - + sizeof(fm3_flash_write_code) - 8, - (fm3_info->write_algorithm->address) - 8); - if (retval != ERROR_OK) - break; - - /* Algorithm: u32FlashResult: */ - retval = target_write_u32(target, (fm3_info->write_algorithm->address) - + sizeof(fm3_flash_write_code) - 4, (fm3_info->write_algorithm->address) - 4); - if (retval != ERROR_OK) - break; - } - - retval = target_write_buffer(target, source->address, thisrun_count * 2, - buffer); + retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer); if (retval != ERROR_OK) break; @@ -593,18 +598,16 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2); retval = target_run_algorithm(target, 0, NULL, 6, reg_params, - fm3_info->write_algorithm->address, 0, 1000, &armv7m_info); - if (retval != ERROR_OK) - { + (write_algorithm->address + 8), 0, 1000, &armv7m_info); + if (retval != ERROR_OK) { LOG_ERROR("Error executing fm3 Flash programming algorithm"); retval = ERROR_FLASH_OPERATION_FAILED; break; } - if (buf_get_u32(reg_params[5].value, 0, 32) != ERROR_OK) - { - LOG_ERROR("Fujitsu MB9[A/B]FXXX: Flash programming ERROR (Timeout) \ - -> Reg R3: %x", buf_get_u32(reg_params[5].value, 0, 32)); + if (buf_get_u32(reg_params[5].value, 0, 32) != ERROR_OK) { + LOG_ERROR("Fujitsu MB9[A/B]FXXX: Flash programming ERROR (Timeout) -> Reg R3: %" PRIx32, + buf_get_u32(reg_params[5].value, 0, 32)); retval = ERROR_FLASH_OPERATION_FAILED; break; } @@ -615,7 +618,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, } target_free_working_area(target, source); - target_free_working_area(target, fm3_info->write_algorithm); + target_free_working_area(target, write_algorithm); destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); @@ -632,13 +635,27 @@ static int fm3_probe(struct flash_bank *bank) struct fm3_flash_bank *fm3_info = bank->driver_priv; uint16_t num_pages; - if (bank->target->state != TARGET_HALTED) - { + if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - num_pages = 6; /* max number of Flash pages for malloc */ +/* + -- page-- start -- blocksize - mpu - totalFlash -- + page0 0x00000 16k + page1 0x04000 16k + page2 0x08000 96k ___ fxx3 128k Flash + page3 0x20000 128k ___ fxx4 256k Flash + page4 0x40000 128k ___ fxx5 384k Flash + page5 0x60000 128k ___ fxx6 512k Flash +----------------------- + page6 0x80000 128k + page7 0xa0000 128k ___ fxx7 256k Flash + page8 0xc0000 128k + page9 0xe0000 128k ___ fxx8 256k Flash + */ + + num_pages = 10; /* max number of Flash pages for malloc */ fm3_info->probed = 0; bank->sectors = malloc(sizeof(struct flash_sector) * num_pages); @@ -655,8 +672,8 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[1].is_erased = -1; bank->sectors[1].is_protected = -1; - if ((fm3_info->variant == mb9bfxx1) || (fm3_info->variant == mb9afxx1)) - { + if ((fm3_info->variant == mb9bfxx1) + || (fm3_info->variant == mb9afxx1)) { num_pages = 3; bank->size = 64 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -671,11 +688,14 @@ static int fm3_probe(struct flash_bank *bank) || (fm3_info->variant == mb9bfxx4) || (fm3_info->variant == mb9bfxx5) || (fm3_info->variant == mb9bfxx6) + || (fm3_info->variant == mb9bfxx7) + || (fm3_info->variant == mb9bfxx8) || (fm3_info->variant == mb9afxx2) || (fm3_info->variant == mb9afxx4) || (fm3_info->variant == mb9afxx5) - || (fm3_info->variant == mb9afxx6)) - { + || (fm3_info->variant == mb9afxx6) + || (fm3_info->variant == mb9afxx7) + || (fm3_info->variant == mb9afxx8)) { num_pages = 3; bank->size = 128 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -689,10 +709,13 @@ static int fm3_probe(struct flash_bank *bank) if ((fm3_info->variant == mb9bfxx4) || (fm3_info->variant == mb9bfxx5) || (fm3_info->variant == mb9bfxx6) + || (fm3_info->variant == mb9bfxx7) + || (fm3_info->variant == mb9bfxx8) || (fm3_info->variant == mb9afxx4) || (fm3_info->variant == mb9afxx5) - || (fm3_info->variant == mb9afxx6)) - { + || (fm3_info->variant == mb9afxx6) + || (fm3_info->variant == mb9afxx7) + || (fm3_info->variant == mb9afxx8)) { num_pages = 4; bank->size = 256 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -705,9 +728,12 @@ static int fm3_probe(struct flash_bank *bank) if ((fm3_info->variant == mb9bfxx5) || (fm3_info->variant == mb9bfxx6) + || (fm3_info->variant == mb9bfxx7) + || (fm3_info->variant == mb9bfxx8) || (fm3_info->variant == mb9afxx5) - || (fm3_info->variant == mb9afxx6)) - { + || (fm3_info->variant == mb9afxx6) + || (fm3_info->variant == mb9afxx7) + || (fm3_info->variant == mb9afxx8)) { num_pages = 5; bank->size = 384 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -719,8 +745,11 @@ static int fm3_probe(struct flash_bank *bank) } if ((fm3_info->variant == mb9bfxx6) - || (fm3_info->variant == mb9afxx6)) - { + || (fm3_info->variant == mb9bfxx7) + || (fm3_info->variant == mb9bfxx8) + || (fm3_info->variant == mb9afxx6) + || (fm3_info->variant == mb9afxx7) + || (fm3_info->variant == mb9afxx8)) { num_pages = 6; bank->size = 512 * 1024; /* bytes */ bank->num_sectors = num_pages; @@ -731,6 +760,42 @@ static int fm3_probe(struct flash_bank *bank) bank->sectors[5].is_protected = -1; } + if ((fm3_info->variant == mb9bfxx7) + || (fm3_info->variant == mb9bfxx8) + || (fm3_info->variant == mb9afxx7) + || (fm3_info->variant == mb9afxx8)) { + num_pages = 8; + bank->size = 768 * 1024; /* bytes */ + bank->num_sectors = num_pages; + + bank->sectors[6].offset = 0x80000; + bank->sectors[6].size = 128 * 1024; + bank->sectors[6].is_erased = -1; + bank->sectors[6].is_protected = -1; + + bank->sectors[7].offset = 0xa0000; + bank->sectors[7].size = 128 * 1024; + bank->sectors[7].is_erased = -1; + bank->sectors[7].is_protected = -1; + } + + if ((fm3_info->variant == mb9bfxx8) + || (fm3_info->variant == mb9afxx8)) { + num_pages = 10; + bank->size = 1024 * 1024; /* bytes */ + bank->num_sectors = num_pages; + + bank->sectors[8].offset = 0xc0000; + bank->sectors[8].size = 128 * 1024; + bank->sectors[8].is_erased = -1; + bank->sectors[8].is_protected = -1; + + bank->sectors[9].offset = 0xe0000; + bank->sectors[9].size = 128 * 1024; + bank->sectors[9].is_erased = -1; + bank->sectors[9].is_protected = -1; + } + fm3_info->probed = 1; return ERROR_OK; @@ -744,87 +809,123 @@ static int fm3_auto_probe(struct flash_bank *bank) return fm3_probe(bank); } -static int fm3_info_cmd(struct flash_bank *bank, char *buf, int buf_size) -{ - snprintf(buf, buf_size, "Fujitsu fm3 Device does not support Chip-ID (Type unknown)"); - return ERROR_OK; -} - +/* Chip erase */ static int fm3_chip_erase(struct flash_bank *bank) { struct target *target = bank->target; - struct fm3_flash_bank *fm3_info = bank->driver_priv; + struct fm3_flash_bank *fm3_info2 = bank->driver_priv; int retval = ERROR_OK; uint32_t u32DummyRead; uint32_t u32FlashType; uint32_t u32FlashSeqAddress1; uint32_t u32FlashSeqAddress2; - u32FlashType = (uint32_t) fm3_info->flashtype; + struct working_area *write_algorithm; + struct reg_param reg_params[3]; + struct armv7m_algorithm armv7m_info; - if (u32FlashType == fm3_flash_type1) - { + u32FlashType = (uint32_t) fm3_info2->flashtype; + + if (u32FlashType == fm3_flash_type1) { LOG_INFO("*** Erasing mb9bfxxx type"); u32FlashSeqAddress1 = 0x00001550; u32FlashSeqAddress2 = 0x00000AA8; - } - else if (u32FlashType == fm3_flash_type2) - { + } else if (u32FlashType == fm3_flash_type2) { LOG_INFO("*** Erasing mb9afxxx type"); u32FlashSeqAddress1 = 0x00000AA8; u32FlashSeqAddress2 = 0x00000554; - } - else - { + } else { LOG_ERROR("Flash/Device type unknown!"); return ERROR_FLASH_OPERATION_FAILED; } - if (target->state != TARGET_HALTED) - { + if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - LOG_INFO("Fujitsu MB9[AB]xxx: Chip Erase ... (may take several seconds)"); + /* RAMCODE used for fm3 Flash chip erase: */ + /* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */ + /* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */ + static const uint8_t fm3_flash_erase_chip_code[] = { + /* *(uint16_t*)u32FlashSeq1 = 0xAA; */ + 0xAA, 0x22, /* MOVS R2, #0xAA */ + 0x02, 0x80, /* STRH R2, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq2 = 0x55; */ + 0x55, 0x23, /* MOVS R3, #0x55 */ + 0x0B, 0x80, /* STRH R3, [R1, #0] */ + /* *(uint16_t*)u32FlashSeq1 = 0x80; */ + 0x80, 0x24, /* MOVS R4, #0x80 */ + 0x04, 0x80, /* STRH R4, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq1 = 0xAA; */ + 0x02, 0x80, /* STRH R2, [R0, #0] */ + /* *(uint16_t*)u32FlashSeq2 = 0x55; */ + 0x0B, 0x80, /* STRH R3, [R1, #0] */ + /* Chip_Erase Command 0x10 */ + /* *(uint16_t*)u32FlashSeq1 = 0x10; */ + 0x10, 0x21, /* MOVS R1, #0x10 */ + 0x01, 0x80, /* STRH R1, [R0, #0] */ + /* End Code */ + 0x00, 0xBE, /* BKPT #0 */ + }; - /* Implement Flash chip erase (mass erase) completely on host */ + LOG_INFO("Fujitsu MB9[A/B]xxx: Chip Erase ... (may take several seconds)"); - /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */ - retval = target_write_u32(target, 0x40000000, 0x0001); + /* disable HW watchdog */ + retval = target_write_u32(target, 0x40011C00, 0x1ACCE551); if (retval != ERROR_OK) return retval; - /* dummy read of FASZR */ - retval = target_read_u32(target, 0x40000000, &u32DummyRead); + retval = target_write_u32(target, 0x40011C00, 0xE5331AAE); if (retval != ERROR_OK) return retval; - /* Flash unlock sequence */ - retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA); + retval = target_write_u32(target, 0x40011008, 0x00000000); if (retval != ERROR_OK) return retval; - retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055); + /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */ + retval = target_write_u32(target, 0x40000000, 0x0001); if (retval != ERROR_OK) return retval; - retval = target_write_u16(target, u32FlashSeqAddress1, 0x0080); + /* dummy read of FASZR */ + retval = target_read_u32(target, 0x40000000, &u32DummyRead); if (retval != ERROR_OK) return retval; - retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA); + /* allocate working area with flash chip erase code */ + if (target_alloc_working_area(target, sizeof(fm3_flash_erase_chip_code), + &write_algorithm) != ERROR_OK) { + LOG_WARNING("no working area available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + retval = target_write_buffer(target, write_algorithm->address, + sizeof(fm3_flash_erase_chip_code), fm3_flash_erase_chip_code); if (retval != ERROR_OK) return retval; - retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055); - if (retval != ERROR_OK) - return retval; + armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; + armv7m_info.core_mode = ARM_MODE_THREAD; - /* Chip Erase command (0x0010) */ - retval = target_write_u16(target, u32FlashSeqAddress1, 0x0010); - if (retval != ERROR_OK) + init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */ + init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */ + + buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1); + buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2); + + retval = target_run_algorithm(target, 0, NULL, 2, reg_params, + write_algorithm->address, 0, 100000, &armv7m_info); + if (retval != ERROR_OK) { + LOG_ERROR("Error executing flash erase programming algorithm"); + retval = ERROR_FLASH_OPERATION_FAILED; return retval; + } + + target_free_working_area(target, write_algorithm); + + destroy_reg_param(®_params[0]); + destroy_reg_param(®_params[1]); retval = fm3_busy_wait(target, u32FlashSeqAddress2, 20000); /* 20s timeout */ if (retval != ERROR_OK) @@ -835,8 +936,7 @@ static int fm3_chip_erase(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - /* dummy read of FASZR */ - retval = target_read_u32(target, 0x40000000, &u32DummyRead); + retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */ return retval; } @@ -846,26 +946,20 @@ COMMAND_HANDLER(fm3_handle_chip_erase_command) int i; if (CMD_ARGC < 1) - { - command_print(CMD_CTX, "fm3 chip_erase "); - return ERROR_OK; - } + return ERROR_COMMAND_SYNTAX_ERROR; struct flash_bank *bank; int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); if (ERROR_OK != retval) return retval; - if (fm3_chip_erase(bank) == ERROR_OK) - { + if (fm3_chip_erase(bank) == ERROR_OK) { /* set all sectors as erased */ for (i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD_CTX, "fm3 chip erase complete"); - } - else - { + } else { command_print(CMD_CTX, "fm3 chip erase failed"); } @@ -875,9 +969,9 @@ COMMAND_HANDLER(fm3_handle_chip_erase_command) static const struct command_registration fm3_exec_command_handlers[] = { { .name = "chip_erase", + .usage = "", .handler = fm3_handle_chip_erase_command, .mode = COMMAND_EXEC, - .usage = "bank_id", .help = "Erase entire Flash device.", }, COMMAND_REGISTRATION_DONE @@ -888,6 +982,7 @@ static const struct command_registration fm3_command_handlers[] = { .name = "fm3", .mode = COMMAND_ANY, .help = "fm3 Flash command group", + .usage = "", .chain = fm3_exec_command_handlers, }, COMMAND_REGISTRATION_DONE @@ -901,6 +996,5 @@ struct flash_driver fm3_flash = { .write = fm3_write_block, .probe = fm3_probe, .auto_probe = fm3_auto_probe, - .erase_check = default_flash_mem_blank_check, - .info = fm3_info_cmd, + .erase_check = default_flash_blank_check, };