X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fcfi.c;h=f7d8a90f181303e76873746bd4c56b7882e24936;hp=81a58cec6569773bf0476ce5ff5713e8f9ed4f45;hb=12ff09f7f27a707fe42226262f55b8ce8351cbf9;hpb=fc2abe63fd3cea7497da7be2955d333bd3f800b9 diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index 81a58cec65..f7d8a90f18 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -17,9 +17,7 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * along with this program. If not, see . * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -46,16 +44,19 @@ #define AT49BV6416 0x00d6 #define AT49BV6416T 0x00d2 -static struct cfi_unlock_addresses cfi_unlock_addresses[] = { +static const struct cfi_unlock_addresses cfi_unlock_addresses[] = { [CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa }, [CFI_UNLOCK_5555_2AAA] = { .unlock1 = 0x5555, .unlock2 = 0x2aaa }, }; +static const int cfi_status_poll_mask_dq6_dq7 = CFI_STATUS_POLL_MASK_DQ6_DQ7; + /* CFI fixups forward declarations */ -static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, void *param); -static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, void *param); -static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, void *param); -static void cfi_fixup_0002_write_buffer(struct flash_bank *bank, void *param); +static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *param); +static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, const void *param); +static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, const void *param); +static void cfi_fixup_0002_write_buffer(struct flash_bank *bank, const void *param); +static void cfi_fixup_0002_polling_bits(struct flash_bank *bank, const void *param); /* fixup after reading cmdset 0002 primary query table */ static const struct cfi_fixup cfi_0002_fixups[] = { @@ -71,6 +72,8 @@ static const struct cfi_fixup cfi_0002_fixups[] = { &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x274b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, + {CFI_MFR_SST, 0x235f, cfi_fixup_0002_polling_bits, /* 39VF3201C */ + &cfi_status_poll_mask_dq6_dq7}, {CFI_MFR_SST, 0x236d, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, {CFI_MFR_ATMEL, 0x00C8, cfi_fixup_reversed_erase_regions, NULL}, @@ -131,6 +134,7 @@ static inline uint32_t flash_address(struct flash_bank *bank, int sector, uint32 static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf) { int i; + struct cfi_flash_bank *cfi_info = bank->driver_priv; /* clear whole buffer, to ensure bits that exceed the bus_width * are set to zero @@ -138,7 +142,7 @@ static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf) for (i = 0; i < CFI_MAX_BUS_WIDTH; i++) cmd_buf[i] = 0; - if (bank->target->endianness == TARGET_LITTLE_ENDIAN) { + if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) { for (i = bank->bus_width; i > 0; i--) *cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd; } else { @@ -162,6 +166,7 @@ static int cfi_send_command(struct flash_bank *bank, uint8_t cmd, uint32_t addre static int cfi_query_u8(struct flash_bank *bank, int sector, uint32_t offset, uint8_t *val) { struct target *target = bank->target; + struct cfi_flash_bank *cfi_info = bank->driver_priv; uint8_t data[CFI_MAX_BUS_WIDTH]; int retval; @@ -170,7 +175,7 @@ static int cfi_query_u8(struct flash_bank *bank, int sector, uint32_t offset, ui if (retval != ERROR_OK) return retval; - if (bank->target->endianness == TARGET_LITTLE_ENDIAN) + if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) *val = data[0]; else *val = data[bank->bus_width - 1]; @@ -185,6 +190,7 @@ static int cfi_query_u8(struct flash_bank *bank, int sector, uint32_t offset, ui static int cfi_get_u8(struct flash_bank *bank, int sector, uint32_t offset, uint8_t *val) { struct target *target = bank->target; + struct cfi_flash_bank *cfi_info = bank->driver_priv; uint8_t data[CFI_MAX_BUS_WIDTH]; int i; @@ -194,7 +200,7 @@ static int cfi_get_u8(struct flash_bank *bank, int sector, uint32_t offset, uint if (retval != ERROR_OK) return retval; - if (bank->target->endianness == TARGET_LITTLE_ENDIAN) { + if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) { for (i = 0; i < bank->bus_width / bank->chip_width; i++) data[0] |= data[i]; @@ -231,7 +237,7 @@ static int cfi_query_u16(struct flash_bank *bank, int sector, uint32_t offset, u return retval; } - if (bank->target->endianness == TARGET_LITTLE_ENDIAN) + if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) *val = data[0] | data[bank->bus_width] << 8; else *val = data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8; @@ -261,7 +267,7 @@ static int cfi_query_u32(struct flash_bank *bank, int sector, uint32_t offset, u return retval; } - if (bank->target->endianness == TARGET_LITTLE_ENDIAN) + if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) *val = data[0] | data[bank->bus_width] << 8 | data[bank->bus_width * 2] << 16 | data[bank->bus_width * 3] << 24; else @@ -522,6 +528,11 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank) if (retval != ERROR_OK) return retval; + /* default values for implementation specific workarounds */ + pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1; + pri_ext->_unlock2 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock2; + pri_ext->_reversed_geometry = 0; + if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0)); if (retval != ERROR_OK) @@ -590,11 +601,6 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank) LOG_DEBUG("WP# protection 0x%x", pri_ext->TopBottom); - /* default values for implementation specific workarounds */ - pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1; - pri_ext->_unlock2 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock2; - pri_ext->_reversed_geometry = 0; - return ERROR_OK; } @@ -798,6 +804,7 @@ static int cfi_intel_info(struct flash_bank *bank, char *buf, int buf_size) FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command) { struct cfi_flash_bank *cfi_info; + int bus_swap = 0; if (CMD_ARGC < 6) return ERROR_COMMAND_SYNTAX_ERROR; @@ -827,14 +834,26 @@ FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command) cfi_info->x16_as_x8 = 0; cfi_info->jedec_probe = 0; cfi_info->not_cfi = 0; + cfi_info->data_swap = 0; for (unsigned i = 6; i < CMD_ARGC; i++) { if (strcmp(CMD_ARGV[i], "x16_as_x8") == 0) cfi_info->x16_as_x8 = 1; + else if (strcmp(CMD_ARGV[i], "data_swap") == 0) + cfi_info->data_swap = 1; + else if (strcmp(CMD_ARGV[i], "bus_swap") == 0) + bus_swap = 1; else if (strcmp(CMD_ARGV[i], "jedec_probe") == 0) cfi_info->jedec_probe = 1; } + if (bus_swap) + cfi_info->endianness = + bank->target->endianness == TARGET_LITTLE_ENDIAN ? + TARGET_BIG_ENDIAN : TARGET_LITTLE_ENDIAN; + else + cfi_info->endianness = bank->target->endianness; + /* bank wasn't probed yet */ cfi_info->qry[0] = 0xff; @@ -1098,19 +1117,6 @@ static int cfi_protect(struct flash_bank *bank, int set, int first, int last) } } -/* Convert code image to target endian - * FIXME create general block conversion fcts in target.c?) */ -static void cfi_fix_code_endian(struct target *target, uint8_t *dest, - const uint32_t *src, uint32_t count) -{ - uint32_t i; - for (i = 0; i < count; i++) { - target_buffer_set_u32(target, dest, *src); - dest += 4; - src++; - } -} - static uint32_t cfi_command_val(struct flash_bank *bank, uint8_t cmd) { struct target *target = bank->target; @@ -1134,7 +1140,7 @@ static uint32_t cfi_command_val(struct flash_bank *bank, uint8_t cmd) } } -static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, +static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t address, uint32_t count) { struct target *target = bank->target; @@ -1221,7 +1227,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, arm_algo.core_state = ARM_STATE_ARM; } else { LOG_ERROR("Unknown architecture"); - return ERROR_FAIL; + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } cfi_intel_clear_status_register(bank); @@ -1259,7 +1265,8 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, "Increase CFI_MAX_INTEL_CODESIZE and recompile."); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); + + target_buffer_set_u32_array(target, target_code, target_code_size / 4, target_code_src); /* Get memory for block write handler */ retval = target_alloc_working_area(target, @@ -1269,7 +1276,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, LOG_WARNING("No working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - ; /* write algorithm code to working area */ retval = target_write_buffer(target, write_algorithm->address, @@ -1291,7 +1297,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, goto cleanup; } } - ; /* setup algo registers */ init_reg_param(®_params[0], "r0", 32, PARAM_OUT); @@ -1386,7 +1391,7 @@ cleanup: return retval; } -static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffer, +static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t *buffer, uint32_t address, uint32_t count) { struct cfi_flash_bank *cfi_info = bank->driver_priv; @@ -1499,7 +1504,8 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffe LOG_ERROR("Out of memory"); return ERROR_FAIL; } - cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); + + target_buffer_set_u32_array(target, target_code, target_code_size / 4, target_code_src); /* allocate working area */ retval = target_alloc_working_area(target, target_code_size, @@ -1533,18 +1539,17 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffe return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } } - ; - init_reg_param(®_params[0], "a0", 32, PARAM_OUT); - init_reg_param(®_params[1], "a1", 32, PARAM_OUT); - init_reg_param(®_params[2], "a2", 32, PARAM_OUT); - init_reg_param(®_params[3], "a3", 32, PARAM_OUT); - init_reg_param(®_params[4], "t0", 32, PARAM_OUT); - init_reg_param(®_params[5], "t1", 32, PARAM_IN); - init_reg_param(®_params[6], "t4", 32, PARAM_OUT); - init_reg_param(®_params[7], "t5", 32, PARAM_OUT); - init_reg_param(®_params[8], "t6", 32, PARAM_OUT); - init_reg_param(®_params[9], "t7", 32, PARAM_OUT); + init_reg_param(®_params[0], "r4", 32, PARAM_OUT); + init_reg_param(®_params[1], "r5", 32, PARAM_OUT); + init_reg_param(®_params[2], "r6", 32, PARAM_OUT); + init_reg_param(®_params[3], "r7", 32, PARAM_OUT); + init_reg_param(®_params[4], "r8", 32, PARAM_OUT); + init_reg_param(®_params[5], "r9", 32, PARAM_IN); + init_reg_param(®_params[6], "r12", 32, PARAM_OUT); + init_reg_param(®_params[7], "r13", 32, PARAM_OUT); + init_reg_param(®_params[8], "r14", 32, PARAM_OUT); + init_reg_param(®_params[9], "r15", 32, PARAM_OUT); while (count > 0) { uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count; @@ -1598,7 +1603,7 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffe return retval; } -static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, +static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t address, uint32_t count) { struct cfi_flash_bank *cfi_info = bank->driver_priv; @@ -1695,7 +1700,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, 0xeafffffe /* b 81ac */ }; - /* see contib/loaders/flash/armv7m_cfi_span_16.s for src */ + /* see contrib/loaders/flash/armv7m_cfi_span_16.s for src */ static const uint32_t armv7m_word_16_code[] = { 0x5B02F830, 0x9000F8A8, @@ -1717,7 +1722,36 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, 0x0000BE00 }; - /* see contib/loaders/flash/armv4_5_cfi_span_16_dq7.s for src */ + /* see contrib/loaders/flash/armv7m_cfi_span_16_dq7.s for src */ + static const uint32_t armv7m_word_16_code_dq7only[] = { + /* 00000000 : */ + 0x5B02F830, /* ldrh.w r5, [r0], #2 */ + 0x9000F8A8, /* strh.w r9, [r8] */ + 0xB000F8AA, /* strh.w fp, [sl] */ + 0x3000F8A8, /* strh.w r3, [r8] */ + 0xBF00800D, /* strh r5, [r1, #0] */ + /* nop */ + + /* 00000014 : */ + 0xEA85880E, /* ldrh r6, [r1, #0] */ + /* eor.w r7, r5, r6 */ + 0x40270706, /* ands r7, r4 */ + 0x3A01D1FA, /* bne.n 14 */ + /* subs r2, #1 */ + 0xF101D002, /* beq.n 28 */ + 0xE7EB0102, /* add.w r1, r1, #2 */ + /* b.n 0 */ + + /* 00000028 : */ + 0x0580F04F, /* mov.w r5, #128 */ + 0xBF00E7FF, /* b.n 30 */ + /* nop (for alignment purposes) */ + + /* 00000030 : */ + 0x0000BE00 /* bkpt 0x0000 */ + }; + + /* see contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s for src */ static const uint32_t armv4_5_word_16_code_dq7only[] = { /* : */ 0xe0d050b2, /* ldrh r5, [r0], #2 */ @@ -1741,7 +1775,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, 0xeafffffe /* b 81ac */ }; - /* see contib/loaders/flash/armv4_5_cfi_span_8.s for src */ + /* see contrib/loaders/flash/armv4_5_cfi_span_8.s for src */ static const uint32_t armv4_5_word_8_code[] = { /* 000081b0 : */ 0xe4d05001, /* ldrb r5, [r0], #1 */ @@ -1778,7 +1812,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */ armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_algo.core_mode = ARM_MODE_ANY; + armv7m_algo.core_mode = ARM_MODE_THREAD; arm_algo = &armv7m_algo; } else if (is_arm(target_to_arm(target))) { /* All other ARM CPUs have 32 bit instructions */ @@ -1788,7 +1822,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, arm_algo = &armv4_5_algo; } else { LOG_ERROR("Unknown architecture"); - return ERROR_FAIL; + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } int target_code_size = 0; @@ -1817,11 +1851,13 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, } else { /* No DQ5 support. Use DQ7 DATA# polling only. */ if (is_armv7m(target_to_armv7m(target))) { - LOG_ERROR("Unknown ARM architecture"); - return ERROR_FAIL; + /* armv7m target */ + target_code_src = armv7m_word_16_code_dq7only; + target_code_size = sizeof(armv7m_word_16_code_dq7only); + } else { /* armv4_5 target */ + target_code_src = armv4_5_word_16_code_dq7only; + target_code_size = sizeof(armv4_5_word_16_code_dq7only); } - target_code_src = armv4_5_word_16_code_dq7only; - target_code_size = sizeof(armv4_5_word_16_code_dq7only); } break; case 4: @@ -1847,7 +1883,8 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, LOG_ERROR("Out of memory"); return ERROR_FAIL; } - cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); + + target_buffer_set_u32_array(target, target_code, target_code_size / 4, target_code_src); /* allocate working area */ retval = target_alloc_working_area(target, target_code_size, @@ -1881,7 +1918,6 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } } - ; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); init_reg_param(®_params[1], "r1", 32, PARAM_OUT); @@ -1963,7 +1999,9 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t uint8_t status; retval = cfi_intel_wait_status_busy(bank, cfi_info->word_write_timeout, &status); - if (retval != 0x80) { + if (retval != ERROR_OK) + return retval; + if (status != 0x80) { retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0)); if (retval != ERROR_OK) return retval; @@ -1976,7 +2014,7 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t return ERROR_OK; } -static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, +static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word, uint32_t wordcount, uint32_t address) { int retval; @@ -2096,7 +2134,7 @@ static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint3 return ERROR_OK; } -static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word, +static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word, uint32_t wordcount, uint32_t address) { int retval; @@ -2189,7 +2227,7 @@ static int cfi_write_word(struct flash_bank *bank, uint8_t *word, uint32_t addre return ERROR_FLASH_OPERATION_FAILED; } -static int cfi_write_words(struct flash_bank *bank, uint8_t *word, +static int cfi_write_words(struct flash_bank *bank, const uint8_t *word, uint32_t wordcount, uint32_t address) { struct cfi_flash_bank *cfi_info = bank->driver_priv; @@ -2271,7 +2309,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u } if (count) { - LOG_INFO("Fixup %d unaligned read tail bytes", count); + LOG_INFO("Fixup %" PRIu32 " unaligned read tail bytes", count); /* read a complete word from flash */ retval = target_read_memory(target, read_p, bank->bus_width, 1, current_word); @@ -2286,7 +2324,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u return ERROR_OK; } -static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; @@ -2296,6 +2334,8 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, int blk_count; /* number of bus_width bytes for block copy */ uint8_t current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being *programmed */ + uint8_t *swapped_buffer = NULL; + const uint8_t *real_buffer = NULL; int i; int retval; @@ -2322,8 +2362,14 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, return retval; /* replace only bytes that must be written */ - for (i = align; (i < bank->bus_width) && (count > 0); i++, count--) - current_word[i] = *buffer++; + for (i = align; + (i < bank->bus_width) && (count > 0); + i++, count--) + if (cfi_info->data_swap) + /* data bytes are swapped (reverse endianness) */ + current_word[bank->bus_width - i] = *buffer++; + else + current_word[i] = *buffer++; retval = cfi_write_word(bank, current_word, write_p); if (retval != ERROR_OK) @@ -2331,6 +2377,22 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, write_p += bank->bus_width; } + if (cfi_info->data_swap && count) { + swapped_buffer = malloc(count & ~(bank->bus_width - 1)); + switch (bank->bus_width) { + case 2: + buf_bswap16(swapped_buffer, buffer, + count & ~(bank->bus_width - 1)); + break; + case 4: + buf_bswap32(swapped_buffer, buffer, + count & ~(bank->bus_width - 1)); + break; + } + real_buffer = buffer; + buffer = swapped_buffer; + } + /* handle blocks of bus_size aligned bytes */ blk_count = count & ~(bank->bus_width - 1); /* round down, leave tail bytes */ switch (cfi_info->pri_id) { @@ -2400,6 +2462,11 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, return retval; } + if (swapped_buffer) { + buffer = real_buffer + (buffer - swapped_buffer); + free(swapped_buffer); + } + /* return to read array mode, so we can read from flash again for padding */ retval = cfi_reset(bank); if (retval != ERROR_OK) @@ -2416,7 +2483,11 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, /* replace only bytes that must be written */ for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--) - current_word[i] = *buffer++; + if (cfi_info->data_swap) + /* data bytes are swapped (reverse endianness) */ + current_word[bank->bus_width - i] = *buffer++; + else + current_word[i] = *buffer++; retval = cfi_write_word(bank, current_word, write_p); if (retval != ERROR_OK) @@ -2427,7 +2498,7 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, return cfi_reset(bank); } -static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, void *param) +static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, const void *param) { (void) param; struct cfi_flash_bank *cfi_info = bank->driver_priv; @@ -2436,7 +2507,7 @@ static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, void *para pri_ext->_reversed_geometry = 1; } -static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, void *param) +static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *param) { int i; struct cfi_flash_bank *cfi_info = bank->driver_priv; @@ -2457,16 +2528,24 @@ static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, void *param) } } -static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, void *param) +static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, const void *param) { struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; - struct cfi_unlock_addresses *unlock_addresses = param; + const struct cfi_unlock_addresses *unlock_addresses = param; pri_ext->_unlock1 = unlock_addresses->unlock1; pri_ext->_unlock2 = unlock_addresses->unlock2; } +static void cfi_fixup_0002_polling_bits(struct flash_bank *bank, const void *param) +{ + struct cfi_flash_bank *cfi_info = bank->driver_priv; + const int *status_poll_mask = param; + + cfi_info->status_poll_mask = *status_poll_mask; +} + static int cfi_query_string(struct flash_bank *bank, int address) { @@ -3028,7 +3107,7 @@ static int get_cfi_info(struct flash_bank *bank, char *buf, int buf_size) return ERROR_OK; } -static void cfi_fixup_0002_write_buffer(struct flash_bank *bank, void *param) +static void cfi_fixup_0002_write_buffer(struct flash_bank *bank, const void *param) { struct cfi_flash_bank *cfi_info = bank->driver_priv;