X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fath79.c;h=d73a4916fac1d2ebaf4147302dff9b533c823285;hp=05430850f4f41e3cfdbf99477830ed76b082c52d;hb=42f1cc576ab9b503fadd0b8916a139cd0bc6563e;hpb=6b9d19d3675a82ccc501fd7cba036c5b04d04590 diff --git a/src/flash/nor/ath79.c b/src/flash/nor/ath79.c index 05430850f4..d73a4916fa 100644 --- a/src/flash/nor/ath79.c +++ b/src/flash/nor/ath79.c @@ -136,9 +136,9 @@ static int ath79_spi_bitbang_codegen(struct ath79_flash_bank *ath79_info, const uint32_t preamble1[] = { /* $15 = MIPS32_PRACC_BASE_ADDR */ - MIPS32_LUI(15, PRACC_UPPER_BASE_ADDR), + MIPS32_LUI(0, 15, PRACC_UPPER_BASE_ADDR), /* $1 = io_base */ - MIPS32_LUI(1, UPPER16(io_base)), + MIPS32_LUI(0, 1, UPPER16(io_base)), }; ath79_pracc_addn(ctx, preamble1, ARRAY_SIZE(preamble1)); if (ath79_info->spi.pre_deselect) { @@ -148,31 +148,31 @@ static int ath79_spi_bitbang_codegen(struct ath79_flash_bank *ath79_info, ath79_info->spi.pre_deselect = 0; const uint32_t pre_deselect[] = { /* [$1 + FS] = 1 (enable flash io register access) */ - MIPS32_LUI(2, UPPER16(1)), - MIPS32_ORI(2, 2, LOWER16(1)), - MIPS32_SW(2, ATH79_REG_FS, 1), + MIPS32_LUI(0, 2, UPPER16(1)), + MIPS32_ORI(0, 2, 2, LOWER16(1)), + MIPS32_SW(0, 2, ATH79_REG_FS, 1), /* deselect flash just in case */ /* $2 = SPI_CS_DIS */ - MIPS32_LUI(2, UPPER16(cs_high)), - MIPS32_ORI(2, 2, LOWER16(cs_high)), + MIPS32_LUI(0, 2, UPPER16(cs_high)), + MIPS32_ORI(0, 2, 2, LOWER16(cs_high)), /* [$1 + WRITE] = $2 */ - MIPS32_SW(2, ATH79_REG_WRITE, 1), + MIPS32_SW(0, 2, ATH79_REG_WRITE, 1), }; ath79_pracc_addn(ctx, pre_deselect, ARRAY_SIZE(pre_deselect)); } const uint32_t preamble2[] = { /* t0 = CLOCK_LOW + 0-bit */ - MIPS32_LUI(8, UPPER16((clock_low + 0))), - MIPS32_ORI(8, 8, LOWER16((clock_low + 0))), + MIPS32_LUI(0, 8, UPPER16((clock_low + 0))), + MIPS32_ORI(0, 8, 8, LOWER16((clock_low + 0))), /* t1 = CLOCK_LOW + 1-bit */ - MIPS32_LUI(9, UPPER16((clock_low + 1))), - MIPS32_ORI(9, 9, LOWER16((clock_low + 1))), + MIPS32_LUI(0, 9, UPPER16((clock_low + 1))), + MIPS32_ORI(0, 9, 9, LOWER16((clock_low + 1))), /* t2 = CLOCK_HIGH + 0-bit */ - MIPS32_LUI(10, UPPER16((clock_high + 0))), - MIPS32_ORI(10, 10, LOWER16((clock_high + 0))), + MIPS32_LUI(0, 10, UPPER16((clock_high + 0))), + MIPS32_ORI(0, 10, 10, LOWER16((clock_high + 0))), /* t3 = CLOCK_HIGH + 1-bit */ - MIPS32_LUI(11, UPPER16((clock_high + 1))), - MIPS32_ORI(11, 11, LOWER16((clock_high + 1))), + MIPS32_LUI(0, 11, UPPER16((clock_high + 1))), + MIPS32_ORI(0, 11, 11, LOWER16((clock_high + 1))), }; ath79_pracc_addn(ctx, preamble2, ARRAY_SIZE(preamble2)); @@ -186,58 +186,58 @@ static int ath79_spi_bitbang_codegen(struct ath79_flash_bank *ath79_info, if (bit) { /* [$1 + WRITE] = t1 */ pracc_add(ctx, 0, - MIPS32_SW(9, ATH79_REG_WRITE, 1)); + MIPS32_SW(0, 9, ATH79_REG_WRITE, 1)); /* [$1 + WRITE] = t3 */ pracc_add(ctx, 0, - MIPS32_SW(11, ATH79_REG_WRITE, 1)); + MIPS32_SW(0, 11, ATH79_REG_WRITE, 1)); } else { /* [$1 + WRITE] = t0 */ pracc_add(ctx, 0, - MIPS32_SW(8, ATH79_REG_WRITE, 1)); + MIPS32_SW(0, 8, ATH79_REG_WRITE, 1)); /* [$1 + WRITE] = t2 */ pracc_add(ctx, 0, - MIPS32_SW(10, ATH79_REG_WRITE, 1)); + MIPS32_SW(0, 10, ATH79_REG_WRITE, 1)); } } if (i % 4 == 3) { /* $3 = [$1 + DATA] */ - pracc_add(ctx, 0, MIPS32_LW(3, ATH79_REG_DATA, 1)); + pracc_add(ctx, 0, MIPS32_LW(0, 3, ATH79_REG_DATA, 1)); /* [OUTi] = $3 */ pracc_add(ctx, MIPS32_PRACC_PARAM_OUT + pracc_out, - MIPS32_SW(3, PRACC_OUT_OFFSET + + MIPS32_SW(0, 3, PRACC_OUT_OFFSET + pracc_out, 15)); pracc_out += 4; } } if (len & 3) { /* not a multiple of 4 bytes */ /* $3 = [$1 + DATA] */ - pracc_add(ctx, 0, MIPS32_LW(3, ATH79_REG_DATA, 1)); + pracc_add(ctx, 0, MIPS32_LW(0, 3, ATH79_REG_DATA, 1)); /* [OUTi] = $3 */ pracc_add(ctx, MIPS32_PRACC_PARAM_OUT + pracc_out, - MIPS32_SW(3, PRACC_OUT_OFFSET + pracc_out, 15)); + MIPS32_SW(0, 3, PRACC_OUT_OFFSET + pracc_out, 15)); pracc_out += 4; } if (ath79_info->spi.post_deselect && !partial_xfer) { const uint32_t post_deselect[] = { /* $2 = SPI_CS_DIS */ - MIPS32_LUI(2, UPPER16(cs_high)), - MIPS32_ORI(2, 2, LOWER16(cs_high)), + MIPS32_LUI(0, 2, UPPER16(cs_high)), + MIPS32_ORI(0, 2, 2, LOWER16(cs_high)), /* [$1 + WRITE] = $2 */ - MIPS32_SW(2, ATH79_REG_WRITE, 1), + MIPS32_SW(0, 2, ATH79_REG_WRITE, 1), /* [$1 + FS] = 0 (disable flash io register access) */ - MIPS32_XORI(2, 2, 0), - MIPS32_SW(2, ATH79_REG_FS, 1), + MIPS32_XORI(0, 2, 2, 0), + MIPS32_SW(0, 2, ATH79_REG_FS, 1), }; ath79_pracc_addn(ctx, post_deselect, ARRAY_SIZE(post_deselect)); } /* common pracc epilogue */ /* jump to start */ - pracc_add(ctx, 0, MIPS32_B(NEG16(ctx->code_count + 1))); + pracc_add(ctx, 0, MIPS32_B(0, NEG16(ctx->code_count + 1))); /* restore $15 from DeSave */ - pracc_add(ctx, 0, MIPS32_MFC0(15, 31, 0)); + pracc_add(ctx, 0, MIPS32_MFC0(0, 15, 31, 0)); return pracc_out / 4; } @@ -259,9 +259,9 @@ static int ath79_spi_bitbang_chunk(struct flash_bank *bank, const int pracc_loop_byte = 8 * 2 + 2; struct pracc_queue_info ctx = { - .max_code = PRACC_MAX_INSTRUCTIONS + .ejtag_info = ejtag_info }; - int max_len = (ctx.max_code - pracc_pre_post) / pracc_loop_byte; + int max_len = (PRACC_MAX_INSTRUCTIONS - pracc_pre_post) / pracc_loop_byte; int to_xfer = len > max_len ? max_len : len; int partial_xfer = len != to_xfer; int padded_len = (to_xfer + 3) & ~3; @@ -274,14 +274,12 @@ static int ath79_spi_bitbang_chunk(struct flash_bank *bank, *transferred = 0; pracc_queue_init(&ctx); - if (ctx.retval != ERROR_OK) - goto exit; LOG_DEBUG("ath79_spi_bitbang_bytes(%p, %08x, %p, %d)", target, ath79_info->io_base, data, len); LOG_DEBUG("max code %d => max len %d. to_xfer %d", - ctx.max_code, max_len, to_xfer); + PRACC_MAX_INSTRUCTIONS, max_len, to_xfer); pracc_words = ath79_spi_bitbang_codegen( ath79_info, &ctx, data, to_xfer, partial_xfer); @@ -289,7 +287,7 @@ static int ath79_spi_bitbang_chunk(struct flash_bank *bank, LOG_DEBUG("Assembled %d instructions, %d stores", ctx.code_count, ctx.store_count); - ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, out); + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, out, 1); if (ctx.retval != ERROR_OK) goto exit; @@ -524,6 +522,9 @@ static int ath79_erase(struct flash_bank *bank, int first, int last) return ERROR_FLASH_BANK_NOT_PROBED; } + if (ath79_info->dev->erase_cmd == 0x00) + return ERROR_FLASH_OPER_UNSUPPORTED; + for (sector = first; sector <= last; sector++) { if (bank->sectors[sector].is_protected) { LOG_ERROR("Flash sector %d protected", sector); @@ -562,7 +563,11 @@ static int ath79_write_page(struct flash_bank *bank, const uint8_t *buffer, address, }; int retval; - uint32_t i; + uint32_t i, pagesize; + + /* if no write pagesize, use reasonable default */ + pagesize = ath79_info->dev->pagesize ? + ath79_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE; if (address & 0xff) { LOG_ERROR("ath79_write_page: unaligned write address: %08x", @@ -575,7 +580,7 @@ static int ath79_write_page(struct flash_bank *bank, const uint8_t *buffer, } if (len > ath79_info->dev->pagesize) { LOG_ERROR("ath79_write_page: len bigger than page size %d: %d", - ath79_info->dev->pagesize, len); + pagesize, len); return ERROR_FAIL; } @@ -613,12 +618,16 @@ static int ath79_write_buffer(struct flash_bank *bank, const uint8_t *buffer, uint32_t address, uint32_t len) { struct ath79_flash_bank *ath79_info = bank->driver_priv; - const uint32_t page_size = ath79_info->dev->pagesize; + uint32_t page_size; int retval; LOG_DEBUG("%s: address=0x%08" PRIx32 " len=0x%08" PRIx32, __func__, address, len); + /* if no valid page_size, use reasonable default */ + page_size = ath79_info->dev->pagesize ? + ath79_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE; + while (len > 0) { int page_len = len > page_size ? page_size : len; @@ -777,6 +786,7 @@ static int ath79_probe(struct flash_bank *bank) struct ath79_flash_bank *ath79_info = bank->driver_priv; struct flash_sector *sectors; uint32_t id = 0; /* silence uninitialized warning */ + uint32_t pagesize, sectorsize; const struct ath79_target *target_device; int retval; @@ -822,16 +832,27 @@ static int ath79_probe(struct flash_bank *bank) /* Set correct size value */ bank->size = ath79_info->dev->size_in_bytes; + if (bank->size <= (1UL << 16)) + LOG_WARNING("device needs 2-byte addresses - not implemented"); + if (bank->size > (1UL << 24)) + LOG_WARNING("device needs paging or 4-byte addresses - not implemented"); + + /* if no sectors, treat whole bank as single sector */ + sectorsize = ath79_info->dev->sectorsize ? + ath79_info->dev->sectorsize : ath79_info->dev->size_in_bytes; /* create and fill sectors array */ - bank->num_sectors = - ath79_info->dev->size_in_bytes / ath79_info->dev->sectorsize; + bank->num_sectors = ath79_info->dev->size_in_bytes / sectorsize; sectors = calloc(1, sizeof(struct flash_sector) * bank->num_sectors); if (!sectors) { LOG_ERROR("not enough memory"); return ERROR_FAIL; } - ath79_info->spi.page_buf = malloc(ath79_info->dev->pagesize); + + /* if no write pagesize, use reasonable default */ + pagesize = ath79_info->dev->pagesize ? ath79_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE; + + ath79_info->spi.page_buf = malloc(pagesize); if (!ath79_info->spi.page_buf) { LOG_ERROR("not enough memory"); free(sectors); @@ -839,8 +860,8 @@ static int ath79_probe(struct flash_bank *bank) } for (int sector = 0; sector < bank->num_sectors; sector++) { - sectors[sector].offset = sector * ath79_info->dev->sectorsize; - sectors[sector].size = ath79_info->dev->sectorsize; + sectors[sector].offset = sector * sectorsize; + sectors[sector].size = sectorsize; sectors[sector].is_erased = 0; sectors[sector].is_protected = 1; } @@ -900,4 +921,5 @@ struct flash_driver ath79_flash = { .erase_check = ath79_flash_blank_check, .protect_check = ath79_protect_check, .info = get_ath79_info, + .free_driver_priv = default_flash_free_driver_priv, };