X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fat91samd.c;h=2730f71b272b83812bc64774088a3fa937915008;hp=a8633bf32b30c5ef6aa7ce038040d8419878ab58;hb=4a7bb931e37e54e8b0cd9d3a6b41c693d1042106;hpb=4da8915fb93369cfe21a86ff208813736cf9d9d9

diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c
index a8633bf32b..2730f71b27 100644
--- a/src/flash/nor/at91samd.c
+++ b/src/flash/nor/at91samd.c
@@ -999,9 +999,9 @@ COMMAND_HANDLER(samd_handle_reset_deassert)
 	 * After vectreset DSU release is not needed however makes no harm
 	 */
 	if (target->reset_halt && (jtag_reset_config & RESET_HAS_SRST)) {
-		retval = mem_ap_sel_write_u32(armv7m->debug_ap, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
+		retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
 		if (retval == ERROR_OK)
-			retval = mem_ap_sel_write_u32(armv7m->debug_ap, DCB_DEMCR,
+			retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DEMCR,
 				TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
 		/* do not return on error here, releasing DSU reset is more important */
 	}