X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fat91sam3.c;h=1bb549e3b56a57db47f9740fb333b146246bb734;hp=3369dda9923e99b5ffc072fac5feaa0651e81612;hb=refs%2Fchanges%2F24%2F1424%2F3;hpb=b3d4a44686c8ed14baab7c466f14321b2dc5fec8

diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index 3369dda992..1bb549e3b5 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -979,6 +979,102 @@ static const struct sam3_chip_details all_sam3_details[] = {
 			},
 		},
 	},
+	{
+		.chipid_cidr    = 0x288B0A60,
+		.name           = "at91sam3s8a",
+		.total_flash_size     = 256 * 2048,
+		.total_sram_size      = 64 * 1024,
+		.n_gpnvms       = 2,
+		.n_banks        = 1,
+		{
+/*		.bank[0] = { */
+			{
+				.probed = 0,
+				.pChip  = NULL,
+				.pBank  = NULL,
+				.bank_number = 0,
+				.base_address = FLASH_BANK_BASE_S,
+				.controller_address = 0x400e0a00,
+				.flash_wait_states = 6,	/* workaround silicon bug */
+				.present = 1,
+				.size_bytes = 256 * 2048,
+				.nsectors   = 16,
+				.sector_size = 32768,
+				.page_size   = 256,
+			},
+/*		.bank[1] = { */
+			{
+				.present = 0,
+				.probed = 0,
+				.bank_number = 1,
+
+			},
+		},
+	},
+	{
+		.chipid_cidr    = 0x289B0A60,
+		.name           = "at91sam3s8b",
+		.total_flash_size     = 256 * 2048,
+		.total_sram_size      = 64 * 1024,
+		.n_gpnvms       = 2,
+		.n_banks        = 1,
+		{
+/*		.bank[0] = { */
+			{
+				.probed = 0,
+				.pChip  = NULL,
+				.pBank  = NULL,
+				.bank_number = 0,
+				.base_address = FLASH_BANK_BASE_S,
+				.controller_address = 0x400e0a00,
+				.flash_wait_states = 6,	/* workaround silicon bug */
+				.present = 1,
+				.size_bytes = 256 * 2048,
+				.nsectors   = 16,
+				.sector_size = 32768,
+				.page_size   = 256,
+			},
+/*		.bank[1] = { */
+			{
+				.present = 0,
+				.probed = 0,
+				.bank_number = 1,
+
+			},
+		},
+	},
+	{
+		.chipid_cidr    = 0x28AB0A60,
+		.name           = "at91sam3s8c",
+		.total_flash_size     = 256 * 2048,
+		.total_sram_size      = 64 * 1024,
+		.n_gpnvms       = 2,
+		.n_banks        = 1,
+		{
+/*		.bank[0] = { */
+			{
+				.probed = 0,
+				.pChip  = NULL,
+				.pBank  = NULL,
+				.bank_number = 0,
+				.base_address = FLASH_BANK_BASE_S,
+				.controller_address = 0x400e0a00,
+				.flash_wait_states = 6,	/* workaround silicon bug */
+				.present = 1,
+				.size_bytes = 256 * 2048,
+				.nsectors   = 16,
+				.sector_size = 32768,
+				.page_size   = 256,
+			},
+/*		.bank[1] = { */
+			{
+				.present = 0,
+				.probed = 0,
+				.bank_number = 1,
+
+			},
+		},
+	},
 
 	/* Start at91sam3n* series */
 	{