X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnand%2Fcore.c;h=baef5d59cbb25ee62800e127029879f0b41989cc;hp=d9bb7dea9299fb910b329099a538c60053da6967;hb=HEAD;hpb=7b94f4c99d7f7970c4f8bf51d477d88b93a4278c diff --git a/src/flash/nand/core.c b/src/flash/nand/core.c index d9bb7dea92..37e1d12e03 100644 --- a/src/flash/nand/core.c +++ b/src/flash/nand/core.c @@ -1,25 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + /*************************************************************************** * Copyright (C) 2007 by Dominic Rath * * Copyright (C) 2002 Thomas Gleixner * * Copyright (C) 2009 Zachary T Welch * * * * Partially based on drivers/mtd/nand_ids.c from Linux. * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * ***************************************************************************/ + #ifdef HAVE_CONFIG_H #include "config.h" #endif @@ -27,13 +15,14 @@ #include "imp.h" /* configured NAND devices and NAND Flash command handler */ -struct nand_device *nand_devices = NULL; +struct nand_device *nand_devices; void nand_device_add(struct nand_device *c) { if (nand_devices) { struct nand_device *p = nand_devices; - while (p && p->next) p = p->next; + while (p && p->next) + p = p->next; p->next = c; } else nand_devices = c; @@ -50,94 +39,94 @@ void nand_device_add(struct nand_device *c) * 256 256 Byte page size * 512 512 Byte page size */ -static struct nand_info nand_flash_ids[] = -{ +static struct nand_info nand_flash_ids[] = { /* Vendor Specific Entries */ - { NAND_MFR_SAMSUNG, 0xD5, 8192, 2048, 0x100000, LP_OPTIONS, "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"}, - { NAND_MFR_SAMSUNG, 0xD7, 8192, 4096, 0x100000, LP_OPTIONS, "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"}, + { NAND_MFR_SAMSUNG, 0xD5, 8192, 2048, 0x100000, LP_OPTIONS, + "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"}, + { NAND_MFR_SAMSUNG, 0xD7, 8192, 4096, 0x100000, LP_OPTIONS, + "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"}, /* start "museum" IDs */ - { 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"}, - { 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"}, - { 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"}, - { 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"}, - { 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"}, - { 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"}, - { 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"}, - { 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"}, - { 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"}, - { 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"}, - - { 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"}, - { 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"}, - { 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"}, - { 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"}, + { 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"}, + { 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"}, + { 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"}, + { 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"}, + { 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"}, + { 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"}, + { 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"}, + { 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"}, + { 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"}, + { 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"}, + + { 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"}, + { 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"}, + { 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"}, + { 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"}, /* end "museum" IDs */ - { 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"}, - { 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"}, - { 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 1.8V 16-bit"}, - { 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 3.3V 16-bit"}, - - { 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"}, - { 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"}, - { 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 1.8V 16-bit"}, - { 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 3.3V 16-bit"}, - - { 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"}, - { 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"}, - { 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 1.8V 16-bit"}, - { 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 3.3V 16-bit"}, - - { 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"}, - { 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"}, - { 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"}, - { 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"}, - { 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"}, - { 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"}, - { 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"}, - - { 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"}, - - { 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"}, - { 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"}, - { 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"}, - { 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"}, - - { 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"}, - { 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"}, - { 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"}, - { 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"}, - - { 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"}, - { 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"}, - { 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"}, - { 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"}, - - { 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"}, - { 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"}, - { 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"}, - { 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"}, - - { 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"}, - { 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"}, - { 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"}, - { 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"}, - - { 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"}, - { 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"}, - { 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"}, - { 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"}, - - { 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"}, + { 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"}, + { 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"}, + { 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 1.8V 16-bit"}, + { 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 3.3V 16-bit"}, + + { 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"}, + { 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"}, + { 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 1.8V 16-bit"}, + { 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 3.3V 16-bit"}, + + { 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"}, + { 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"}, + { 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 1.8V 16-bit"}, + { 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 3.3V 16-bit"}, + + { 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"}, + { 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"}, + { 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"}, + { 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"}, + { 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"}, + { 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"}, + { 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"}, + + { 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"}, + + { 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"}, + { 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"}, + { 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"}, + { 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"}, + + { 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"}, + { 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"}, + { 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"}, + { 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"}, + + { 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"}, + { 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"}, + { 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"}, + { 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"}, + + { 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"}, + { 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"}, + { 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"}, + { 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"}, + + { 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"}, + { 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"}, + { 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"}, + { 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"}, + + { 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"}, + { 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"}, + { 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"}, + { 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"}, + + { 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"}, {0, 0, 0, 0, 0, 0, NULL} }; /* Manufacturer ID list */ -static struct nand_manufacturer nand_manuf_ids[] = -{ +static struct nand_manufacturer nand_manuf_ids[] = { {0x0, "unknown"}, {NAND_MFR_TOSHIBA, "Toshiba"}, {NAND_MFR_SAMSUNG, "Samsung"}, @@ -162,7 +151,8 @@ static struct nand_ecclayout nand_oob_8 = { {.offset = 3, .length = 2}, {.offset = 6, - .length = 2}} + .length = 2} + } }; #endif @@ -179,8 +169,7 @@ static struct nand_device *get_nand_device_by_name(const char *name) unsigned found = 0; struct nand_device *nand; - for (nand = nand_devices; NULL != nand; nand = nand->next) - { + for (nand = nand_devices; nand; nand = nand->next) { if (strcmp(nand->name, name) == 0) return nand; if (!flash_driver_name_matches(nand->controller->name, name)) @@ -197,19 +186,16 @@ struct nand_device *get_nand_device_by_num(int num) struct nand_device *p; int i = 0; - for (p = nand_devices; p; p = p->next) - { + for (p = nand_devices; p; p = p->next) { if (i++ == num) - { return p; - } } return NULL; } COMMAND_HELPER(nand_command_get_device, unsigned name_index, - struct nand_device **nand) + struct nand_device **nand) { const char *str = CMD_ARGV[name_index]; *nand = get_nand_device_by_name(str); @@ -220,8 +206,8 @@ COMMAND_HELPER(nand_command_get_device, unsigned name_index, COMMAND_PARSE_NUMBER(uint, str, num); *nand = get_nand_device_by_num(num); if (!*nand) { - command_print(CMD_CTX, "NAND flash device '%s' not found", str); - return ERROR_INVALID_ARGUMENTS; + command_print(CMD, "NAND flash device '%s' not found", str); + return ERROR_COMMAND_SYNTAX_ERROR; } return ERROR_OK; } @@ -241,23 +227,18 @@ int nand_build_bbt(struct nand_device *nand, int first, int last) last = nand->num_blocks - 1; page = first * pages_per_block; - for (i = first; i <= last; i++) - { + for (i = first; i <= last; i++) { ret = nand_read_page(nand, page, NULL, 0, oob, 6); if (ret != ERROR_OK) return ret; if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff)) - || (((nand->page_size == 512) && (oob[5] != 0xff)) || - ((nand->page_size == 2048) && (oob[0] != 0xff)))) - { + || (((nand->page_size == 512) && (oob[5] != 0xff)) || + ((nand->page_size == 2048) && (oob[0] != 0xff)))) { LOG_WARNING("bad block: %i", i); nand->blocks[i].is_bad = 1; - } - else - { + } else nand->blocks[i].is_bad = 0; - } page += pages_per_block; } @@ -271,21 +252,18 @@ int nand_read_status(struct nand_device *nand, uint8_t *status) return ERROR_NAND_DEVICE_NOT_PROBED; /* Send read status command */ + /* FIXME: errors returned from nand->controller are mostly ignored! */ nand->controller->command(nand, NAND_CMD_STATUS); alive_sleep(1); /* read status */ - if (nand->device->options & NAND_BUSWIDTH_16) - { + if (nand->device->options & NAND_BUSWIDTH_16) { uint16_t data; nand->controller->read_data(nand, &data); *status = data & 0xff; - } - else - { + } else nand->controller->read_data(nand, status); - } return ERROR_OK; } @@ -300,9 +278,8 @@ static int nand_poll_ready(struct nand_device *nand, int timeout) uint16_t data; nand->controller->read_data(nand, &data); status = data & 0xff; - } else { + } else nand->controller->read_data(nand, &status); - } if (status & NAND_STATUS_READY) break; alive_sleep(1); @@ -314,7 +291,8 @@ static int nand_poll_ready(struct nand_device *nand, int timeout) int nand_probe(struct nand_device *nand) { uint8_t manufacturer_id, device_id; - uint8_t id_buff[6]; + uint8_t id_buff[6] = { 0 }; /* zero buff to silence false warning + * from clang static analyzer */ int retval; int i; @@ -329,15 +307,15 @@ int nand_probe(struct nand_device *nand) nand->erase_size = 0; /* initialize controller (device parameters are zero, use controller default) */ - if ((retval = nand->controller->init(nand) != ERROR_OK)) - { - switch (retval) - { + retval = nand->controller->init(nand); + if (retval != ERROR_OK) { + switch (retval) { case ERROR_NAND_OPERATION_FAILED: LOG_DEBUG("controller initialization failed"); return ERROR_NAND_OPERATION_FAILED; case ERROR_NAND_OPERATION_NOT_SUPPORTED: - LOG_ERROR("BUG: controller reported that it doesn't support default parameters"); + LOG_ERROR( + "BUG: controller reported that it doesn't support default parameters"); return ERROR_NAND_OPERATION_FAILED; default: LOG_ERROR("BUG: unknown controller initialization failure"); @@ -351,13 +329,10 @@ int nand_probe(struct nand_device *nand) nand->controller->command(nand, NAND_CMD_READID); nand->controller->address(nand, 0x0); - if (nand->bus_width == 8) - { + if (nand->bus_width == 8) { nand->controller->read_data(nand, &manufacturer_id); nand->controller->read_data(nand, &device_id); - } - else - { + } else { uint16_t data_buf; nand->controller->read_data(nand, &data_buf); manufacturer_id = data_buf & 0xff; @@ -365,36 +340,32 @@ int nand_probe(struct nand_device *nand) device_id = data_buf & 0xff; } - for (i = 0; nand_flash_ids[i].name; i++) - { + for (i = 0; nand_flash_ids[i].name; i++) { if (nand_flash_ids[i].id == device_id && - (nand_flash_ids[i].mfr_id == manufacturer_id || - nand_flash_ids[i].mfr_id == 0 )) - { + (nand_flash_ids[i].mfr_id == manufacturer_id || + nand_flash_ids[i].mfr_id == 0)) { nand->device = &nand_flash_ids[i]; break; } } - for (i = 0; nand_manuf_ids[i].name; i++) - { - if (nand_manuf_ids[i].id == manufacturer_id) - { + for (i = 0; nand_manuf_ids[i].name; i++) { + if (nand_manuf_ids[i].id == manufacturer_id) { nand->manufacturer = &nand_manuf_ids[i]; break; } } - if (!nand->manufacturer) - { + if (!nand->manufacturer) { nand->manufacturer = &nand_manuf_ids[0]; nand->manufacturer->id = manufacturer_id; } - if (!nand->device) - { - LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x", - manufacturer_id, device_id); + if (!nand->device) { + LOG_ERROR( + "unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x", + manufacturer_id, + device_id); return ERROR_NAND_OPERATION_FAILED; } @@ -410,106 +381,104 @@ int nand_probe(struct nand_device *nand) /* Do we need extended device probe information? */ if (nand->device->page_size == 0 || - nand->device->erase_size == 0) - { - if (nand->bus_width == 8) - { - nand->controller->read_data(nand, id_buff + 3); - nand->controller->read_data(nand, id_buff + 4); - nand->controller->read_data(nand, id_buff + 5); - } - else - { + nand->device->erase_size == 0) { + if (nand->bus_width == 8) { + retval = nand->controller->read_data(nand, id_buff + 3); + if (retval != ERROR_OK) + return retval; + + retval = nand->controller->read_data(nand, id_buff + 4); + if (retval != ERROR_OK) + return retval; + + retval = nand->controller->read_data(nand, id_buff + 5); + if (retval != ERROR_OK) + return retval; + + } else { uint16_t data_buf; - nand->controller->read_data(nand, &data_buf); + retval = nand->controller->read_data(nand, &data_buf); + if (retval != ERROR_OK) + return retval; id_buff[3] = data_buf; - nand->controller->read_data(nand, &data_buf); + retval = nand->controller->read_data(nand, &data_buf); + if (retval != ERROR_OK) + return retval; id_buff[4] = data_buf; - nand->controller->read_data(nand, &data_buf); + retval = nand->controller->read_data(nand, &data_buf); + if (retval != ERROR_OK) + return retval; id_buff[5] = data_buf >> 8; } } /* page size */ if (nand->device->page_size == 0) - { nand->page_size = 1 << (10 + (id_buff[4] & 3)); - } - else if (nand->device->page_size == 256) - { + else if (nand->device->page_size == 256) { LOG_ERROR("NAND flashes with 256 byte pagesize are not supported"); return ERROR_NAND_OPERATION_FAILED; - } - else - { + } else nand->page_size = nand->device->page_size; - } /* number of address cycles */ - if (nand->page_size <= 512) - { + if (nand->page_size <= 512) { /* small page devices */ if (nand->device->chip_size <= 32) nand->address_cycles = 3; else if (nand->device->chip_size <= 8*1024) nand->address_cycles = 4; - else - { + else { LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered"); nand->address_cycles = 5; } - } - else - { + } else { /* large page devices */ if (nand->device->chip_size <= 128) nand->address_cycles = 4; else if (nand->device->chip_size <= 32*1024) nand->address_cycles = 5; - else - { + else { LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered"); nand->address_cycles = 6; } } /* erase size */ - if (nand->device->erase_size == 0) - { + if (nand->device->erase_size == 0) { switch ((id_buff[4] >> 4) & 3) { - case 0: - nand->erase_size = 64 << 10; - break; - case 1: - nand->erase_size = 128 << 10; - break; - case 2: - nand->erase_size = 256 << 10; - break; - case 3: - nand->erase_size =512 << 10; - break; + case 0: + nand->erase_size = 64 << 10; + break; + case 1: + nand->erase_size = 128 << 10; + break; + case 2: + nand->erase_size = 256 << 10; + break; + case 3: + nand->erase_size = 512 << 10; + break; } - } - else - { + } else nand->erase_size = nand->device->erase_size; - } /* initialize controller, but leave parameters at the controllers default */ - if ((retval = nand->controller->init(nand) != ERROR_OK)) - { - switch (retval) - { + retval = nand->controller->init(nand); + if (retval != ERROR_OK) { + switch (retval) { case ERROR_NAND_OPERATION_FAILED: LOG_DEBUG("controller initialization failed"); return ERROR_NAND_OPERATION_FAILED; case ERROR_NAND_OPERATION_NOT_SUPPORTED: - LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)", - nand->bus_width, nand->address_cycles, nand->page_size); + LOG_ERROR( + "controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)", + nand->bus_width, + nand->address_cycles, + nand->page_size); return ERROR_NAND_OPERATION_FAILED; default: LOG_ERROR("BUG: unknown controller initialization failure"); @@ -520,8 +489,7 @@ int nand_probe(struct nand_device *nand) nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024); nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks); - for (i = 0; i < nand->num_blocks; i++) - { + for (i = 0; i < nand->num_blocks; i++) { nand->blocks[i].size = nand->erase_size; nand->blocks[i].offset = i * nand->erase_size; nand->blocks[i].is_erased = -1; @@ -542,28 +510,24 @@ int nand_erase(struct nand_device *nand, int first_block, int last_block) return ERROR_NAND_DEVICE_NOT_PROBED; if ((first_block < 0) || (last_block >= nand->num_blocks)) - return ERROR_INVALID_ARGUMENTS; + return ERROR_COMMAND_SYNTAX_ERROR; /* make sure we know if a block is bad before erasing it */ - for (i = first_block; i <= last_block; i++) - { - if (nand->blocks[i].is_bad == -1) - { + for (i = first_block; i <= last_block; i++) { + if (nand->blocks[i].is_bad == -1) { nand_build_bbt(nand, i, last_block); break; } } - for (i = first_block; i <= last_block; i++) - { + for (i = first_block; i <= last_block; i++) { /* Send erase setup command */ nand->controller->command(nand, NAND_CMD_ERASE1); page = i * (nand->erase_size / nand->page_size); /* Send page address */ - if (nand->page_size <= 512) - { + if (nand->page_size <= 512) { /* row */ nand->controller->address(nand, page & 0xff); nand->controller->address(nand, (page >> 8) & 0xff); @@ -575,9 +539,7 @@ int nand_erase(struct nand_device *nand, int first_block, int last_block) /* 4th cycle only on devices with more than 8 GiB */ if (nand->address_cycles >= 5) nand->controller->address(nand, (page >> 24) & 0xff); - } - else - { + } else { /* row */ nand->controller->address(nand, page & 0xff); nand->controller->address(nand, (page >> 8) & 0xff); @@ -591,26 +553,24 @@ int nand_erase(struct nand_device *nand, int first_block, int last_block) nand->controller->command(nand, NAND_CMD_ERASE2); retval = nand->controller->nand_ready ? - nand->controller->nand_ready(nand, 1000) : - nand_poll_ready(nand, 1000); + nand->controller->nand_ready(nand, 1000) : + nand_poll_ready(nand, 1000); if (!retval) { LOG_ERROR("timeout waiting for NAND flash block erase to complete"); return ERROR_NAND_OPERATION_TIMEOUT; } retval = nand_read_status(nand, &status); - if (retval != ERROR_OK) - { + if (retval != ERROR_OK) { LOG_ERROR("couldn't read status"); return ERROR_NAND_OPERATION_FAILED; } - if (status & 0x1) - { + if (status & 0x1) { LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x", - (nand->blocks[i].is_bad == 1) - ? "bad " : "", - i, status); + (nand->blocks[i].is_bad == 1) + ? "bad " : "", + i, status); /* continue; other blocks might still be erasable */ } @@ -621,23 +581,24 @@ int nand_erase(struct nand_device *nand, int first_block, int last_block) } #if 0 -static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size) +static int nand_read_plain(struct nand_device *nand, + uint32_t address, + uint8_t *data, + uint32_t data_size) { uint8_t *page; if (!nand->device) return ERROR_NAND_DEVICE_NOT_PROBED; - if (address % nand->page_size) - { + if (address % nand->page_size) { LOG_ERROR("reads need to be page aligned"); return ERROR_NAND_OPERATION_FAILED; } page = malloc(nand->page_size); - while (data_size > 0) - { + while (data_size > 0) { uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size; uint32_t page_address; @@ -658,23 +619,24 @@ static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t * return ERROR_OK; } -static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size) +static int nand_write_plain(struct nand_device *nand, + uint32_t address, + uint8_t *data, + uint32_t data_size) { uint8_t *page; if (!nand->device) return ERROR_NAND_DEVICE_NOT_PROBED; - if (address % nand->page_size) - { + if (address % nand->page_size) { LOG_ERROR("writes need to be page aligned"); return ERROR_NAND_OPERATION_FAILED; } page = malloc(nand->page_size); - while (data_size > 0) - { + while (data_size > 0) { uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size; uint32_t page_address; @@ -697,8 +659,8 @@ static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t #endif int nand_write_page(struct nand_device *nand, uint32_t page, - uint8_t *data, uint32_t data_size, - uint8_t *oob, uint32_t oob_size) + uint8_t *data, uint32_t data_size, + uint8_t *oob, uint32_t oob_size) { uint32_t block; @@ -709,27 +671,27 @@ int nand_write_page(struct nand_device *nand, uint32_t page, if (nand->blocks[block].is_erased == 1) nand->blocks[block].is_erased = 0; - if (nand->use_raw || nand->controller->write_page == NULL) + if (nand->use_raw || !nand->controller->write_page) return nand_write_page_raw(nand, page, data, data_size, oob, oob_size); else return nand->controller->write_page(nand, page, data, data_size, oob, oob_size); } int nand_read_page(struct nand_device *nand, uint32_t page, - uint8_t *data, uint32_t data_size, - uint8_t *oob, uint32_t oob_size) + uint8_t *data, uint32_t data_size, + uint8_t *oob, uint32_t oob_size) { if (!nand->device) return ERROR_NAND_DEVICE_NOT_PROBED; - if (nand->use_raw || nand->controller->read_page == NULL) + if (nand->use_raw || !nand->controller->read_page) return nand_read_page_raw(nand, page, data, data_size, oob, oob_size); else return nand->controller->read_page(nand, page, data, data_size, oob, oob_size); } int nand_page_command(struct nand_device *nand, uint32_t page, - uint8_t cmd, bool oob_only) + uint8_t cmd, bool oob_only) { if (!nand->device) return ERROR_NAND_DEVICE_NOT_PROBED; @@ -777,7 +739,7 @@ int nand_page_command(struct nand_device *nand, uint32_t page, nand->controller->address(nand, (page >> 16) & 0xff); /* large page devices need a start command if reading */ - if (NAND_CMD_READ0 == cmd) + if (cmd == NAND_CMD_READ0) nand->controller->command(nand, NAND_CMD_READSTART); } @@ -796,10 +758,10 @@ int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size) { int retval = ERROR_NAND_NO_BUFFER; - if (nand->controller->read_block_data != NULL) + if (nand->controller->read_block_data) retval = (nand->controller->read_block_data)(nand, data, size); - if (ERROR_NAND_NO_BUFFER == retval) { + if (retval == ERROR_NAND_NO_BUFFER) { uint32_t i; int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1; @@ -814,13 +776,13 @@ int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size) } int nand_read_page_raw(struct nand_device *nand, uint32_t page, - uint8_t *data, uint32_t data_size, - uint8_t *oob, uint32_t oob_size) + uint8_t *data, uint32_t data_size, + uint8_t *oob, uint32_t oob_size) { int retval; retval = nand_page_command(nand, page, NAND_CMD_READ0, !data); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (data) @@ -836,10 +798,10 @@ int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size) { int retval = ERROR_NAND_NO_BUFFER; - if (nand->controller->write_block_data != NULL) + if (nand->controller->write_block_data) retval = (nand->controller->write_block_data)(nand, data, size); - if (ERROR_NAND_NO_BUFFER == retval) { + if (retval == ERROR_NAND_NO_BUFFER) { bool is16bit = nand->device->options & NAND_BUSWIDTH_16; uint32_t incr = is16bit ? 2 : 1; uint16_t write_data; @@ -852,7 +814,7 @@ int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size) write_data = *data; retval = nand->controller->write_data(nand, write_data); - if (ERROR_OK != retval) + if (retval != ERROR_OK) break; data += incr; @@ -870,20 +832,20 @@ int nand_write_finish(struct nand_device *nand) nand->controller->command(nand, NAND_CMD_PAGEPROG); retval = nand->controller->nand_ready ? - nand->controller->nand_ready(nand, 100) : - nand_poll_ready(nand, 100); + nand->controller->nand_ready(nand, 100) : + nand_poll_ready(nand, 100); if (!retval) return ERROR_NAND_OPERATION_TIMEOUT; retval = nand_read_status(nand, &status); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("couldn't read status"); return ERROR_NAND_OPERATION_FAILED; } if (status & NAND_STATUS_FAIL) { LOG_ERROR("write operation didn't pass, status: 0x%2.2x", - status); + status); return ERROR_NAND_OPERATION_FAILED; } @@ -891,18 +853,18 @@ int nand_write_finish(struct nand_device *nand) } int nand_write_page_raw(struct nand_device *nand, uint32_t page, - uint8_t *data, uint32_t data_size, - uint8_t *oob, uint32_t oob_size) + uint8_t *data, uint32_t data_size, + uint8_t *oob, uint32_t oob_size) { int retval; retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data); - if (ERROR_OK != retval) + if (retval != ERROR_OK) return retval; if (data) { retval = nand_write_data_page(nand, data, data_size); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Unable to write data to NAND device"); return retval; } @@ -910,7 +872,7 @@ int nand_write_page_raw(struct nand_device *nand, uint32_t page, if (oob) { retval = nand_write_data_page(nand, oob, oob_size); - if (ERROR_OK != retval) { + if (retval != ERROR_OK) { LOG_ERROR("Unable to write OOB data to NAND device"); return retval; } @@ -918,4 +880,3 @@ int nand_write_page_raw(struct nand_device *nand, uint32_t page, return nand_write_finish(nand); } -