X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnand.c;h=c1be276d1e6b2894a966a33cf9b600213dbc2914;hp=6977b68a1271b006d9743f99b705dc46f0caae4c;hb=ca594adb5a71f2bf60c1380172b8e61b075d9479;hpb=3725fded174dfd019a5ea08ee4936adf7d3acbb2 diff --git a/src/flash/nand.c b/src/flash/nand.c index 6977b68a12..c1be276d1e 100644 --- a/src/flash/nand.c +++ b/src/flash/nand.c @@ -24,65 +24,44 @@ #include "config.h" #endif -#include "replacements.h" -#include "log.h" - -#include -#include -#include - -#include - #include "nand.h" -#include "flash.h" #include "time_support.h" #include "fileio.h" -#include "image.h" - -int nand_register_commands(struct command_context_s *cmd_ctx); -int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); +static int nand_read_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); +//static int nand_read_plain(struct nand_device_s *device, uint32_t address, uint8_t *data, uint32_t data_size); -int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size); -int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size); -int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size); - -int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size); -int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size); +static int nand_write_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); /* NAND flash controller */ +extern nand_flash_controller_t davinci_nand_controller; extern nand_flash_controller_t lpc3180_nand_controller; extern nand_flash_controller_t orion_nand_controller; extern nand_flash_controller_t s3c2410_nand_controller; extern nand_flash_controller_t s3c2412_nand_controller; extern nand_flash_controller_t s3c2440_nand_controller; extern nand_flash_controller_t s3c2443_nand_controller; +extern nand_flash_controller_t imx31_nand_flash_controller; /* extern nand_flash_controller_t boundary_scan_nand_controller; */ -nand_flash_controller_t *nand_flash_controllers[] = +static nand_flash_controller_t *nand_flash_controllers[] = { + &davinci_nand_controller, &lpc3180_nand_controller, &orion_nand_controller, &s3c2410_nand_controller, &s3c2412_nand_controller, &s3c2440_nand_controller, &s3c2443_nand_controller, + &imx31_nand_flash_controller, /* &boundary_scan_nand_controller, */ NULL }; /* configured NAND devices and NAND Flash command handler */ -nand_device_t *nand_devices = NULL; +static nand_device_t *nand_devices = NULL; static command_t *nand_cmd; /* Chip ID list @@ -95,8 +74,9 @@ static command_t *nand_cmd; * 256 256 Byte page size * 512 512 Byte page size */ -nand_info_t nand_flash_ids[] = +static nand_info_t nand_flash_ids[] = { + /* start "museum" IDs */ {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0}, {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0}, {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0}, @@ -112,6 +92,7 @@ nand_info_t nand_flash_ids[] = {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0}, {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16}, {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16}, + /* end "museum" IDs */ {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0}, {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0}, @@ -168,12 +149,12 @@ nand_info_t nand_flash_ids[] = {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16}, {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16}, - {NULL, 0,} + {NULL, 0, 0, 0, 0, 0 } }; /* Manufacturer ID list */ -nand_manufacturer_t nand_manuf_ids[] = +static nand_manufacturer_t nand_manuf_ids[] = { {0x0, "unknown"}, {NAND_MFR_TOSHIBA, "Toshiba"}, @@ -183,6 +164,7 @@ nand_manufacturer_t nand_manuf_ids[] = {NAND_MFR_RENESAS, "Renesas"}, {NAND_MFR_STMICRO, "ST Micro"}, {NAND_MFR_HYNIX, "Hynix"}, + {NAND_MFR_MICRON, "Micron"}, {0x0, NULL}, }; @@ -190,7 +172,8 @@ nand_manufacturer_t nand_manuf_ids[] = * Define default oob placement schemes for large and small page devices */ -nand_ecclayout_t nand_oob_8 = { +#if 0 +static nand_ecclayout_t nand_oob_8 = { .eccbytes = 3, .eccpos = {0, 1, 2}, .oobfree = { @@ -199,8 +182,9 @@ nand_ecclayout_t nand_oob_8 = { {.offset = 6, .length = 2}} }; +#endif -nand_ecclayout_t nand_oob_16 = { +static nand_ecclayout_t nand_oob_16 = { .eccbytes = 6, .eccpos = {0, 1, 2, 3, 6, 7}, .oobfree = { @@ -208,7 +192,7 @@ nand_ecclayout_t nand_oob_16 = { . length = 8}} }; -nand_ecclayout_t nand_oob_64 = { +static nand_ecclayout_t nand_oob_64 = { .eccbytes = 24, .eccpos = { 40, 41, 42, 43, 44, 45, 46, 47, @@ -221,21 +205,21 @@ nand_ecclayout_t nand_oob_64 = { /* nand device [controller options] */ -int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { int i; int retval; - + if (argc < 1) { LOG_WARNING("incomplete flash device nand configuration"); return ERROR_FLASH_BANK_INVALID; } - + for (i = 0; nand_flash_controllers[i]; i++) { nand_device_t *p, *c; - + if (strcmp(args[0], nand_flash_controllers[i]->name) == 0) { /* register flash specific commands */ @@ -244,7 +228,7 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha LOG_ERROR("couldn't register '%s' commands", args[0]); return retval; } - + c = malloc(sizeof(nand_device_t)); c->controller = nand_flash_controllers[i]; @@ -263,7 +247,7 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha free(c); return ERROR_OK; } - + /* put NAND device in linked list */ if (nand_devices) { @@ -276,7 +260,7 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha { nand_devices = c; } - + return ERROR_OK; } } @@ -290,43 +274,16 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha { LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name); } - + return ERROR_OK; } int nand_register_commands(struct command_context_s *cmd_ctx) { nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, "NAND specific commands"); - + register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL); - - return ERROR_OK; -} -int nand_init(struct command_context_s *cmd_ctx) -{ - if (nand_devices) - { - register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC, - "list configured NAND flash devices"); - register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC, - "print info about NAND flash device "); - register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC, - "identify NAND flash device "); - register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC, - "check NAND flash device for bad blocks [ ]"); - register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC, - "erase blocks on NAND flash device "); - register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC, - "copy from NAND flash device "); - register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC, - "dump from NAND flash device [options]"); - register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC, - "write to NAND flash device [oob_raw|oob_only]"); - register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC, - "raw access to NAND flash device ['enable'|'disable']"); - } - return ERROR_OK; } @@ -342,58 +299,71 @@ nand_device_t *get_nand_device_by_num(int num) return p; } } - + return NULL; } -int nand_build_bbt(struct nand_device_s *device, int first, int last) +int nand_command_get_device_by_num(struct command_context_s *cmd_ctx, + const char *str, nand_device_t **device) +{ + unsigned num; + COMMAND_PARSE_NUMBER(uint, str, num); + *device = get_nand_device_by_num(num); + if (!*device) { + command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", str); + return ERROR_INVALID_ARGUMENTS; + } + return ERROR_OK; +} + +static int nand_build_bbt(struct nand_device_s *device, int first, int last) { - u32 page = 0x0; + uint32_t page = 0x0; int i; - u8 oob[6]; - + uint8_t oob[6]; + if ((first < 0) || (first >= device->num_blocks)) first = 0; - + if ((last >= device->num_blocks) || (last == -1)) last = device->num_blocks - 1; - + for (i = first; i < last; i++) { nand_read_page(device, page, NULL, 0, oob, 6); - + if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff)) || (((device->page_size == 512) && (oob[5] != 0xff)) || ((device->page_size == 2048) && (oob[0] != 0xff)))) { - LOG_WARNING("invalid block: %i", i); + LOG_WARNING("bad block: %i", i); device->blocks[i].is_bad = 1; } else { device->blocks[i].is_bad = 0; } - + page += (device->erase_size / device->page_size); } - + return ERROR_OK; } -int nand_read_status(struct nand_device_s *device, u8 *status) +int nand_read_status(struct nand_device_s *device, uint8_t *status) { if (!device->device) return ERROR_NAND_DEVICE_NOT_PROBED; - + /* Send read status command */ device->controller->command(device, NAND_CMD_STATUS); - + alive_sleep(1); - + /* read status */ if (device->device->options & NAND_BUSWIDTH_16) { - u16 data; + uint16_t data; device->controller->read_data(device, &data); *status = data & 0xff; } @@ -401,18 +371,18 @@ int nand_read_status(struct nand_device_s *device, u8 *status) { device->controller->read_data(device, status); } - + return ERROR_OK; } -int nand_poll_ready(struct nand_device_s *device, int timeout) +static int nand_poll_ready(struct nand_device_s *device, int timeout) { - u8 status; + uint8_t status; device->controller->command(device, NAND_CMD_STATUS); do { if (device->device->options & NAND_BUSWIDTH_16) { - u16 data; + uint16_t data; device->controller->read_data(device, &data); status = data & 0xff; } else { @@ -428,21 +398,21 @@ int nand_poll_ready(struct nand_device_s *device, int timeout) int nand_probe(struct nand_device_s *device) { - u8 manufacturer_id, device_id; - u8 id_buff[6]; + uint8_t manufacturer_id, device_id; + uint8_t id_buff[6]; int retval; int i; /* clear device data */ device->device = NULL; device->manufacturer = NULL; - + /* clear device parameters */ device->bus_width = 0; device->address_cycles = 0; device->page_size = 0; device->erase_size = 0; - + /* initialize controller (device parameters are zero, use controller default) */ if ((retval = device->controller->init(device) != ERROR_OK)) { @@ -459,13 +429,13 @@ int nand_probe(struct nand_device_s *device) return ERROR_NAND_OPERATION_FAILED; } } - + device->controller->command(device, NAND_CMD_RESET); device->controller->reset(device); device->controller->command(device, NAND_CMD_READID); device->controller->address(device, 0x0); - + if (device->bus_width == 8) { device->controller->read_data(device, &manufacturer_id); @@ -473,13 +443,13 @@ int nand_probe(struct nand_device_s *device) } else { - u16 data_buf; + uint16_t data_buf; device->controller->read_data(device, &data_buf); manufacturer_id = data_buf & 0xff; device->controller->read_data(device, &data_buf); device_id = data_buf & 0xff; } - + for (i = 0; nand_flash_ids[i].name; i++) { if (nand_flash_ids[i].id == device_id) @@ -488,7 +458,7 @@ int nand_probe(struct nand_device_s *device) break; } } - + for (i = 0; nand_manuf_ids[i].name; i++) { if (nand_manuf_ids[i].id == manufacturer_id) @@ -497,25 +467,25 @@ int nand_probe(struct nand_device_s *device) break; } } - + if (!device->manufacturer) { device->manufacturer = &nand_manuf_ids[0]; device->manufacturer->id = manufacturer_id; } - + if (!device->device) { LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x", manufacturer_id, device_id); return ERROR_NAND_OPERATION_FAILED; } - + LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name); - + /* initialize device parameters */ - - /* bus width */ + + /* bus width */ if (device->device->options & NAND_BUSWIDTH_16) device->bus_width = 16; else @@ -527,13 +497,13 @@ int nand_probe(struct nand_device_s *device) { if (device->bus_width == 8) { - device->controller->read_data(device, id_buff+3); - device->controller->read_data(device, id_buff+4); - device->controller->read_data(device, id_buff+5); + device->controller->read_data(device, id_buff + 3); + device->controller->read_data(device, id_buff + 4); + device->controller->read_data(device, id_buff + 5); } else { - u16 data_buf; + uint16_t data_buf; device->controller->read_data(device, &data_buf); id_buff[3] = data_buf; @@ -545,7 +515,7 @@ int nand_probe(struct nand_device_s *device) id_buff[5] = data_buf >> 8; } } - + /* page size */ if (device->device->page_size == 0) { @@ -560,7 +530,7 @@ int nand_probe(struct nand_device_s *device) { device->page_size = device->device->page_size; } - + /* number of address cycles */ if (device->page_size <= 512) { @@ -588,7 +558,7 @@ int nand_probe(struct nand_device_s *device) device->address_cycles = 6; } } - + /* erase size */ if (device->device->erase_size == 0) { @@ -611,7 +581,7 @@ int nand_probe(struct nand_device_s *device) { device->erase_size = device->device->erase_size; } - + /* initialize controller, but leave parameters at the controllers default */ if ((retval = device->controller->init(device) != ERROR_OK)) { @@ -629,10 +599,10 @@ int nand_probe(struct nand_device_s *device) return ERROR_NAND_OPERATION_FAILED; } } - + device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024); device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks); - + for (i = 0; i < device->num_blocks; i++) { device->blocks[i].size = device->erase_size; @@ -640,23 +610,23 @@ int nand_probe(struct nand_device_s *device) device->blocks[i].is_erased = -1; device->blocks[i].is_bad = -1; } - + return ERROR_OK; } -int nand_erase(struct nand_device_s *device, int first_block, int last_block) +static int nand_erase(struct nand_device_s *device, int first_block, int last_block) { int i; - u32 page; - u8 status; + uint32_t page; + uint8_t status; int retval; - + if (!device->device) return ERROR_NAND_DEVICE_NOT_PROBED; - + if ((first_block < 0) || (last_block > device->num_blocks)) return ERROR_INVALID_ARGUMENTS; - + /* make sure we know if a block is bad before erasing it */ for (i = first_block; i <= last_block; i++) { @@ -666,25 +636,25 @@ int nand_erase(struct nand_device_s *device, int first_block, int last_block) break; } } - + for (i = first_block; i <= last_block; i++) { /* Send erase setup command */ device->controller->command(device, NAND_CMD_ERASE1); - + page = i * (device->erase_size / device->page_size); - + /* Send page address */ if (device->page_size <= 512) { /* row */ device->controller->address(device, page & 0xff); device->controller->address(device, (page >> 8) & 0xff); - + /* 3rd cycle only on devices with more than 32 MiB */ if (device->address_cycles >= 4) device->controller->address(device, (page >> 16) & 0xff); - + /* 4th cycle only on devices with more than 8 GiB */ if (device->address_cycles >= 5) device->controller->address(device, (page >> 24) & 0xff); @@ -694,12 +664,12 @@ int nand_erase(struct nand_device_s *device, int first_block, int last_block) /* row */ device->controller->address(device, page & 0xff); device->controller->address(device, (page >> 8) & 0xff); - + /* 3rd cycle only on devices with more than 128 MiB */ if (device->address_cycles >= 5) device->controller->address(device, (page >> 16) & 0xff); } - + /* Send erase confirm command */ device->controller->command(device, NAND_CMD_ERASE2); @@ -710,106 +680,111 @@ int nand_erase(struct nand_device_s *device, int first_block, int last_block) LOG_ERROR("timeout waiting for NAND flash block erase to complete"); return ERROR_NAND_OPERATION_TIMEOUT; } - + if ((retval = nand_read_status(device, &status)) != ERROR_OK) { LOG_ERROR("couldn't read status"); return ERROR_NAND_OPERATION_FAILED; } - + if (status & 0x1) { - LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status); - return ERROR_NAND_OPERATION_FAILED; + LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x", + (device->blocks[i].is_bad == 1) + ? "bad " : "", + i, status); + /* continue; other blocks might still be erasable */ } device->blocks[i].is_erased = 1; } - + return ERROR_OK; } -int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size) +#if 0 +static int nand_read_plain(struct nand_device_s *device, uint32_t address, uint8_t *data, uint32_t data_size) { - u8 *page; - + uint8_t *page; + if (!device->device) return ERROR_NAND_DEVICE_NOT_PROBED; - + if (address % device->page_size) { LOG_ERROR("reads need to be page aligned"); return ERROR_NAND_OPERATION_FAILED; } - + page = malloc(device->page_size); - - while (data_size > 0 ) + + while (data_size > 0) { - u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size; - u32 page_address; - - + uint32_t thisrun_size = (data_size > device->page_size) ? device->page_size : data_size; + uint32_t page_address; + + page_address = address / device->page_size; - + nand_read_page(device, page_address, page, device->page_size, NULL, 0); memcpy(data, page, thisrun_size); - + address += thisrun_size; data += thisrun_size; data_size -= thisrun_size; } - + free(page); - + return ERROR_OK; } -int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size) +static int nand_write_plain(struct nand_device_s *device, uint32_t address, uint8_t *data, uint32_t data_size) { - u8 *page; - + uint8_t *page; + if (!device->device) return ERROR_NAND_DEVICE_NOT_PROBED; - + if (address % device->page_size) { LOG_ERROR("writes need to be page aligned"); return ERROR_NAND_OPERATION_FAILED; } - + page = malloc(device->page_size); - - while (data_size > 0 ) + + while (data_size > 0) { - u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size; - u32 page_address; - + uint32_t thisrun_size = (data_size > device->page_size) ? device->page_size : data_size; + uint32_t page_address; + memset(page, 0xff, device->page_size); memcpy(page, data, thisrun_size); - + page_address = address / device->page_size; - + nand_write_page(device, page_address, page, device->page_size, NULL, 0); - + address += thisrun_size; data += thisrun_size; data_size -= thisrun_size; } - + free(page); - + return ERROR_OK; } +#endif -int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size) +int nand_write_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size) { - u32 block; + uint32_t block; if (!device->device) return ERROR_NAND_DEVICE_NOT_PROBED; - + block = page / (device->erase_size / device->page_size); if (device->blocks[block].is_erased == 1) device->blocks[block].is_erased = 0; @@ -820,21 +795,21 @@ int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_s return device->controller->write_page(device, page, data, data_size, oob, oob_size); } -int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size) +static int nand_read_page(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size) { if (!device->device) return ERROR_NAND_DEVICE_NOT_PROBED; - + if (device->use_raw || device->controller->read_page == NULL) return nand_read_page_raw(device, page, data, data_size, oob, oob_size); else return device->controller->read_page(device, page, data, data_size, oob, oob_size); } -int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size) +int nand_read_page_raw(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size) { - int i; - + uint32_t i; + if (!device->device) return ERROR_NAND_DEVICE_NOT_PROBED; @@ -845,14 +820,14 @@ int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 dat device->controller->command(device, NAND_CMD_READ0); else device->controller->command(device, NAND_CMD_READOOB); - + /* column (always 0, we start at the beginning of a page/OOB area) */ device->controller->address(device, 0x0); - + /* row */ device->controller->address(device, page & 0xff); device->controller->address(device, (page >> 8) & 0xff); - + /* 4th cycle only on devices with more than 32 MiB */ if (device->address_cycles >= 4) device->controller->address(device, (page >> 16) & 0xff); @@ -865,7 +840,7 @@ int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 dat { /* large page device */ device->controller->command(device, NAND_CMD_READ0); - + /* column (0 when we start at the beginning of a page, * or 2048 for the beginning of OOB area) */ @@ -874,7 +849,7 @@ int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 dat device->controller->address(device, 0x0); else device->controller->address(device, 0x8); - + /* row */ device->controller->address(device, page & 0xff); device->controller->address(device, (page >> 8) & 0xff); @@ -886,14 +861,14 @@ int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 dat /* large page devices need a start command */ device->controller->command(device, NAND_CMD_READSTART); } - + if (device->controller->nand_ready) { if (!device->controller->nand_ready(device, 100)) return ERROR_NAND_OPERATION_TIMEOUT; } else { alive_sleep(1); } - + if (data) { if (device->controller->read_block_data != NULL) @@ -917,7 +892,7 @@ int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 dat } } } - + if (oob) { if (device->controller->read_block_data != NULL) @@ -941,30 +916,30 @@ int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 dat } } } - - return ERROR_OK; + + return ERROR_OK; } -int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size) +int nand_write_page_raw(struct nand_device_s *device, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size) { - int i; + uint32_t i; int retval; - u8 status; - + uint8_t status; + if (!device->device) return ERROR_NAND_DEVICE_NOT_PROBED; device->controller->command(device, NAND_CMD_SEQIN); - + if (device->page_size <= 512) { /* column (always 0, we start at the beginning of a page/OOB area) */ device->controller->address(device, 0x0); - + /* row */ device->controller->address(device, page & 0xff); device->controller->address(device, (page >> 8) & 0xff); - + /* 4th cycle only on devices with more than 32 MiB */ if (device->address_cycles >= 4) device->controller->address(device, (page >> 16) & 0xff); @@ -983,7 +958,7 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 da device->controller->address(device, 0x0); else device->controller->address(device, 0x8); - + /* row */ device->controller->address(device, page & 0xff); device->controller->address(device, (page >> 8) & 0xff); @@ -992,7 +967,7 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 da if (device->address_cycles >= 5) device->controller->address(device, (page >> 16) & 0xff); } - + if (data) { if (device->controller->write_block_data != NULL) @@ -1003,7 +978,7 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 da { if (device->device->options & NAND_BUSWIDTH_16) { - u16 data_buf = le_to_h_u16(data); + uint16_t data_buf = le_to_h_u16(data); device->controller->write_data(device, data_buf); data += 2; i += 2; @@ -1017,7 +992,7 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 da } } } - + if (oob) { if (device->controller->write_block_data != NULL) @@ -1028,7 +1003,7 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 da { if (device->device->options & NAND_BUSWIDTH_16) { - u16 oob_buf = le_to_h_u16(data); + uint16_t oob_buf = le_to_h_u16(data); device->controller->write_data(device, oob_buf); oob += 2; i += 2; @@ -1042,579 +1017,625 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 da } } } - + device->controller->command(device, NAND_CMD_PAGEPROG); - + retval = device->controller->nand_ready ? device->controller->nand_ready(device, 100) : nand_poll_ready(device, 100); if (!retval) return ERROR_NAND_OPERATION_TIMEOUT; - + if ((retval = nand_read_status(device, &status)) != ERROR_OK) { LOG_ERROR("couldn't read status"); return ERROR_NAND_OPERATION_FAILED; } - + if (status & NAND_STATUS_FAIL) { LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status); return ERROR_NAND_OPERATION_FAILED; } - - return ERROR_OK; + + return ERROR_OK; } int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { nand_device_t *p; - int i = 0; - + int i; + if (!nand_devices) { command_print(cmd_ctx, "no NAND flash devices configured"); return ERROR_OK; } - - for (p = nand_devices; p; p = p->next) + + for (p = nand_devices, i = 0; p; p = p->next, i++) { if (p->device) - command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i", - i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size); + command_print(cmd_ctx, "#%i: %s (%s) " + "pagesize: %i, buswidth: %i,\n\t" + "blocksize: %i, blocks: %i", + i, p->device->name, p->manufacturer->name, + p->page_size, p->bus_width, + p->erase_size, p->num_blocks); else - command_print(cmd_ctx, "#%i: not probed"); + command_print(cmd_ctx, "#%i: not probed", i); } - + return ERROR_OK; } -int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; int i = 0; int j = 0; int first = -1; int last = -1; - - if ((argc < 1) || (argc > 3)) - { - return ERROR_COMMAND_SYNTAX_ERROR; + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + + switch (argc) { + default: + return ERROR_COMMAND_SYNTAX_ERROR; + case 1: + first = 0; + last = INT32_MAX; + break; + case 2: + COMMAND_PARSE_NUMBER(int, args[1], i); + first = last = i; + i = 0; + break; + case 3: + COMMAND_PARSE_NUMBER(int, args[1], first); + COMMAND_PARSE_NUMBER(int, args[2], last); + break; + } + + if (NULL == p->device) + { + command_print(cmd_ctx, "#%s: not probed", args[0]); + return ERROR_OK; } - - if (argc == 2) - { - first = last = strtoul(args[1], NULL, 0); - } - else if (argc == 3) - { - first = strtoul(args[1], NULL, 0); - last = strtoul(args[2], NULL, 0); - } - - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); - if (p) + + if (first >= p->num_blocks) + first = p->num_blocks - 1; + + if (last >= p->num_blocks) + last = p->num_blocks - 1; + + command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i", + i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size); + + for (j = first; j <= last; j++) { - if (p->device) - { - if (first >= p->num_blocks) - first = p->num_blocks - 1; - - if (last >= p->num_blocks) - last = p->num_blocks - 1; - - command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i", - i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size); - - for (j = first; j <= last; j++) - { - char *erase_state, *bad_state; - - if (p->blocks[j].is_erased == 0) - erase_state = "not erased"; - else if (p->blocks[j].is_erased == 1) - erase_state = "erased"; - else - erase_state = "erase state unknown"; - - if (p->blocks[j].is_bad == 0) - bad_state = ""; - else if (p->blocks[j].is_bad == 1) - bad_state = " (marked bad)"; - else - bad_state = " (block condition unknown)"; + char *erase_state, *bad_state; - command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s", - j, p->blocks[j].offset, p->blocks[j].size / 1024, - erase_state, bad_state); - } - } + if (p->blocks[j].is_erased == 0) + erase_state = "not erased"; + else if (p->blocks[j].is_erased == 1) + erase_state = "erased"; else - { - command_print(cmd_ctx, "#%i: not probed"); - } + erase_state = "erase state unknown"; + + if (p->blocks[j].is_bad == 0) + bad_state = ""; + else if (p->blocks[j].is_bad == 1) + bad_state = " (marked bad)"; + else + bad_state = " (block condition unknown)"; + + command_print(cmd_ctx, + "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s", + j, + p->blocks[j].offset, + p->blocks[j].size / 1024, + erase_state, + bad_state); } - + return ERROR_OK; } -int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - int retval; - if (argc != 1) { return ERROR_COMMAND_SYNTAX_ERROR; } - - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); - if (p) + + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + + if ((retval = nand_probe(p)) == ERROR_OK) { - if ((retval = nand_probe(p)) == ERROR_OK) - { - command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name); - } - else if (retval == ERROR_NAND_OPERATION_FAILED) - { - command_print(cmd_ctx, "probing failed for NAND flash device"); - } - else - { - command_print(cmd_ctx, "unknown error when probing NAND flash device"); - } + command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name); + } + else if (retval == ERROR_NAND_OPERATION_FAILED) + { + command_print(cmd_ctx, "probing failed for NAND flash device"); } else { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); + command_print(cmd_ctx, "unknown error when probing NAND flash device"); } - + return ERROR_OK; } -int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - int retval; - - if (argc != 3) + if (argc != 1 && argc != 3) { return ERROR_COMMAND_SYNTAX_ERROR; } - - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); - if (p) + + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + + unsigned long offset; + unsigned long length; + + /* erase specified part of the chip; or else everything */ + if (argc == 3) { + unsigned long size = p->erase_size * p->num_blocks; + + COMMAND_PARSE_NUMBER(ulong, args[1], offset); + if ((offset % p->erase_size) != 0 || offset >= size) + return ERROR_INVALID_ARGUMENTS; + + COMMAND_PARSE_NUMBER(ulong, args[2], length); + if ((length == 0) || (length % p->erase_size) != 0 + || (length + offset) > size) + return ERROR_INVALID_ARGUMENTS; + + offset /= p->erase_size; + length /= p->erase_size; + } else { + offset = 0; + length = p->num_blocks; + } + + retval = nand_erase(p, offset, offset + length - 1); + if (retval == ERROR_OK) { - int first = strtoul(args[1], NULL, 0); - int last = strtoul(args[2], NULL, 0); - - if ((retval = nand_erase(p, first, last)) == ERROR_OK) - { - command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name); - } - else if (retval == ERROR_NAND_OPERATION_FAILED) - { - command_print(cmd_ctx, "erase failed"); - } - else - { - command_print(cmd_ctx, "unknown error when erasing NAND flash device"); - } + command_print(cmd_ctx, "erased blocks %lu to %lu " + "on NAND flash device #%s '%s'", + offset, offset + length, + args[0], p->device->name); + } + else if (retval == ERROR_NAND_OPERATION_FAILED) + { + command_print(cmd_ctx, "erase failed"); } else { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); + command_print(cmd_ctx, "unknown error when erasing NAND flash device"); } - + return ERROR_OK; } int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - int retval; int first = -1; int last = -1; - + if ((argc < 1) || (argc > 3) || (argc == 2)) { return ERROR_COMMAND_SYNTAX_ERROR; } - + + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + if (argc == 3) { - first = strtoul(args[1], NULL, 0); - last = strtoul(args[2], NULL, 0); - } - - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); - if (p) - { - if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK) - { - command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name); - } - else if (retval == ERROR_NAND_OPERATION_FAILED) - { - command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device"); - } - else - { - command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device"); - } - } - else - { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); + unsigned long offset; + unsigned long length; + + COMMAND_PARSE_NUMBER(ulong, args[1], offset); + if (offset % p->erase_size) + return ERROR_INVALID_ARGUMENTS; + offset /= p->erase_size; + + COMMAND_PARSE_NUMBER(ulong, args[2], length); + if (length % p->erase_size) + return ERROR_INVALID_ARGUMENTS; + + length -= 1; + length /= p->erase_size; + + first = offset; + last = offset + length; } - - return ERROR_OK; -} -int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) -{ - nand_device_t *p; - - if (argc != 4) + retval = nand_build_bbt(p, first, last); + if (retval == ERROR_OK) { - return ERROR_COMMAND_SYNTAX_ERROR; - + command_print(cmd_ctx, "checked NAND flash device for bad blocks, " + "use \"nand info\" command to list blocks"); } - - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); - if (p) + else if (retval == ERROR_NAND_OPERATION_FAILED) { - + command_print(cmd_ctx, "error when checking for bad blocks on " + "NAND flash device"); } else { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); + command_print(cmd_ctx, "unknown error when checking for bad " + "blocks on NAND flash device"); } - + return ERROR_OK; } -int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - u32 offset; - u32 binary_size; - u32 buf_cnt; + uint32_t offset; + uint32_t binary_size; + uint32_t buf_cnt; enum oob_formats oob_format = NAND_OOB_NONE; - + fileio_t fileio; - - duration_t duration; - char *duration_text; - - nand_device_t *p; - + + if (argc < 3) { return ERROR_COMMAND_SYNTAX_ERROR; - } - - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); - if (p) + + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + + uint8_t *page = NULL; + uint32_t page_size = 0; + uint8_t *oob = NULL; + uint32_t oob_size = 0; + const int *eccpos = NULL; + + COMMAND_PARSE_NUMBER(u32, args[2], offset); + + if (argc > 3) { - u8 *page = NULL; - u32 page_size = 0; - u8 *oob = NULL; - u32 oob_size = 0; - const int *eccpos = NULL; - - offset = strtoul(args[2], NULL, 0); - - if (argc > 3) + int i; + for (i = 3; i < argc; i++) { - int i; - for (i = 3; i < argc; i++) + if (!strcmp(args[i], "oob_raw")) + oob_format |= NAND_OOB_RAW; + else if (!strcmp(args[i], "oob_only")) + oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY; + else if (!strcmp(args[i], "oob_softecc")) + oob_format |= NAND_OOB_SW_ECC; + else if (!strcmp(args[i], "oob_softecc_kw")) + oob_format |= NAND_OOB_SW_ECC_KW; + else { - if (!strcmp(args[i], "oob_raw")) - oob_format |= NAND_OOB_RAW; - else if (!strcmp(args[i], "oob_only")) - oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY; - else if (!strcmp(args[i], "oob_softecc")) - oob_format |= NAND_OOB_SW_ECC; - else - { - command_print(cmd_ctx, "unknown option: %s", args[i]); - return ERROR_COMMAND_SYNTAX_ERROR; - } + command_print(cmd_ctx, "unknown option: %s", args[i]); + return ERROR_COMMAND_SYNTAX_ERROR; } } - - duration_start_measure(&duration); + } - if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK) - { - return ERROR_OK; + struct duration bench; + duration_start(&bench); + + if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK) + { + return ERROR_OK; + } + + buf_cnt = binary_size = fileio.size; + + if (!(oob_format & NAND_OOB_ONLY)) + { + page_size = p->page_size; + page = malloc(p->page_size); + } + + if (oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW)) + { + if (p->page_size == 512) { + oob_size = 16; + eccpos = nand_oob_16.eccpos; + } else if (p->page_size == 2048) { + oob_size = 64; + eccpos = nand_oob_64.eccpos; } - - buf_cnt = binary_size = fileio.size; - - if (!(oob_format & NAND_OOB_ONLY)) + oob = malloc(oob_size); + } + + if (offset % p->page_size) + { + command_print(cmd_ctx, "only page size aligned offsets and sizes are supported"); + fileio_close(&fileio); + free(oob); + free(page); + return ERROR_OK; + } + + while (buf_cnt > 0) + { + uint32_t size_read; + + if (NULL != page) { - page_size = p->page_size; - page = malloc(p->page_size); + fileio_read(&fileio, page_size, page, &size_read); + buf_cnt -= size_read; + if (size_read < page_size) + { + memset(page + size_read, 0xff, page_size - size_read); + } } - if (oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC)) + if (oob_format & NAND_OOB_SW_ECC) { - if (p->page_size == 512) { - oob_size = 16; - eccpos = nand_oob_16.eccpos; - } else if (p->page_size == 2048) { - oob_size = 64; - eccpos = nand_oob_64.eccpos; + uint32_t i, j; + uint8_t ecc[3]; + memset(oob, 0xff, oob_size); + for (i = 0, j = 0; i < page_size; i += 256) { + nand_calculate_ecc(p, page + i, ecc); + oob[eccpos[j++]] = ecc[0]; + oob[eccpos[j++]] = ecc[1]; + oob[eccpos[j++]] = ecc[2]; } - oob = malloc(oob_size); - } - - if (offset % p->page_size) + } else if (oob_format & NAND_OOB_SW_ECC_KW) { - command_print(cmd_ctx, "only page size aligned offsets and sizes are supported"); - fileio_close(&fileio); - free(oob); - free(page); - return ERROR_OK; + /* + * In this case eccpos is not used as + * the ECC data is always stored contigously + * at the end of the OOB area. It consists + * of 10 bytes per 512-byte data block. + */ + uint32_t i; + uint8_t *ecc = oob + oob_size - page_size/512 * 10; + memset(oob, 0xff, oob_size); + for (i = 0; i < page_size; i += 512) { + nand_calculate_ecc_kw(p, page + i, ecc); + ecc += 10; + } } - - while (buf_cnt > 0) + else if (NULL != oob) { - u32 size_read; - - if (NULL != page) + fileio_read(&fileio, oob_size, oob, &size_read); + buf_cnt -= size_read; + if (size_read < oob_size) { - fileio_read(&fileio, page_size, page, &size_read); - buf_cnt -= size_read; - if (size_read < page_size) - { - memset(page + size_read, 0xff, page_size - size_read); - } + memset(oob + size_read, 0xff, oob_size - size_read); } + } - if (oob_format & NAND_OOB_SW_ECC) - { - int i, j; - u8 ecc[3]; - memset(oob, 0xff, oob_size); - for (i = 0, j = 0; i < page_size; i += 256) { - nand_calculate_ecc(p, page+i, ecc); - oob[eccpos[j++]] = ecc[0]; - oob[eccpos[j++]] = ecc[1]; - oob[eccpos[j++]] = ecc[2]; - } - } - else if (NULL != oob) - { - fileio_read(&fileio, oob_size, oob, &size_read); - buf_cnt -= size_read; - if (size_read < oob_size) - { - memset(oob + size_read, 0xff, oob_size - size_read); - } - } - - if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK) - { - command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x", - args[1], args[0], offset); + if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK) + { + command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8" PRIx32 "", + args[1], args[0], offset); - fileio_close(&fileio); - free(oob); - free(page); + fileio_close(&fileio); + free(oob); + free(page); - return ERROR_OK; - } - offset += page_size; + return ERROR_OK; } - - fileio_close(&fileio); - free(oob); - free(page); - oob = NULL; - page = NULL; - duration_stop_measure(&duration, &duration_text); - command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s", - args[1], args[0], offset, duration_text); - free(duration_text); - duration_text = NULL; + offset += page_size; } - else + + fileio_close(&fileio); + free(oob); + free(page); + oob = NULL; + page = NULL; + if (duration_measure(&bench) == ERROR_OK) { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); + command_print(cmd_ctx, "wrote file %s to NAND flash %s " + "up to offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)", + args[1], args[0], offset, duration_elapsed(&bench), + duration_kbps(&bench, fileio.size)); } - + return ERROR_OK; } -int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - if (argc < 4) { return ERROR_COMMAND_SYNTAX_ERROR; } - - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); - if (p) + + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + + if (NULL == p->device) + { + command_print(cmd_ctx, "#%s: not probed", args[0]); + return ERROR_OK; + } + + fileio_t fileio; + + uint8_t *page = NULL; + uint32_t page_size = 0; + uint8_t *oob = NULL; + uint32_t oob_size = 0; + uint32_t address; + COMMAND_PARSE_NUMBER(u32, args[2], address); + uint32_t size; + COMMAND_PARSE_NUMBER(u32, args[3], size); + uint32_t bytes_done = 0; + enum oob_formats oob_format = NAND_OOB_NONE; + + if (argc > 4) { - if (p->device) + int i; + for (i = 4; i < argc; i++) { - fileio_t fileio; - duration_t duration; - char *duration_text; - int retval; - - u8 *page = NULL; - u32 page_size = 0; - u8 *oob = NULL; - u32 oob_size = 0; - u32 address = strtoul(args[2], NULL, 0); - u32 size = strtoul(args[3], NULL, 0); - u32 bytes_done = 0; - enum oob_formats oob_format = NAND_OOB_NONE; - - if (argc > 4) - { - int i; - for (i = 4; i < argc; i++) - { - if (!strcmp(args[i], "oob_raw")) - oob_format |= NAND_OOB_RAW; - else if (!strcmp(args[i], "oob_only")) - oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY; - else - command_print(cmd_ctx, "unknown option: '%s'", args[i]); - } - } - - if ((address % p->page_size) || (size % p->page_size)) - { - command_print(cmd_ctx, "only page size aligned addresses and sizes are supported"); - return ERROR_OK; - } - - if (!(oob_format & NAND_OOB_ONLY)) - { - page_size = p->page_size; - page = malloc(p->page_size); - } + if (!strcmp(args[i], "oob_raw")) + oob_format |= NAND_OOB_RAW; + else if (!strcmp(args[i], "oob_only")) + oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY; + else + command_print(cmd_ctx, "unknown option: '%s'", args[i]); + } + } - if (oob_format & NAND_OOB_RAW) - { - if (p->page_size == 512) - oob_size = 16; - else if (p->page_size == 2048) - oob_size = 64; - oob = malloc(oob_size); - } - - if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK) - { - return ERROR_OK; - } - - duration_start_measure(&duration); - - while (size > 0) - { - u32 size_written; - if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK) - { - command_print(cmd_ctx, "reading NAND flash page failed"); - free(page); - free(oob); - fileio_close(&fileio); - return ERROR_OK; - } - - if (NULL != page) - { - fileio_write(&fileio, page_size, page, &size_written); - bytes_done += page_size; - } - - if (NULL != oob) - { - fileio_write(&fileio, oob_size, oob, &size_written); - bytes_done += oob_size; - } - - size -= p->page_size; - address += p->page_size; - } - + if ((address % p->page_size) || (size % p->page_size)) + { + command_print(cmd_ctx, "only page size aligned addresses and sizes are supported"); + return ERROR_OK; + } + + if (!(oob_format & NAND_OOB_ONLY)) + { + page_size = p->page_size; + page = malloc(p->page_size); + } + + if (oob_format & NAND_OOB_RAW) + { + if (p->page_size == 512) + oob_size = 16; + else if (p->page_size == 2048) + oob_size = 64; + oob = malloc(oob_size); + } + + if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK) + { + return ERROR_OK; + } + + struct duration bench; + duration_start(&bench); + + while (size > 0) + { + uint32_t size_written; + if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK) + { + command_print(cmd_ctx, "reading NAND flash page failed"); free(page); - page = NULL; free(oob); - oob = NULL; fileio_close(&fileio); + return ERROR_OK; + } - duration_stop_measure(&duration, &duration_text); - command_print(cmd_ctx, "dumped %"PRIi64" byte in %s", fileio.size, duration_text); - free(duration_text); - duration_text = NULL; + if (NULL != page) + { + fileio_write(&fileio, page_size, page, &size_written); + bytes_done += page_size; } - else + + if (NULL != oob) { - command_print(cmd_ctx, "#%i: not probed"); + fileio_write(&fileio, oob_size, oob, &size_written); + bytes_done += oob_size; } + + size -= p->page_size; + address += p->page_size; } - else + + free(page); + page = NULL; + free(oob); + oob = NULL; + fileio_close(&fileio); + + if (duration_measure(&bench) == ERROR_OK) { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); + command_print(cmd_ctx, "dumped %lld byte in %fs (%0.3f kb/s)", + fileio.size, duration_elapsed(&bench), + duration_kbps(&bench, fileio.size)); } - + return ERROR_OK; } -int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - nand_device_t *p; - if ((argc < 1) || (argc > 2)) { return ERROR_COMMAND_SYNTAX_ERROR; } - - p = get_nand_device_by_num(strtoul(args[0], NULL, 0)); - if (p) + + nand_device_t *p; + int retval = nand_command_get_device_by_num(cmd_ctx, args[0], &p); + if (ERROR_OK != retval) + return retval; + + if (NULL == p->device) { - if (p->device) - { - if (argc == 2) - { - if (strcmp("enable", args[1]) == 0) - { - p->use_raw = 1; - } - else if (strcmp("disable", args[1]) == 0) - { - p->use_raw = 0; - } - else - { - return ERROR_COMMAND_SYNTAX_ERROR; - } - } - - command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled"); - } - else - { - command_print(cmd_ctx, "#%i: not probed"); - } + command_print(cmd_ctx, "#%s: not probed", args[0]); + return ERROR_OK; } - else + + if (argc == 2) { - command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]); + if (strcmp("enable", args[1]) == 0) + p->use_raw = 1; + else if (strcmp("disable", args[1]) == 0) + p->use_raw = 0; + else + return ERROR_COMMAND_SYNTAX_ERROR; } - + + const char *msg = p->use_raw ? "enabled" : "disabled"; + command_print(cmd_ctx, "raw access is %s", msg); + + return ERROR_OK; +} + +int nand_init(struct command_context_s *cmd_ctx) +{ + if (!nand_devices) + return ERROR_OK; + + register_command(cmd_ctx, nand_cmd, "list", + handle_nand_list_command, COMMAND_EXEC, + "list configured NAND flash devices"); + register_command(cmd_ctx, nand_cmd, "info", + handle_nand_info_command, COMMAND_EXEC, + "print info about NAND flash device "); + register_command(cmd_ctx, nand_cmd, "probe", + handle_nand_probe_command, COMMAND_EXEC, + "identify NAND flash device "); + + register_command(cmd_ctx, nand_cmd, "check_bad_blocks", + handle_nand_check_bad_blocks_command, COMMAND_EXEC, + "check NAND flash device for bad blocks [ ]"); + register_command(cmd_ctx, nand_cmd, "erase", + handle_nand_erase_command, COMMAND_EXEC, + "erase blocks on NAND flash device [ ]"); + register_command(cmd_ctx, nand_cmd, "dump", + handle_nand_dump_command, COMMAND_EXEC, + "dump from NAND flash device " + " [oob_raw | oob_only]"); + register_command(cmd_ctx, nand_cmd, "write", + handle_nand_write_command, COMMAND_EXEC, + "write to NAND flash device " + "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]"); + + register_command(cmd_ctx, nand_cmd, "raw_access", + handle_nand_raw_access_command, COMMAND_EXEC, + "raw access to NAND flash device ['enable'|'disable']"); + return ERROR_OK; }