X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fcfi.c;h=999b0a733d49bd11016c634edab9d648bcb3f00f;hp=58011095803c99dc6fe2bf4c391bc49e8ba4e1fa;hb=b6db182c0020051e0dc642ca0b1040ea7453dcd0;hpb=ab362fb528bc741482d31c7ff3a73ccf94392d73 diff --git a/src/flash/cfi.c b/src/flash/cfi.c index 5801109580..999b0a733d 100644 --- a/src/flash/cfi.c +++ b/src/flash/cfi.c @@ -1,6 +1,8 @@ /*************************************************************************** * Copyright (C) 2005, 2007 by Dominic Rath * * Dominic.Rath@gmx.de * + * Copyright (C) 2009 Michael Schwingen * + * michael@schwingen.org * * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * @@ -21,34 +23,23 @@ #include "config.h" #endif -#include "replacements.h" - #include "cfi.h" #include "non_cfi.h" - -#include "flash.h" -#include "target.h" -#include "log.h" #include "armv4_5.h" -#include "algorithm.h" #include "binarybuffer.h" -#include "types.h" -#include -#include -#include -int cfi_register_commands(struct command_context_s *cmd_ctx); -int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); -int cfi_erase(struct flash_bank_s *bank, int first, int last); -int cfi_protect(struct flash_bank_s *bank, int set, int first, int last); -int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); -int cfi_probe(struct flash_bank_s *bank); -int cfi_auto_probe(struct flash_bank_s *bank); -int cfi_protect_check(struct flash_bank_s *bank); -int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size); +static int cfi_register_commands(struct command_context_s *cmd_ctx); +static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); +static int cfi_erase(struct flash_bank_s *bank, int first, int last); +static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last); +static int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); +static int cfi_probe(struct flash_bank_s *bank); +static int cfi_auto_probe(struct flash_bank_s *bank); +static int cfi_protect_check(struct flash_bank_s *bank); +static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size); -int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); +//static int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); #define CFI_MAX_BUS_WIDTH 4 #define CFI_MAX_CHIP_WIDTH 4 @@ -71,36 +62,19 @@ flash_driver_t cfi_flash = .info = cfi_info }; -cfi_unlock_addresses_t cfi_unlock_addresses[] = +static cfi_unlock_addresses_t cfi_unlock_addresses[] = { [CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa }, [CFI_UNLOCK_5555_2AAA] = { .unlock1 = 0x5555, .unlock2 = 0x2aaa }, }; /* CFI fixups foward declarations */ -void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param); -void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param); -void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param); - -/* fixup after identifying JEDEC manufactuer and ID */ -cfi_fixup_t cfi_jedec_fixups[] = { - {CFI_MFR_SST, 0x00D4, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_SST, 0x00D5, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_SST, 0x00D6, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_SST, 0x00D7, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_SST, 0x2780, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_ST, 0x00D5, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_ST, 0x00D6, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_AMD, 0x2223, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_AMD, 0x22ab, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_FUJITSU, 0x226b, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_AMIC, 0xb31a, cfi_fixup_non_cfi, NULL}, - {CFI_MFR_MX, 0x225b, cfi_fixup_non_cfi, NULL}, - {0, 0, NULL, NULL} -}; +static void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param); +static void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param); +static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param); /* fixup after reading cmdset 0002 primary query table */ -cfi_fixup_t cfi_0002_fixups[] = { +static cfi_fixup_t cfi_0002_fixups[] = { {CFI_MFR_SST, 0x00D4, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x00D5, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x00D6, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, @@ -110,16 +84,17 @@ cfi_fixup_t cfi_0002_fixups[] = { {CFI_MFR_FUJITSU, 0x226b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_AMIC, 0xb31a, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, {CFI_MFR_MX, 0x225b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, + {CFI_MFR_AMD, 0x225b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, {CFI_MFR_ANY, CFI_ID_ANY, cfi_fixup_0002_erase_regions, NULL}, {0, 0, NULL, NULL} }; /* fixup after reading cmdset 0001 primary query table */ -cfi_fixup_t cfi_0001_fixups[] = { +static cfi_fixup_t cfi_0001_fixups[] = { {0, 0, NULL, NULL} }; -void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups) +static void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups) { cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_fixup_t *f; @@ -135,8 +110,12 @@ void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups) } /* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */ -__inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset) +static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset) { + cfi_flash_bank_t *cfi_info = bank->driver_priv; + + if(cfi_info->x16_as_x8) offset*=2; + /* while the sector list isn't built, only accesses to sector 0 work */ if (sector == 0) return bank->base + offset * bank->bus_width; @@ -152,7 +131,7 @@ __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset) } -void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) +static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) { int i; @@ -182,12 +161,12 @@ void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) * flash banks are expected to be made of similar chips * the query result should be the same for all */ -u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) +static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) { target_t *target = bank->target; u8 data[CFI_MAX_BUS_WIDTH]; - target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); + target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); if (bank->target->endianness == TARGET_LITTLE_ENDIAN) return data[0]; @@ -199,13 +178,13 @@ u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) * in case of a bank made of multiple chips, * the individual values are ORed */ -u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) +static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) { target_t *target = bank->target; u8 data[CFI_MAX_BUS_WIDTH]; int i; - target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); + target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); if (bank->target->endianness == TARGET_LITTLE_ENDIAN) { @@ -224,12 +203,21 @@ u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) } } -u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) +static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) { target_t *target = bank->target; + cfi_flash_bank_t *cfi_info = bank->driver_priv; u8 data[CFI_MAX_BUS_WIDTH * 2]; - target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 2, data); + if(cfi_info->x16_as_x8) + { + u8 i; + for(i=0;i<2;i++) + target_read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1, + &data[i*bank->bus_width] ); + } + else + target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 2, data); if (bank->target->endianness == TARGET_LITTLE_ENDIAN) return data[0] | data[bank->bus_width] << 8; @@ -237,12 +225,21 @@ u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) return data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8; } -u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) +static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) { target_t *target = bank->target; + cfi_flash_bank_t *cfi_info = bank->driver_priv; u8 data[CFI_MAX_BUS_WIDTH * 4]; - target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 4, data); + if(cfi_info->x16_as_x8) + { + u8 i; + for(i=0;i<4;i++) + target_read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1, + &data[i*bank->bus_width] ); + } + else + target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 4, data); if (bank->target->endianness == TARGET_LITTLE_ENDIAN) return data[0] | data[bank->bus_width] << 8 | data[bank->bus_width * 2] << 16 | data[bank->bus_width * 3] << 24; @@ -251,7 +248,7 @@ u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) data[(3 * bank->bus_width) - 1] << 16 | data[(4 * bank->bus_width) - 1] << 24; } -void cfi_intel_clear_status_register(flash_bank_t *bank) +static void cfi_intel_clear_status_register(flash_bank_t *bank) { target_t *target = bank->target; u8 command[8]; @@ -310,13 +307,14 @@ u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout) int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) { u8 status, oldstatus; + cfi_flash_bank_t *cfi_info = bank->driver_priv; oldstatus = cfi_get_u8(bank, 0, 0x0); do { status = cfi_get_u8(bank, 0, 0x0); if ((status ^ oldstatus) & 0x40) { - if (status & 0x20) { + if (status & cfi_info->status_poll_mask & 0x20) { oldstatus = cfi_get_u8(bank, 0, 0x0); status = cfi_get_u8(bank, 0, 0x0); if ((status ^ oldstatus) & 0x40) { @@ -327,7 +325,7 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) return(ERROR_OK); } } - } else { + } else { /* no toggle: finished, OK */ LOG_DEBUG("status: 0x%x", status); return(ERROR_OK); } @@ -341,8 +339,9 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) return(ERROR_FLASH_BUSY); } -int cfi_read_intel_pri_ext(flash_bank_t *bank) +static int cfi_read_intel_pri_ext(flash_bank_t *bank) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_intel_pri_ext_t *pri_ext = malloc(sizeof(cfi_intel_pri_ext_t)); target_t *target = bank->target; @@ -357,9 +356,15 @@ int cfi_read_intel_pri_ext(flash_bank_t *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("Could not read bank flash bank information"); return ERROR_FLASH_BANK_INVALID; } @@ -397,8 +402,9 @@ int cfi_read_intel_pri_ext(flash_bank_t *bank) return ERROR_OK; } -int cfi_read_spansion_pri_ext(flash_bank_t *bank) +static int cfi_read_spansion_pri_ext(flash_bank_t *bank) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t)); target_t *target = bank->target; @@ -413,7 +419,10 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("Could not read spansion bank information"); return ERROR_FLASH_BANK_INVALID; } @@ -458,8 +467,9 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank) return ERROR_OK; } -int cfi_read_atmel_pri_ext(flash_bank_t *bank) +static int cfi_read_atmel_pri_ext(flash_bank_t *bank) { + int retval; cfi_atmel_pri_ext_t atmel_pri_ext; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t)); @@ -482,7 +492,10 @@ int cfi_read_atmel_pri_ext(flash_bank_t *bank) if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R') || (atmel_pri_ext.pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("Could not read atmel bank information"); return ERROR_FLASH_BANK_INVALID; } @@ -521,7 +534,7 @@ int cfi_read_atmel_pri_ext(flash_bank_t *bank) return ERROR_OK; } -int cfi_read_0002_pri_ext(flash_bank_t *bank) +static int cfi_read_0002_pri_ext(flash_bank_t *bank) { cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -535,7 +548,7 @@ int cfi_read_0002_pri_ext(flash_bank_t *bank) } } -int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size) { int printed; cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -570,7 +583,7 @@ int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size) return ERROR_OK; } -int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) { int printed; cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -599,7 +612,7 @@ int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) return ERROR_OK; } -int cfi_register_commands(struct command_context_s *cmd_ctx) +static int cfi_register_commands(struct command_context_s *cmd_ctx) { /*command_t *cfi_cmd = */ register_command(cmd_ctx, NULL, "cfi", NULL, COMMAND_ANY, "flash bank cfi [jedec_probe/x16_as_x8]"); @@ -612,10 +625,12 @@ int cfi_register_commands(struct command_context_s *cmd_ctx) /* flash_bank cfi [options] */ -int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) +static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) { cfi_flash_bank_t *cfi_info; int i; + (void) cmd_ctx; + (void) cmd; if (argc < 6) { @@ -660,8 +675,9 @@ int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char ** return ERROR_OK; } -int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) +static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; u8 command[8]; @@ -672,17 +688,26 @@ int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) for (i = first; i <= last; i++) { cfi_command(bank, 0x20, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xd0, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->block_erase_timeout_typ)) == 0x80) bank->sectors[i].is_erased = 1; else { cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); return ERROR_FLASH_OPERATION_FAILED; @@ -690,13 +715,13 @@ int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - return ERROR_OK; } -int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) +static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; @@ -706,29 +731,50 @@ int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) for (i = first; i <= last; i++) { cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x80, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x30, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->block_erase_timeout_typ)) == ERROR_OK) bank->sectors[i].is_erased = 1; else { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); return ERROR_FLASH_OPERATION_FAILED; @@ -736,12 +782,10 @@ int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) } cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -int cfi_erase(struct flash_bank_s *bank, int first, int last) +static int cfi_erase(struct flash_bank_s *bank, int first, int last) { cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -776,8 +820,9 @@ int cfi_erase(struct flash_bank_s *bank, int first, int last) return ERROR_OK; } -int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) +static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; @@ -797,19 +842,28 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) { cfi_command(bank, 0x60, command); LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (set) { cfi_command(bank, 0x01, command); LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } bank->sectors[i].is_protected = 1; } else { cfi_command(bank, 0xd0, command); LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } bank->sectors[i].is_protected = 0; } @@ -824,14 +878,20 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) u8 block_status; /* read block lock bit, to verify status */ cfi_command(bank, 0x90, command); - target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } block_status = cfi_get_u8(bank, i, 0x2); if ((block_status & 0x1) != set) { LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status); cfi_command(bank, 0x70, command); - target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_intel_wait_status_busy(bank, 10); if (retry > 10) @@ -857,10 +917,16 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) cfi_intel_clear_status_register(bank); cfi_command(bank, 0x60, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x01, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_intel_wait_status_busy(bank, 100); } @@ -868,12 +934,10 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) +static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) { cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -898,7 +962,7 @@ int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) cfi_intel_protect(bank, set, first, last); break; default: - LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("protect: cfi primary command set %i unsupported", cfi_info->pri_id); break; } @@ -952,7 +1016,7 @@ static void cfi_fix_code_endian(target_t *target, u8 *dest, const u32 *src, u32 } } -u32 cfi_command_val(flash_bank_t *bank, u8 cmd) +static u32 cfi_command_val(flash_bank_t *bank, u8 cmd) { target_t *target = bank->target; @@ -975,7 +1039,7 @@ u32 cfi_command_val(flash_bank_t *bank, u8 cmd) } } -int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) +static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) { cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; @@ -1047,7 +1111,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 }; u8 target_code[4*CFI_MAX_INTEL_CODESIZE]; const u32 *target_code_src; - int target_code_size; + u32 target_code_size; int retval = ERROR_OK; @@ -1147,7 +1211,10 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 u32 thisrun_count = (count > buffer_size) ? buffer_size : count; u32 wsm_error; - target_write_buffer(target, source->address, thisrun_count, buffer); + if((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK) + { + goto cleanup; + } buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); @@ -1216,7 +1283,7 @@ cleanup: return retval; } -int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) +static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) { cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; @@ -1226,7 +1293,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, working_area_t *source; u32 buffer_size = 32768; u32 status; - int retval; + int retval, retvaltemp; int exit_code = ERROR_OK; /* input parameters - */ @@ -1385,11 +1452,18 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, retval=target_alloc_working_area(target, target_code_size, &cfi_info->write_algorithm); if (retval != ERROR_OK) + { + free(target_code); return retval; + } /* write algorithm code to working area */ - target_write_buffer(target, cfi_info->write_algorithm->address, - target_code_size, target_code); + if((retval = target_write_buffer(target, cfi_info->write_algorithm->address, + target_code_size, target_code)) != ERROR_OK) + { + free(target_code); + return retval; + } free(target_code); } @@ -1424,7 +1498,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, { u32 thisrun_count = (count > buffer_size) ? buffer_size : count; - target_write_buffer(target, source->address, thisrun_count, buffer); + retvaltemp = target_write_buffer(target, source->address, thisrun_count, buffer); buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); @@ -1443,7 +1517,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, status = buf_get_u32(reg_params[5].value, 0, 32); - if ((retval != ERROR_OK) || status != 0x80) + if ((retval != ERROR_OK) || (retvaltemp != ERROR_OK) || status != 0x80) { LOG_DEBUG("status: 0x%x", status); exit_code = ERROR_FLASH_OPERATION_FAILED; @@ -1471,22 +1545,32 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, return exit_code; } -int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; u8 command[8]; cfi_intel_clear_status_register(bank); cfi_command(bank, 0x40, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } - target->type->write_memory(target, address, bank->bus_width, 1, word); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) + { + return retval; + } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; @@ -1495,14 +1579,15 @@ int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address) return ERROR_OK; } -int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; u8 command[8]; /* Calculate buffer size and boundary mask */ - u32 buffersize = 1UL << cfi_info->max_buf_write_size; + u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); u32 buffermask = buffersize-1; u32 bufferwsize; @@ -1522,6 +1607,9 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 return ERROR_FLASH_OPERATION_FAILED; } + bufferwsize/=(bank->bus_width / bank->chip_width); + + /* Check for valid size */ if (wordcount > bufferwsize) { @@ -1534,11 +1622,17 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 /* Initiate buffer operation _*/ cfi_command(bank, 0xE8, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; @@ -1546,17 +1640,29 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 /* Write buffer wordcount-1 and data words */ cfi_command(bank, bufferwsize-1, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } - target->type->write_memory(target, address, bank->bus_width, bufferwsize, word); + if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) + { + return retval; + } /* Commit write operation */ cfi_command(bank, 0xd0, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; @@ -1565,28 +1671,44 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 return ERROR_OK; } -int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; u8 command[8]; cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xa0, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } - target->type->write_memory(target, address, bank->bus_width, 1, word); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) + { + return retval; + } if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; @@ -1595,15 +1717,16 @@ int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address) return ERROR_OK; } -int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; u8 command[8]; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; /* Calculate buffer size and boundary mask */ - u32 buffersize = 1UL << cfi_info->max_buf_write_size; + u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); u32 buffermask = buffersize-1; u32 bufferwsize; @@ -1623,6 +1746,8 @@ int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, return ERROR_FLASH_OPERATION_FAILED; } + bufferwsize/=(bank->bus_width / bank->chip_width); + /* Check for valid size */ if (wordcount > bufferwsize) { @@ -1632,29 +1757,50 @@ int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, // Unlock cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } // Buffer load command cfi_command(bank, 0x25, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } /* Write buffer wordcount-1 and data words */ cfi_command(bank, bufferwsize-1, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } - target->type->write_memory(target, address, bank->bus_width, bufferwsize, word); + if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) + { + return retval; + } /* Commit write operation */ cfi_command(bank, 0x29, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't write block at base 0x%x, address %x, size %x", bank->base, address, bufferwsize); return ERROR_FLASH_OPERATION_FAILED; @@ -1663,7 +1809,7 @@ int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, return ERROR_OK; } -int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) { cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -1684,7 +1830,7 @@ int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) return ERROR_FLASH_OPERATION_FAILED; } -int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) { cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -1695,7 +1841,7 @@ int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 addr return cfi_intel_write_words(bank, word, wordcount, address); break; case 2: - return cfi_spansion_write_words(bank, word, wordcount, address); + return cfi_spansion_write_words(bank, word, wordcount, address); break; default: LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); @@ -1743,7 +1889,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) for (i = 0; i < align; ++i, ++copy_p) { u8 byte; - target->type->read_memory(target, copy_p, 1, 1, &byte); + if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + { + return retval; + } cfi_add_byte(bank, current_word, byte); } @@ -1759,7 +1908,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p) { u8 byte; - target->type->read_memory(target, copy_p, 1, 1, &byte); + if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + { + return retval; + } cfi_add_byte(bank, current_word, byte); } @@ -1797,7 +1949,8 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { - u32 buffersize = 1UL << cfi_info->max_buf_write_size; + //adjust buffersize for chip width + u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); u32 buffermask = buffersize-1; u32 bufferwsize; @@ -1811,8 +1964,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) return ERROR_FLASH_OPERATION_FAILED; } + bufferwsize/=(bank->bus_width / bank->chip_width); + /* fall back to memory writes */ - while (count >= bank->bus_width) + while (count >= (u32)bank->bus_width) { int fallback; if ((write_p & 0xff) == 0) @@ -1857,9 +2012,15 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* return to read array mode, so we can read from flash again for padding */ cfi_command(bank, 0xf0, current_word); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, current_word); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + { + return retval; + } /* handle unaligned tail bytes */ if (count > 0) @@ -1878,7 +2039,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) for (; i < bank->bus_width; ++i, ++copy_p) { u8 byte; - target->type->read_memory(target, copy_p, 1, 1, &byte); + if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + { + return retval; + } cfi_add_byte(bank, current_word, byte); } retval = cfi_write_word(bank, current_word, write_p); @@ -1888,26 +2052,29 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* return to read array mode */ cfi_command(bank, 0xf0, current_word); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, current_word); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); } -void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param) +static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param) { + (void) param; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; pri_ext->_reversed_geometry = 1; } -void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) +static void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) { int i; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; + (void) param; if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3)) { @@ -1925,7 +2092,7 @@ void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) } } -void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param) +static void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param) { cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; @@ -1935,7 +2102,7 @@ void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param) pri_ext->_unlock2 = unlock_addresses->unlock2; } -int cfi_probe(struct flash_bank_s *bank) +static int cfi_probe(struct flash_bank_s *bank) { cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; @@ -1943,9 +2110,9 @@ int cfi_probe(struct flash_bank_s *bank) int num_sectors = 0; int i; int sector = 0; - u32 offset = 0; u32 unlock1 = 0x555; u32 unlock2 = 0x2aa; + int retval; if (bank->target->state != TARGET_HALTED) { @@ -1966,33 +2133,62 @@ int cfi_probe(struct flash_bank_s *bank) /* switch to read identifier codes mode ("AUTOSELECT") */ cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x90, command); - target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (bank->chip_width == 1) { u8 manufacturer, device_id; - target_read_u8(target, bank->base + 0x0, &manufacturer); - target_read_u8(target, bank->base + 0x1, &device_id); + if((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK) + { + return retval; + } + if((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK) + { + return retval; + } cfi_info->manufacturer = manufacturer; cfi_info->device_id = device_id; } else if (bank->chip_width == 2) { - target_read_u16(target, bank->base + 0x0, &cfi_info->manufacturer); - target_read_u16(target, bank->base + 0x2, &cfi_info->device_id); + if((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK) + { + return retval; + } + if((retval = target_read_u16(target, flash_address(bank, 0, 0x02), &cfi_info->device_id)) != ERROR_OK) + { + return retval; + } } + LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", cfi_info->manufacturer, cfi_info->device_id); /* switch back to read array mode */ cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } - cfi_fixup(bank, cfi_jedec_fixups); + /* check device/manufacturer ID for known non-CFI flashes. */ + cfi_fixup_non_cfi(bank); /* query only if this is a CFI compatible flash, * otherwise the relevant info has already been filled in @@ -2007,7 +2203,10 @@ int cfi_probe(struct flash_bank_s *bank) * SST flashes clearly violate this, and we will consider them incompatbile for now */ cfi_command(bank, 0x98, command); - target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_info->qry[0] = cfi_query_u8(bank, 0, 0x10); cfi_info->qry[1] = cfi_query_u8(bank, 0, 0x11); @@ -2018,10 +2217,16 @@ int cfi_probe(struct flash_bank_s *bank) if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y')) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - LOG_ERROR("Could not probe bank"); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + LOG_ERROR("Could not probe bank: no QRY"); return ERROR_FLASH_BANK_INVALID; } @@ -2057,17 +2262,12 @@ int cfi_probe(struct flash_bank_s *bank) (1 << cfi_info->block_erase_timeout_max) * (1 << cfi_info->block_erase_timeout_typ), (1 << cfi_info->chip_erase_timeout_max) * (1 << cfi_info->chip_erase_timeout_typ)); - cfi_info->dev_size = cfi_query_u8(bank, 0, 0x27); + cfi_info->dev_size = 1<interface_desc = cfi_query_u16(bank, 0, 0x28); cfi_info->max_buf_write_size = cfi_query_u16(bank, 0, 0x2a); cfi_info->num_erase_regions = cfi_query_u8(bank, 0, 0x2c); - LOG_DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", 1 << cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size)); - - if (((1 << cfi_info->dev_size) * bank->bus_width / bank->chip_width) != bank->size) - { - LOG_WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, 1 << cfi_info->dev_size); - } + LOG_DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size)); if (cfi_info->num_erase_regions) { @@ -2095,6 +2295,7 @@ int cfi_probe(struct flash_bank_s *bank) break; /* AMD/Spansion, Atmel, ... command set */ case 0x0002: + cfi_info->status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7; /* default for all CFI flashs */ cfi_read_0002_pri_ext(bank); break; default: @@ -2106,10 +2307,16 @@ int cfi_probe(struct flash_bank_s *bank) * we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command */ cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - } + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + } /* end CFI case */ /* apply fixups depending on the primary command set */ switch(cfi_info->pri_id) @@ -2128,6 +2335,11 @@ int cfi_probe(struct flash_bank_s *bank) break; } + if ((cfi_info->dev_size * bank->bus_width / bank->chip_width) != bank->size) + { + LOG_WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, cfi_info->dev_size); + } + if (cfi_info->num_erase_regions == 0) { /* a device might have only one erase block, spanning the whole device */ @@ -2141,6 +2353,8 @@ int cfi_probe(struct flash_bank_s *bank) } else { + u32 offset = 0; + for (i = 0; i < cfi_info->num_erase_regions; i++) { num_sectors += (cfi_info->erase_region_info[i] & 0xffff) + 1; @@ -2151,7 +2365,7 @@ int cfi_probe(struct flash_bank_s *bank) for (i = 0; i < cfi_info->num_erase_regions; i++) { - int j; + u32 j; for (j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++) { bank->sectors[sector].offset = offset; @@ -2162,14 +2376,18 @@ int cfi_probe(struct flash_bank_s *bank) sector++; } } + if (offset != cfi_info->dev_size) + { + LOG_WARNING("CFI size is 0x%x, but total sector size is 0x%x", cfi_info->dev_size, offset); + } } - + cfi_info->probed = 1; return ERROR_OK; } -int cfi_auto_probe(struct flash_bank_s *bank) +static int cfi_auto_probe(struct flash_bank_s *bank) { cfi_flash_bank_t *cfi_info = bank->driver_priv; if (cfi_info->probed) @@ -2178,8 +2396,9 @@ int cfi_auto_probe(struct flash_bank_s *bank) } -int cfi_intel_protect_check(struct flash_bank_s *bank) +static int cfi_intel_protect_check(struct flash_bank_s *bank) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; @@ -2191,7 +2410,10 @@ int cfi_intel_protect_check(struct flash_bank_s *bank) return ERROR_FLASH_OPERATION_FAILED; cfi_command(bank, 0x90, command); - target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } for (i = 0; i < bank->num_sectors; i++) { @@ -2204,13 +2426,12 @@ int cfi_intel_protect_check(struct flash_bank_s *bank) } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -int cfi_spansion_protect_check(struct flash_bank_s *bank) +static int cfi_spansion_protect_check(struct flash_bank_s *bank) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; @@ -2218,13 +2439,22 @@ int cfi_spansion_protect_check(struct flash_bank_s *bank) int i; cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x90, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } for (i = 0; i < bank->num_sectors; i++) { @@ -2237,12 +2467,10 @@ int cfi_spansion_protect_check(struct flash_bank_s *bank) } cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -int cfi_protect_check(struct flash_bank_s *bank) +static int cfi_protect_check(struct flash_bank_s *bank) { cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -2272,7 +2500,7 @@ int cfi_protect_check(struct flash_bank_s *bank) return ERROR_OK; } -int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) { int printed; cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -2284,7 +2512,7 @@ int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) } if (cfi_info->not_cfi == 0) - printed = snprintf(buf, buf_size, "\ncfi information:\n"); + printed = snprintf(buf, buf_size, "\ncfi information:\n"); else printed = snprintf(buf, buf_size, "\nnon-cfi flash:\n"); buf += printed; @@ -2326,7 +2554,7 @@ int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) buf_size -= printed; printed = snprintf(buf, buf_size, "size: 0x%x, interface desc: %i, max buffer write size: %x\n", - 1 << cfi_info->dev_size, + cfi_info->dev_size, cfi_info->interface_desc, 1 << cfi_info->max_buf_write_size); buf += printed;