X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fcfi.c;h=8f456b15963407ca15d0441670208f409db92b9e;hp=6aad04a7ec7e14f3106752654568bae72c699834;hb=0bba832713cca8e5931d5d21f37f526d0a3979cf;hpb=d47e1b8f362379d8a2307f49e2b42115a3f40524 diff --git a/src/flash/cfi.c b/src/flash/cfi.c index 6aad04a7ec..8f456b1596 100644 --- a/src/flash/cfi.c +++ b/src/flash/cfi.c @@ -38,18 +38,17 @@ #include #include -int cfi_register_commands(struct command_context_s *cmd_ctx); -int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); -int cfi_erase(struct flash_bank_s *bank, int first, int last); -int cfi_protect(struct flash_bank_s *bank, int set, int first, int last); -int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); -int cfi_probe(struct flash_bank_s *bank); -int cfi_auto_probe(struct flash_bank_s *bank); -int cfi_erase_check(struct flash_bank_s *bank); -int cfi_protect_check(struct flash_bank_s *bank); -int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size); - -int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); +static int cfi_register_commands(struct command_context_s *cmd_ctx); +static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); +static int cfi_erase(struct flash_bank_s *bank, int first, int last); +static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last); +static int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); +static int cfi_probe(struct flash_bank_s *bank); +static int cfi_auto_probe(struct flash_bank_s *bank); +static int cfi_protect_check(struct flash_bank_s *bank); +static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size); + +//static int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); #define CFI_MAX_BUS_WIDTH 4 #define CFI_MAX_CHIP_WIDTH 4 @@ -67,24 +66,24 @@ flash_driver_t cfi_flash = .write = cfi_write, .probe = cfi_probe, .auto_probe = cfi_auto_probe, - .erase_check = cfi_erase_check, + .erase_check = default_flash_blank_check, .protect_check = cfi_protect_check, .info = cfi_info }; -cfi_unlock_addresses_t cfi_unlock_addresses[] = +static cfi_unlock_addresses_t cfi_unlock_addresses[] = { [CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa }, [CFI_UNLOCK_5555_2AAA] = { .unlock1 = 0x5555, .unlock2 = 0x2aaa }, }; /* CFI fixups foward declarations */ -void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param); -void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param); -void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param); +static void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param); +static void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param); +static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param); /* fixup after identifying JEDEC manufactuer and ID */ -cfi_fixup_t cfi_jedec_fixups[] = { +static cfi_fixup_t cfi_jedec_fixups[] = { {CFI_MFR_SST, 0x00D4, cfi_fixup_non_cfi, NULL}, {CFI_MFR_SST, 0x00D5, cfi_fixup_non_cfi, NULL}, {CFI_MFR_SST, 0x00D6, cfi_fixup_non_cfi, NULL}, @@ -94,27 +93,35 @@ cfi_fixup_t cfi_jedec_fixups[] = { {CFI_MFR_ST, 0x00D6, cfi_fixup_non_cfi, NULL}, {CFI_MFR_AMD, 0x2223, cfi_fixup_non_cfi, NULL}, {CFI_MFR_AMD, 0x22ab, cfi_fixup_non_cfi, NULL}, + {CFI_MFR_FUJITSU, 0x226b, cfi_fixup_non_cfi, NULL}, + {CFI_MFR_AMIC, 0xb31a, cfi_fixup_non_cfi, NULL}, + {CFI_MFR_MX, 0x225b, cfi_fixup_non_cfi, NULL}, + {CFI_MFR_AMD, 0x225b, cfi_fixup_non_cfi, NULL}, {0, 0, NULL, NULL} }; /* fixup after reading cmdset 0002 primary query table */ -cfi_fixup_t cfi_0002_fixups[] = { +static cfi_fixup_t cfi_0002_fixups[] = { {CFI_MFR_SST, 0x00D4, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x00D5, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x00D6, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x00D7, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x2780, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_ATMEL, 0x00C8, cfi_fixup_atmel_reversed_erase_regions, NULL}, + {CFI_MFR_FUJITSU, 0x226b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, + {CFI_MFR_AMIC, 0xb31a, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, + {CFI_MFR_MX, 0x225b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, + {CFI_MFR_AMD, 0x225b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, {CFI_MFR_ANY, CFI_ID_ANY, cfi_fixup_0002_erase_regions, NULL}, {0, 0, NULL, NULL} }; /* fixup after reading cmdset 0001 primary query table */ -cfi_fixup_t cfi_0001_fixups[] = { +static cfi_fixup_t cfi_0001_fixups[] = { {0, 0, NULL, NULL} }; -void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups) +static void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups) { cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_fixup_t *f; @@ -147,7 +154,7 @@ __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset) } -void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) +static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) { int i; @@ -177,7 +184,7 @@ void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) * flash banks are expected to be made of similar chips * the query result should be the same for all */ -u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) +static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) { target_t *target = bank->target; u8 data[CFI_MAX_BUS_WIDTH]; @@ -194,7 +201,7 @@ u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) * in case of a bank made of multiple chips, * the individual values are ORed */ -u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) +static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) { target_t *target = bank->target; u8 data[CFI_MAX_BUS_WIDTH]; @@ -219,7 +226,7 @@ u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) } } -u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) +static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) { target_t *target = bank->target; u8 data[CFI_MAX_BUS_WIDTH * 2]; @@ -232,7 +239,7 @@ u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) return data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8; } -u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) +static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) { target_t *target = bank->target; u8 data[CFI_MAX_BUS_WIDTH * 4]; @@ -246,7 +253,7 @@ u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) data[(3 * bank->bus_width) - 1] << 16 | data[(4 * bank->bus_width) - 1] << 24; } -void cfi_intel_clear_status_register(flash_bank_t *bank) +static void cfi_intel_clear_status_register(flash_bank_t *bank) { target_t *target = bank->target; u8 command[8]; @@ -268,7 +275,7 @@ u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout) while ((!((status = cfi_get_u8(bank, 0, 0x0)) & 0x80)) && (timeout-- > 0)) { LOG_DEBUG("status: 0x%x", status); - usleep(1000); + alive_sleep(1); } /* mask out bit 0 (reserved) */ @@ -328,7 +335,7 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) } oldstatus = status; - usleep(1000); + alive_sleep(1); } while (timeout-- > 0); LOG_ERROR("timeout, status: 0x%x", status); @@ -336,8 +343,9 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) return(ERROR_FLASH_BUSY); } -int cfi_read_intel_pri_ext(flash_bank_t *bank) +static int cfi_read_intel_pri_ext(flash_bank_t *bank) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_intel_pri_ext_t *pri_ext = malloc(sizeof(cfi_intel_pri_ext_t)); target_t *target = bank->target; @@ -352,9 +360,16 @@ int cfi_read_intel_pri_ext(flash_bank_t *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + LOG_ERROR("Could not read bank flash bank information"); return ERROR_FLASH_BANK_INVALID; } @@ -391,8 +406,9 @@ int cfi_read_intel_pri_ext(flash_bank_t *bank) return ERROR_OK; } -int cfi_read_spansion_pri_ext(flash_bank_t *bank) +static int cfi_read_spansion_pri_ext(flash_bank_t *bank) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t)); target_t *target = bank->target; @@ -407,7 +423,11 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + LOG_ERROR("Could not read spansion bank information"); return ERROR_FLASH_BANK_INVALID; } @@ -451,8 +471,9 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank) return ERROR_OK; } -int cfi_read_atmel_pri_ext(flash_bank_t *bank) +static int cfi_read_atmel_pri_ext(flash_bank_t *bank) { + int retval; cfi_atmel_pri_ext_t atmel_pri_ext; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t)); @@ -475,7 +496,11 @@ int cfi_read_atmel_pri_ext(flash_bank_t *bank) if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R') || (atmel_pri_ext.pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + LOG_ERROR("Could not read atmel bank information"); return ERROR_FLASH_BANK_INVALID; } @@ -513,7 +538,7 @@ int cfi_read_atmel_pri_ext(flash_bank_t *bank) return ERROR_OK; } -int cfi_read_0002_pri_ext(flash_bank_t *bank) +static int cfi_read_0002_pri_ext(flash_bank_t *bank) { cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -527,7 +552,7 @@ int cfi_read_0002_pri_ext(flash_bank_t *bank) } } -int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size) { int printed; cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -562,7 +587,7 @@ int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size) return ERROR_OK; } -int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) { int printed; cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -591,7 +616,7 @@ int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) return ERROR_OK; } -int cfi_register_commands(struct command_context_s *cmd_ctx) +static int cfi_register_commands(struct command_context_s *cmd_ctx) { /*command_t *cfi_cmd = */ register_command(cmd_ctx, NULL, "cfi", NULL, COMMAND_ANY, "flash bank cfi [jedec_probe/x16_as_x8]"); @@ -604,7 +629,7 @@ int cfi_register_commands(struct command_context_s *cmd_ctx) /* flash_bank cfi [options] */ -int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) +static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) { cfi_flash_bank_t *cfi_info; int i; @@ -627,7 +652,6 @@ int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char ** bank->driver_priv = cfi_info; cfi_info->write_algorithm = NULL; - cfi_info->erase_check_algorithm = NULL; cfi_info->x16_as_x8 = 0; cfi_info->jedec_probe = 0; @@ -653,8 +677,9 @@ int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char ** return ERROR_OK; } -int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) +static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; u8 command[8]; @@ -665,17 +690,26 @@ int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) for (i = first; i <= last; i++) { cfi_command(bank, 0x20, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xd0, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->block_erase_timeout_typ)) == 0x80) bank->sectors[i].is_erased = 1; else { cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); return ERROR_FLASH_OPERATION_FAILED; @@ -683,13 +717,13 @@ int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - return ERROR_OK; } -int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) +static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; @@ -699,29 +733,50 @@ int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) for (i = first; i <= last; i++) { cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x80, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x30, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->block_erase_timeout_typ)) == ERROR_OK) bank->sectors[i].is_erased = 1; else { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); return ERROR_FLASH_OPERATION_FAILED; @@ -729,17 +784,16 @@ int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) } cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -int cfi_erase(struct flash_bank_s *bank, int first, int last) +static int cfi_erase(struct flash_bank_s *bank, int first, int last) { cfi_flash_bank_t *cfi_info = bank->driver_priv; if (bank->target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -768,8 +822,9 @@ int cfi_erase(struct flash_bank_s *bank, int first, int last) return ERROR_OK; } -int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) +static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; @@ -789,19 +844,28 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) { cfi_command(bank, 0x60, command); LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (set) { cfi_command(bank, 0x01, command); LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } bank->sectors[i].is_protected = 1; } else { cfi_command(bank, 0xd0, command); LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } bank->sectors[i].is_protected = 0; } @@ -816,14 +880,20 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) u8 block_status; /* read block lock bit, to verify status */ cfi_command(bank, 0x90, command); - target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } block_status = cfi_get_u8(bank, i, 0x2); if ((block_status & 0x1) != set) { LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status); cfi_command(bank, 0x70, command); - target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_intel_wait_status_busy(bank, 10); if (retry > 10) @@ -849,10 +919,16 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) cfi_intel_clear_status_register(bank); cfi_command(bank, 0x60, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x01, command); - target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_intel_wait_status_busy(bank, 100); } @@ -860,17 +936,16 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) +static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) { cfi_flash_bank_t *cfi_info = bank->driver_priv; if (bank->target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -943,7 +1018,7 @@ static void cfi_fix_code_endian(target_t *target, u8 *dest, const u32 *src, u32 } } -u32 cfi_command_val(flash_bank_t *bank, u8 cmd) +static u32 cfi_command_val(flash_bank_t *bank, u8 cmd) { target_t *target = bank->target; @@ -966,7 +1041,7 @@ u32 cfi_command_val(flash_bank_t *bank, u8 cmd) } } -int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) +static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) { cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; @@ -1138,7 +1213,10 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 u32 thisrun_count = (count > buffer_size) ? buffer_size : count; u32 wsm_error; - target_write_buffer(target, source->address, thisrun_count, buffer); + if((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK) + { + goto cleanup; + } buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); @@ -1207,7 +1285,7 @@ cleanup: return retval; } -int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) +static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) { cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; @@ -1217,7 +1295,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, working_area_t *source; u32 buffer_size = 32768; u32 status; - int retval; + int retval, retvaltemp; int exit_code = ERROR_OK; /* input parameters - */ @@ -1376,11 +1454,18 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, retval=target_alloc_working_area(target, target_code_size, &cfi_info->write_algorithm); if (retval != ERROR_OK) + { + free(target_code); return retval; + } /* write algorithm code to working area */ - target_write_buffer(target, cfi_info->write_algorithm->address, - target_code_size, target_code); + if((retval = target_write_buffer(target, cfi_info->write_algorithm->address, + target_code_size, target_code)) != ERROR_OK) + { + free(target_code); + return retval; + } free(target_code); } @@ -1415,7 +1500,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, { u32 thisrun_count = (count > buffer_size) ? buffer_size : count; - target_write_buffer(target, source->address, thisrun_count, buffer); + retvaltemp = target_write_buffer(target, source->address, thisrun_count, buffer); buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); @@ -1434,7 +1519,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, status = buf_get_u32(reg_params[5].value, 0, 32); - if ((retval != ERROR_OK) || status != 0x80) + if ((retval != ERROR_OK) || (retvaltemp != ERROR_OK) || status != 0x80) { LOG_DEBUG("status: 0x%x", status); exit_code = ERROR_FLASH_OPERATION_FAILED; @@ -1462,22 +1547,32 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, return exit_code; } -int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; u8 command[8]; cfi_intel_clear_status_register(bank); cfi_command(bank, 0x40, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } - target->type->write_memory(target, address, bank->bus_width, 1, word); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) + { + return retval; + } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; @@ -1486,14 +1581,15 @@ int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address) return ERROR_OK; } -int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; u8 command[8]; /* Calculate buffer size and boundary mask */ - u32 buffersize = 1UL << cfi_info->max_buf_write_size; + u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); u32 buffermask = buffersize-1; u32 bufferwsize; @@ -1513,6 +1609,9 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 return ERROR_FLASH_OPERATION_FAILED; } + bufferwsize/=(bank->bus_width / bank->chip_width); + + /* Check for valid size */ if (wordcount > bufferwsize) { @@ -1525,11 +1624,17 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 /* Initiate buffer operation _*/ cfi_command(bank, 0xE8, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; @@ -1537,17 +1642,29 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 /* Write buffer wordcount-1 and data words */ cfi_command(bank, bufferwsize-1, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } - target->type->write_memory(target, address, bank->bus_width, bufferwsize, word); + if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) + { + return retval; + } /* Commit write operation */ cfi_command(bank, 0xd0, command); - target->type->write_memory(target, address, bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; @@ -1556,28 +1673,44 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 return ERROR_OK; } -int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; u8 command[8]; cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xa0, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } - target->type->write_memory(target, address, bank->bus_width, 1, word); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) + { + return retval; + } if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; @@ -1586,7 +1719,99 @@ int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address) return ERROR_OK; } -int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +{ + int retval; + cfi_flash_bank_t *cfi_info = bank->driver_priv; + target_t *target = bank->target; + u8 command[8]; + cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; + + /* Calculate buffer size and boundary mask */ + u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); + u32 buffermask = buffersize-1; + u32 bufferwsize; + + /* Check for valid range */ + if (address & buffermask) + { + LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); + return ERROR_FLASH_OPERATION_FAILED; + } + switch(bank->chip_width) + { + case 4 : bufferwsize = buffersize / 4; break; + case 2 : bufferwsize = buffersize / 2; break; + case 1 : bufferwsize = buffersize; break; + default: + LOG_ERROR("Unsupported chip width %d", bank->chip_width); + return ERROR_FLASH_OPERATION_FAILED; + } + + bufferwsize/=(bank->bus_width / bank->chip_width); + + /* Check for valid size */ + if (wordcount > bufferwsize) + { + LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize); + return ERROR_FLASH_OPERATION_FAILED; + } + + // Unlock + cfi_command(bank, 0xaa, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + + cfi_command(bank, 0x55, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + + // Buffer load command + cfi_command(bank, 0x25, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + + /* Write buffer wordcount-1 and data words */ + cfi_command(bank, bufferwsize-1, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + + if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) + { + return retval; + } + + /* Commit write operation */ + cfi_command(bank, 0x29, command); + if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + + if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) + { + cfi_command(bank, 0xf0, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + + LOG_ERROR("couldn't write block at base 0x%x, address %x, size %x", bank->base, address, bufferwsize); + return ERROR_FLASH_OPERATION_FAILED; + } + + return ERROR_OK; +} + +static int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) { cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -1607,7 +1832,7 @@ int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) return ERROR_FLASH_OPERATION_FAILED; } -int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) { cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -1618,8 +1843,7 @@ int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 addr return cfi_intel_write_words(bank, word, wordcount, address); break; case 2: - /* return cfi_spansion_write_words(bank, word, address); */ - LOG_ERROR("cfi primary command set %i unimplemented - FIXME", cfi_info->pri_id); + return cfi_spansion_write_words(bank, word, wordcount, address); break; default: LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); @@ -1642,7 +1866,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) int retval; if (bank->target->state != TARGET_HALTED) + { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; + } if (offset + count > bank->size) return ERROR_FLASH_DST_OUT_OF_BANK; @@ -1664,7 +1891,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) for (i = 0; i < align; ++i, ++copy_p) { u8 byte; - target->type->read_memory(target, copy_p, 1, 1, &byte); + if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + { + return retval; + } cfi_add_byte(bank, current_word, byte); } @@ -1680,7 +1910,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p) { u8 byte; - target->type->read_memory(target, copy_p, 1, 1, &byte); + if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + { + return retval; + } cfi_add_byte(bank, current_word, byte); } @@ -1718,7 +1951,8 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { - u32 buffersize = 1UL << cfi_info->max_buf_write_size; + //adjust buffersize for chip width + u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); u32 buffermask = buffersize-1; u32 bufferwsize; @@ -1731,25 +1965,31 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) LOG_ERROR("Unsupported chip width %d", bank->chip_width); return ERROR_FLASH_OPERATION_FAILED; } + + bufferwsize/=(bank->bus_width / bank->chip_width); /* fall back to memory writes */ while (count >= bank->bus_width) { + int fallback; if ((write_p & 0xff) == 0) { LOG_INFO("Programming at %08x, count %08x bytes remaining", write_p, count); } + fallback = 1; if ((bufferwsize > 0) && (count >= buffersize) && !(write_p & buffermask)) { retval = cfi_write_words(bank, buffer, bufferwsize, write_p); - if (retval != ERROR_OK) - return retval; - - buffer += buffersize; - write_p += buffersize; - count -= buffersize; + if (retval == ERROR_OK) + { + buffer += buffersize; + write_p += buffersize; + count -= buffersize; + fallback=0; + } } - else + /* try the slow way? */ + if (fallback) { for (i = 0; i < bank->bus_width; i++) current_word[i] = 0; @@ -1774,9 +2014,15 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* return to read array mode, so we can read from flash again for padding */ cfi_command(bank, 0xf0, current_word); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, current_word); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + { + return retval; + } /* handle unaligned tail bytes */ if (count > 0) @@ -1795,7 +2041,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) for (; i < bank->bus_width; ++i, ++copy_p) { u8 byte; - target->type->read_memory(target, copy_p, 1, 1, &byte); + if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + { + return retval; + } cfi_add_byte(bank, current_word, byte); } retval = cfi_write_word(bank, current_word, write_p); @@ -1805,14 +2054,15 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* return to read array mode */ cfi_command(bank, 0xf0, current_word); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, current_word); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); } -void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param) +static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param) { cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; @@ -1820,7 +2070,7 @@ void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param) pri_ext->_reversed_geometry = 1; } -void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) +static void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) { int i; cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -1842,7 +2092,7 @@ void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) } } -void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param) +static void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param) { cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; @@ -1852,7 +2102,7 @@ void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param) pri_ext->_unlock2 = unlock_addresses->unlock2; } -int cfi_probe(struct flash_bank_s *bank) +static int cfi_probe(struct flash_bank_s *bank) { cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; @@ -1863,9 +2113,11 @@ int cfi_probe(struct flash_bank_s *bank) u32 offset = 0; u32 unlock1 = 0x555; u32 unlock2 = 0x2aa; + int retval; if (bank->target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -1882,31 +2134,58 @@ int cfi_probe(struct flash_bank_s *bank) /* switch to read identifier codes mode ("AUTOSELECT") */ cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x90, command); - target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } if (bank->chip_width == 1) { u8 manufacturer, device_id; - target_read_u8(target, bank->base + 0x0, &manufacturer); - target_read_u8(target, bank->base + 0x1, &device_id); + if((retval = target_read_u8(target, bank->base + 0x0, &manufacturer)) != ERROR_OK) + { + return retval; + } + if((retval = target_read_u8(target, bank->base + 0x1, &device_id)) != ERROR_OK) + { + return retval; + } cfi_info->manufacturer = manufacturer; cfi_info->device_id = device_id; } else if (bank->chip_width == 2) { - target_read_u16(target, bank->base + 0x0, &cfi_info->manufacturer); - target_read_u16(target, bank->base + 0x2, &cfi_info->device_id); + if((retval = target_read_u16(target, bank->base + 0x0, &cfi_info->manufacturer)) != ERROR_OK) + { + return retval; + } + if((retval = target_read_u16(target, bank->base + 0x2, &cfi_info->device_id)) != ERROR_OK) + { + return retval; + } } /* switch back to read array mode */ cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_fixup(bank, cfi_jedec_fixups); @@ -1923,7 +2202,10 @@ int cfi_probe(struct flash_bank_s *bank) * SST flashes clearly violate this, and we will consider them incompatbile for now */ cfi_command(bank, 0x98, command); - target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_info->qry[0] = cfi_query_u8(bank, 0, 0x10); cfi_info->qry[1] = cfi_query_u8(bank, 0, 0x11); @@ -1934,9 +2216,16 @@ int cfi_probe(struct flash_bank_s *bank) if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y')) { cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + LOG_ERROR("Could not probe bank"); return ERROR_FLASH_BANK_INVALID; } @@ -2021,9 +2310,15 @@ int cfi_probe(struct flash_bank_s *bank) * we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command */ cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } } /* apply fixups depending on the primary command set */ @@ -2084,7 +2379,7 @@ int cfi_probe(struct flash_bank_s *bank) return ERROR_OK; } -int cfi_auto_probe(struct flash_bank_s *bank) +static int cfi_auto_probe(struct flash_bank_s *bank) { cfi_flash_bank_t *cfi_info = bank->driver_priv; if (cfi_info->probed) @@ -2092,124 +2387,10 @@ int cfi_auto_probe(struct flash_bank_s *bank) return cfi_probe(bank); } -int cfi_erase_check(struct flash_bank_s *bank) -{ - cfi_flash_bank_t *cfi_info = bank->driver_priv; - target_t *target = bank->target; - int i; - int retval; - - if (bank->target->state != TARGET_HALTED) - { - return ERROR_TARGET_NOT_HALTED; - } - - if (!cfi_info->erase_check_algorithm) - { - u32 erase_check_code[] = - { - 0xe4d03001, /* ldrb r3, [r0], #1 */ - 0xe0022003, /* and r2, r2, r3 */ - 0xe2511001, /* subs r1, r1, #1 */ - 0x1afffffb, /* b -4 */ - 0xeafffffe /* b 0 */ - }; - - /* make sure we have a working area */ - if (target_alloc_working_area(target, 20, &cfi_info->erase_check_algorithm) != ERROR_OK) - { - LOG_WARNING("no working area available, falling back to slow memory reads"); - } - else - { - u8 erase_check_code_buf[5 * 4]; - - for (i = 0; i < 5; i++) - target_buffer_set_u32(target, erase_check_code_buf + (i*4), erase_check_code[i]); - - /* write algorithm code to working area */ - target->type->write_memory(target, cfi_info->erase_check_algorithm->address, 4, 5, erase_check_code_buf); - } - } - - if (!cfi_info->erase_check_algorithm) - { - u32 *buffer = malloc(4096); - - for (i = 0; i < bank->num_sectors; i++) - { - u32 address = bank->base + bank->sectors[i].offset; - u32 size = bank->sectors[i].size; - u32 check = 0xffffffffU; - int erased = 1; - - while (size > 0) - { - u32 thisrun_size = (size > 4096) ? 4096 : size; - int j; - - target->type->read_memory(target, address, 4, thisrun_size / 4, (u8*)buffer); - for (j = 0; j < thisrun_size / 4; j++) - check &= buffer[j]; - - if (check != 0xffffffff) - { - erased = 0; - break; - } - - size -= thisrun_size; - address += thisrun_size; - } - - bank->sectors[i].is_erased = erased; - } - - free(buffer); - } - else - { - for (i = 0; i < bank->num_sectors; i++) - { - u32 address = bank->base + bank->sectors[i].offset; - u32 size = bank->sectors[i].size; - - reg_param_t reg_params[3]; - armv4_5_algorithm_t armv4_5_info; - - armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; - armv4_5_info.core_mode = ARMV4_5_MODE_SVC; - armv4_5_info.core_state = ARMV4_5_STATE_ARM; - - init_reg_param(®_params[0], "r0", 32, PARAM_OUT); - buf_set_u32(reg_params[0].value, 0, 32, address); - - init_reg_param(®_params[1], "r1", 32, PARAM_OUT); - buf_set_u32(reg_params[1].value, 0, 32, size); - - init_reg_param(®_params[2], "r2", 32, PARAM_IN_OUT); - buf_set_u32(reg_params[2].value, 0, 32, 0xff); - - if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params, cfi_info->erase_check_algorithm->address, cfi_info->erase_check_algorithm->address + 0x10, 10000, &armv4_5_info)) != ERROR_OK) - return ERROR_FLASH_OPERATION_FAILED; - - if (buf_get_u32(reg_params[2].value, 0, 32) == 0xff) - bank->sectors[i].is_erased = 1; - else - bank->sectors[i].is_erased = 0; - - destroy_reg_param(®_params[0]); - destroy_reg_param(®_params[1]); - destroy_reg_param(®_params[2]); - } - } - - return ERROR_OK; -} - -int cfi_intel_protect_check(struct flash_bank_s *bank) +static int cfi_intel_protect_check(struct flash_bank_s *bank) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; @@ -2221,7 +2402,10 @@ int cfi_intel_protect_check(struct flash_bank_s *bank) return ERROR_FLASH_OPERATION_FAILED; cfi_command(bank, 0x90, command); - target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } for (i = 0; i < bank->num_sectors; i++) { @@ -2234,13 +2418,12 @@ int cfi_intel_protect_check(struct flash_bank_s *bank) } cfi_command(bank, 0xff, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -int cfi_spansion_protect_check(struct flash_bank_s *bank) +static int cfi_spansion_protect_check(struct flash_bank_s *bank) { + int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; @@ -2248,13 +2431,22 @@ int cfi_spansion_protect_check(struct flash_bank_s *bank) int i; cfi_command(bank, 0xaa, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x55, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } cfi_command(bank, 0x90, command); - target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command); + if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } for (i = 0; i < bank->num_sectors; i++) { @@ -2267,17 +2459,16 @@ int cfi_spansion_protect_check(struct flash_bank_s *bank) } cfi_command(bank, 0xf0, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - - return ERROR_OK; + return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -int cfi_protect_check(struct flash_bank_s *bank) +static int cfi_protect_check(struct flash_bank_s *bank) { cfi_flash_bank_t *cfi_info = bank->driver_priv; if (bank->target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -2301,7 +2492,7 @@ int cfi_protect_check(struct flash_bank_s *bank) return ERROR_OK; } -int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) { int printed; cfi_flash_bank_t *cfi_info = bank->driver_priv; @@ -2357,7 +2548,7 @@ int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) printed = snprintf(buf, buf_size, "size: 0x%x, interface desc: %i, max buffer write size: %x\n", 1 << cfi_info->dev_size, cfi_info->interface_desc, - cfi_info->max_buf_write_size); + 1 << cfi_info->max_buf_write_size); buf += printed; buf_size -= printed;