X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fcfi.c;h=6dbffb9e1cb3a1c5e17ba50d460332773ad93e0b;hp=edc4645f8c8f4dafe4e066e39e288f4b848de133;hb=ad090413a8dfacccc993ff15b8376e0f2bd56712;hpb=5f7791474b205858421fc3c05334b9374735776d diff --git a/src/flash/cfi.c b/src/flash/cfi.c index edc4645f8c..6dbffb9e1c 100644 --- a/src/flash/cfi.c +++ b/src/flash/cfi.c @@ -23,34 +23,12 @@ #include "config.h" #endif -#include "replacements.h" - #include "cfi.h" #include "non_cfi.h" - -#include "flash.h" -#include "target.h" -#include "log.h" #include "armv4_5.h" -#include "algorithm.h" #include "binarybuffer.h" -#include "types.h" - -#include -#include -#include - -static int cfi_register_commands(struct command_context_s *cmd_ctx); -static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); -static int cfi_erase(struct flash_bank_s *bank, int first, int last); -static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last); -static int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); -static int cfi_probe(struct flash_bank_s *bank); -static int cfi_auto_probe(struct flash_bank_s *bank); -static int cfi_protect_check(struct flash_bank_s *bank); -static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size); +#include "algorithm.h" -//static int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); #define CFI_MAX_BUS_WIDTH 4 #define CFI_MAX_CHIP_WIDTH 4 @@ -58,34 +36,19 @@ static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size); /* defines internal maximum size for code fragment in cfi_intel_write_block() */ #define CFI_MAX_INTEL_CODESIZE 256 -flash_driver_t cfi_flash = -{ - .name = "cfi", - .register_commands = cfi_register_commands, - .flash_bank_command = cfi_flash_bank_command, - .erase = cfi_erase, - .protect = cfi_protect, - .write = cfi_write, - .probe = cfi_probe, - .auto_probe = cfi_auto_probe, - .erase_check = default_flash_blank_check, - .protect_check = cfi_protect_check, - .info = cfi_info -}; - -static cfi_unlock_addresses_t cfi_unlock_addresses[] = +static struct cfi_unlock_addresses cfi_unlock_addresses[] = { [CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa }, [CFI_UNLOCK_5555_2AAA] = { .unlock1 = 0x5555, .unlock2 = 0x2aaa }, }; /* CFI fixups foward declarations */ -static void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param); -static void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param); -static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param); +static void cfi_fixup_0002_erase_regions(struct flash_bank *flash, void *param); +static void cfi_fixup_0002_unlock_addresses(struct flash_bank *flash, void *param); +static void cfi_fixup_atmel_reversed_erase_regions(struct flash_bank *flash, void *param); /* fixup after reading cmdset 0002 primary query table */ -static cfi_fixup_t cfi_0002_fixups[] = { +static const struct cfi_fixup cfi_0002_fixups[] = { {CFI_MFR_SST, 0x00D4, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x00D5, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x00D6, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, @@ -101,14 +64,14 @@ static cfi_fixup_t cfi_0002_fixups[] = { }; /* fixup after reading cmdset 0001 primary query table */ -static cfi_fixup_t cfi_0001_fixups[] = { +static const struct cfi_fixup cfi_0001_fixups[] = { {0, 0, NULL, NULL} }; -static void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups) +static void cfi_fixup(struct flash_bank *bank, const struct cfi_fixup *fixups) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_fixup_t *f; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + const struct cfi_fixup *f; for (f = fixups; f->fixup; f++) { @@ -120,9 +83,13 @@ static void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups) } } -/* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */ -static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset) +/* inline uint32_t flash_address(struct flash_bank *bank, int sector, uint32_t offset) */ +static __inline__ uint32_t flash_address(struct flash_bank *bank, int sector, uint32_t offset) { + struct cfi_flash_bank *cfi_info = bank->driver_priv; + + if (cfi_info->x16_as_x8) offset *= 2; + /* while the sector list isn't built, only accesses to sector 0 work */ if (sector == 0) return bank->base + offset * bank->bus_width; @@ -138,7 +105,7 @@ static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset) } -static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) +static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf) { int i; @@ -168,12 +135,12 @@ static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) * flash banks are expected to be made of similar chips * the query result should be the same for all */ -static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) +static uint8_t cfi_query_u8(struct flash_bank *bank, int sector, uint32_t offset) { - target_t *target = bank->target; - u8 data[CFI_MAX_BUS_WIDTH]; + struct target *target = bank->target; + uint8_t data[CFI_MAX_BUS_WIDTH]; - target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); + target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); if (bank->target->endianness == TARGET_LITTLE_ENDIAN) return data[0]; @@ -185,13 +152,13 @@ static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) * in case of a bank made of multiple chips, * the individual values are ORed */ -static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) +static uint8_t cfi_get_u8(struct flash_bank *bank, int sector, uint32_t offset) { - target_t *target = bank->target; - u8 data[CFI_MAX_BUS_WIDTH]; + struct target *target = bank->target; + uint8_t data[CFI_MAX_BUS_WIDTH]; int i; - target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); + target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); if (bank->target->endianness == TARGET_LITTLE_ENDIAN) { @@ -202,7 +169,7 @@ static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) } else { - u8 value = 0; + uint8_t value = 0; for (i = 0; i < bank->bus_width / bank->chip_width; i++) value |= data[bank->bus_width - 1 - i]; @@ -210,12 +177,21 @@ static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) } } -static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) +static uint16_t cfi_query_u16(struct flash_bank *bank, int sector, uint32_t offset) { - target_t *target = bank->target; - u8 data[CFI_MAX_BUS_WIDTH * 2]; + struct target *target = bank->target; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + uint8_t data[CFI_MAX_BUS_WIDTH * 2]; - target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 2, data); + if (cfi_info->x16_as_x8) + { + uint8_t i; + for (i = 0;i < 2;i++) + target_read_memory(target, flash_address(bank, sector, offset + i), bank->bus_width, 1, + &data[i*bank->bus_width]); + } + else + target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 2, data); if (bank->target->endianness == TARGET_LITTLE_ENDIAN) return data[0] | data[bank->bus_width] << 8; @@ -223,12 +199,21 @@ static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) return data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8; } -static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) +static uint32_t cfi_query_u32(struct flash_bank *bank, int sector, uint32_t offset) { - target_t *target = bank->target; - u8 data[CFI_MAX_BUS_WIDTH * 4]; + struct target *target = bank->target; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + uint8_t data[CFI_MAX_BUS_WIDTH * 4]; - target->type->read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 4, data); + if (cfi_info->x16_as_x8) + { + uint8_t i; + for (i = 0;i < 4;i++) + target_read_memory(target, flash_address(bank, sector, offset + i), bank->bus_width, 1, + &data[i*bank->bus_width]); + } + else + target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 4, data); if (bank->target->endianness == TARGET_LITTLE_ENDIAN) return data[0] | data[bank->bus_width] << 8 | data[bank->bus_width * 2] << 16 | data[bank->bus_width * 3] << 24; @@ -237,10 +222,10 @@ static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) data[(3 * bank->bus_width) - 1] << 16 | data[(4 * bank->bus_width) - 1] << 24; } -static void cfi_intel_clear_status_register(flash_bank_t *bank) +static void cfi_intel_clear_status_register(struct flash_bank *bank) { - target_t *target = bank->target; - u8 command[8]; + struct target *target = bank->target; + uint8_t command[8]; if (target->state != TARGET_HALTED) { @@ -249,12 +234,12 @@ static void cfi_intel_clear_status_register(flash_bank_t *bank) } cfi_command(bank, 0x50, command); - target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout) +uint8_t cfi_intel_wait_status_busy(struct flash_bank *bank, int timeout) { - u8 status; + uint8_t status; while ((!((status = cfi_get_u8(bank, 0, 0x0)) & 0x80)) && (timeout-- > 0)) { @@ -293,10 +278,10 @@ u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout) return status; } -int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) +int cfi_spansion_wait_status_busy(struct flash_bank *bank, int timeout) { - u8 status, oldstatus; - cfi_flash_bank_t *cfi_info = bank->driver_priv; + uint8_t status, oldstatus; + struct cfi_flash_bank *cfi_info = bank->driver_priv; oldstatus = cfi_get_u8(bank, 0, 0x0); @@ -328,13 +313,13 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) return(ERROR_FLASH_BUSY); } -static int cfi_read_intel_pri_ext(flash_bank_t *bank) +static int cfi_read_intel_pri_ext(struct flash_bank *bank) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_intel_pri_ext_t *pri_ext = malloc(sizeof(cfi_intel_pri_ext_t)); - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_intel_pri_ext *pri_ext = malloc(sizeof(struct cfi_intel_pri_ext)); + struct target *target = bank->target; + uint8_t command[8]; cfi_info->pri_ext = pri_ext; @@ -345,12 +330,12 @@ static int cfi_read_intel_pri_ext(flash_bank_t *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -367,7 +352,10 @@ static int cfi_read_intel_pri_ext(flash_bank_t *bank) pri_ext->suspend_cmd_support = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9); pri_ext->blk_status_reg_mask = cfi_query_u16(bank, 0, cfi_info->pri_addr + 0xa); - LOG_DEBUG("feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask); + LOG_DEBUG("feature_support: 0x%" PRIx32 ", suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x", + pri_ext->feature_support, + pri_ext->suspend_cmd_support, + pri_ext->blk_status_reg_mask); pri_ext->vcc_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xc); pri_ext->vpp_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xd); @@ -391,13 +379,13 @@ static int cfi_read_intel_pri_ext(flash_bank_t *bank) return ERROR_OK; } -static int cfi_read_spansion_pri_ext(flash_bank_t *bank) +static int cfi_read_spansion_pri_ext(struct flash_bank *bank) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t)); - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); + struct target *target = bank->target; + uint8_t command[8]; cfi_info->pri_ext = pri_ext; @@ -408,7 +396,7 @@ static int cfi_read_spansion_pri_ext(flash_bank_t *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -456,21 +444,21 @@ static int cfi_read_spansion_pri_ext(flash_bank_t *bank) return ERROR_OK; } -static int cfi_read_atmel_pri_ext(flash_bank_t *bank) +static int cfi_read_atmel_pri_ext(struct flash_bank *bank) { int retval; - cfi_atmel_pri_ext_t atmel_pri_ext; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t)); - target_t *target = bank->target; - u8 command[8]; + struct cfi_atmel_pri_ext atmel_pri_ext; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); + struct target *target = bank->target; + uint8_t command[8]; /* ATMEL devices use the same CFI primary command set (0x2) as AMD/Spansion, * but a different primary extended query table. * We read the atmel table, and prepare a valid AMD/Spansion query table. */ - memset(pri_ext, 0, sizeof(cfi_spansion_pri_ext_t)); + memset(pri_ext, 0, sizeof(struct cfi_spansion_pri_ext)); cfi_info->pri_ext = pri_ext; @@ -481,7 +469,7 @@ static int cfi_read_atmel_pri_ext(flash_bank_t *bank) if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R') || (atmel_pri_ext.pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -523,9 +511,9 @@ static int cfi_read_atmel_pri_ext(flash_bank_t *bank) return ERROR_OK; } -static int cfi_read_0002_pri_ext(flash_bank_t *bank) +static int cfi_read_0002_pri_ext(struct flash_bank *bank) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; + struct cfi_flash_bank *cfi_info = bank->driver_priv; if (cfi_info->manufacturer == CFI_MFR_ATMEL) { @@ -537,11 +525,11 @@ static int cfi_read_0002_pri_ext(flash_bank_t *bank) } } -static int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int cfi_spansion_info(struct flash_bank *bank, char *buf, int buf_size) { int printed; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; printed = snprintf(buf, buf_size, "\nSpansion primary algorithm extend information:\n"); buf += printed; @@ -572,11 +560,11 @@ static int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size) return ERROR_OK; } -static int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int cfi_intel_info(struct flash_bank *bank, char *buf, int buf_size) { int printed; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext; printed = snprintf(buf, buf_size, "\nintel primary algorithm extend information:\n"); buf += printed; @@ -586,7 +574,7 @@ static int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, "feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x\n", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask); + printed = snprintf(buf, buf_size, "feature_support: 0x%" PRIx32 ", suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x\n", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask); buf += printed; buf_size -= printed; @@ -601,40 +589,30 @@ static int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) return ERROR_OK; } -static int cfi_register_commands(struct command_context_s *cmd_ctx) -{ - /*command_t *cfi_cmd = */ - register_command(cmd_ctx, NULL, "cfi", NULL, COMMAND_ANY, "flash bank cfi [jedec_probe/x16_as_x8]"); - /* - register_command(cmd_ctx, cfi_cmd, "part_id", cfi_handle_part_id_command, COMMAND_EXEC, - "print part id of cfi flash bank "); - */ - return ERROR_OK; -} - /* flash_bank cfi [options] */ -static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) +FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command) { - cfi_flash_bank_t *cfi_info; - int i; - (void) cmd_ctx; - (void) cmd; + struct cfi_flash_bank *cfi_info; - if (argc < 6) + if (CMD_ARGC < 6) { LOG_WARNING("incomplete flash_bank cfi configuration"); return ERROR_FLASH_BANK_INVALID; } - if ((strtoul(args[4], NULL, 0) > CFI_MAX_CHIP_WIDTH) - || (strtoul(args[3], NULL, 0) > CFI_MAX_BUS_WIDTH)) + uint16_t chip_width, bus_width; + COMMAND_PARSE_NUMBER(u16, CMD_ARGV[3], bus_width); + COMMAND_PARSE_NUMBER(u16, CMD_ARGV[4], chip_width); + + if ((chip_width > CFI_MAX_CHIP_WIDTH) + || (bus_width > CFI_MAX_BUS_WIDTH)) { LOG_ERROR("chip and bus width have to specified in bytes"); return ERROR_FLASH_BANK_INVALID; } - cfi_info = malloc(sizeof(cfi_flash_bank_t)); + cfi_info = malloc(sizeof(struct cfi_flash_bank)); cfi_info->probed = 0; bank->driver_priv = cfi_info; @@ -644,13 +622,13 @@ static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, cfi_info->jedec_probe = 0; cfi_info->not_cfi = 0; - for (i = 6; i < argc; i++) + for (unsigned i = 6; i < CMD_ARGC; i++) { - if (strcmp(args[i], "x16_as_x8") == 0) + if (strcmp(CMD_ARGV[i], "x16_as_x8") == 0) { cfi_info->x16_as_x8 = 1; } - else if (strcmp(args[i], "jedec_probe") == 0) + else if (strcmp(CMD_ARGV[i], "jedec_probe") == 0) { cfi_info->jedec_probe = 1; } @@ -664,12 +642,12 @@ static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, return ERROR_OK; } -static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) +static int cfi_intel_erase(struct flash_bank *bank, int first, int last) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct target *target = bank->target; + uint8_t command[8]; int i; cfi_intel_clear_status_register(bank); @@ -677,13 +655,13 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) for (i = first; i <= last; i++) { cfi_command(bank, 0x20, command); - if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xd0, command); - if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -693,64 +671,64 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) else { cfi_command(bank, 0xff, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); + LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" PRIx32 , i, bank->base); return ERROR_FLASH_OPERATION_FAILED; } } cfi_command(bank, 0xff, command); - return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) +static int cfi_spansion_erase(struct flash_bank *bank, int first, int last) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; + struct target *target = bank->target; + uint8_t command[8]; int i; for (i = first; i <= last; i++) { cfi_command(bank, 0xaa, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x80, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xaa, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x30, command); - if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -760,23 +738,23 @@ static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) else { cfi_command(bank, 0xf0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); + LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" PRIx32, i, bank->base); return ERROR_FLASH_OPERATION_FAILED; } } cfi_command(bank, 0xf0, command); - return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -static int cfi_erase(struct flash_bank_s *bank, int first, int last) +static int cfi_erase(struct flash_bank *bank, int first, int last) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; + struct cfi_flash_bank *cfi_info = bank->driver_priv; if (bank->target->state != TARGET_HALTED) { @@ -792,7 +770,7 @@ static int cfi_erase(struct flash_bank_s *bank, int first, int last) if (cfi_info->qry[0] != 'Q') return ERROR_FLASH_BANK_NOT_PROBED; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -809,13 +787,13 @@ static int cfi_erase(struct flash_bank_s *bank, int first, int last) return ERROR_OK; } -static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) +static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int last) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext; - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext; + struct target *target = bank->target; + uint8_t command[8]; int retry = 0; int i; @@ -830,16 +808,16 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int for (i = first; i <= last; i++) { cfi_command(bank, 0x60, command); - LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } if (set) { cfi_command(bank, 0x01, command); - LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32 , flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -848,8 +826,8 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int else { cfi_command(bank, 0xd0, command); - LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -864,10 +842,10 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int } else { - u8 block_status; + uint8_t block_status; /* read block lock bit, to verify status */ cfi_command(bank, 0x90, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -877,7 +855,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int { LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status); cfi_command(bank, 0x70, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -906,13 +884,13 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int cfi_intel_clear_status_register(bank); cfi_command(bank, 0x60, command); - if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x01, command); - if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -923,12 +901,12 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int } cfi_command(bank, 0xff, command); - return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) +static int cfi_protect(struct flash_bank *bank, int set, int first, int last) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; + struct cfi_flash_bank *cfi_info = bank->driver_priv; if (bank->target->state != TARGET_HALTED) { @@ -944,7 +922,7 @@ static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) if (cfi_info->qry[0] != 'Q') return ERROR_FLASH_BANK_NOT_PROBED; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -959,17 +937,17 @@ static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) } /* FIXME Replace this by a simple memcpy() - still unsure about sideeffects */ -static void cfi_add_byte(struct flash_bank_s *bank, u8 *word, u8 byte) +static void cfi_add_byte(struct flash_bank *bank, uint8_t *word, uint8_t byte) { - /* target_t *target = bank->target; */ + /* struct target *target = bank->target; */ int i; /* NOTE: * The data to flash must not be changed in endian! We write a bytestrem in * target byte order already. Only the control and status byte lane of the flash - * WSM is interpreted by the CPU in different ways, when read a u16 or u32 - * word (data seems to be in the upper or lower byte lane for u16 accesses). + * WSM is interpreted by the CPU in different ways, when read a uint16_t or uint32_t + * word (data seems to be in the upper or lower byte lane for uint16_t accesses). */ #if 0 @@ -994,22 +972,22 @@ static void cfi_add_byte(struct flash_bank_s *bank, u8 *word, u8 byte) /* Convert code image to target endian */ /* FIXME create general block conversion fcts in target.c?) */ -static void cfi_fix_code_endian(target_t *target, u8 *dest, const u32 *src, u32 count) +static void cfi_fix_code_endian(struct target *target, uint8_t *dest, const uint32_t *src, uint32_t count) { - u32 i; - for (i=0; i< count; i++) + uint32_t i; + for (i = 0; i< count; i++) { target_buffer_set_u32(target, dest, *src); - dest+=4; + dest += 4; src++; } } -static u32 cfi_command_val(flash_bank_t *bank, u8 cmd) +static uint32_t cfi_command_val(struct flash_bank *bank, uint8_t cmd) { - target_t *target = bank->target; + struct target *target = bank->target; - u8 buf[CFI_MAX_BUS_WIDTH]; + uint8_t buf[CFI_MAX_BUS_WIDTH]; cfi_command(bank, cmd, buf); switch (bank->bus_width) { @@ -1028,15 +1006,15 @@ static u32 cfi_command_val(flash_bank_t *bank, u8 cmd) } } -static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) +static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t address, uint32_t count) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; - target_t *target = bank->target; - reg_param_t reg_params[7]; - armv4_5_algorithm_t armv4_5_info; - working_area_t *source; - u32 buffer_size = 32768; - u32 write_command_val, busy_pattern_val, error_pattern_val; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct target *target = bank->target; + struct reg_param reg_params[7]; + struct armv4_5_algorithm armv4_5_info; + struct working_area *source; + uint32_t buffer_size = 32768; + uint32_t write_command_val, busy_pattern_val, error_pattern_val; /* algorithm register usage: * r0: source address (in RAM) @@ -1048,7 +1026,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr * r6: error test pattern */ - static const u32 word_32_code[] = { + static const uint32_t word_32_code[] = { 0xe4904004, /* loop: ldr r4, [r0], #4 */ 0xe5813000, /* str r3, [r1] */ 0xe5814000, /* str r4, [r1] */ @@ -1065,7 +1043,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr 0xeafffffe /* done: b -2 */ }; - static const u32 word_16_code[] = { + static const uint32_t word_16_code[] = { 0xe0d040b2, /* loop: ldrh r4, [r0], #2 */ 0xe1c130b0, /* strh r3, [r1] */ 0xe1c140b0, /* strh r4, [r1] */ @@ -1082,7 +1060,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr 0xeafffffe /* done: b -2 */ }; - static const u32 word_8_code[] = { + static const uint32_t word_8_code[] = { 0xe4d04001, /* loop: ldrb r4, [r0], #1 */ 0xe5c13000, /* strb r3, [r1] */ 0xe5c14000, /* strb r4, [r1] */ @@ -1098,9 +1076,9 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr 0xeafffff2, /* b loop */ 0xeafffffe /* done: b -2 */ }; - u8 target_code[4*CFI_MAX_INTEL_CODESIZE]; - const u32 *target_code_src; - u32 target_code_size; + uint8_t target_code[4*CFI_MAX_INTEL_CODESIZE]; + const uint32_t *target_code_src; + uint32_t target_code_size; int retval = ERROR_OK; @@ -1111,11 +1089,11 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr armv4_5_info.core_state = ARMV4_5_STATE_ARM; /* If we are setting up the write_algorith, we need target_code_src */ - /* if not we only need target_code_size. */ - /* */ - /* However, we don't want to create multiple code paths, so we */ - /* do the unecessary evaluation of target_code_src, which the */ - /* compiler will probably nicely optimize away if not needed */ + /* if not we only need target_code_size. */ + + /* However, we don't want to create multiple code paths, so we */ + /* do the unecessary evaluation of target_code_src, which the */ + /* compiler will probably nicely optimize away if not needed */ /* prepare algorithm code for target endian */ switch (bank->bus_width) @@ -1140,7 +1118,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr /* flash write code */ if (!cfi_info->write_algorithm) { - if ( target_code_size > sizeof(target_code) ) + if (target_code_size > sizeof(target_code)) { LOG_WARNING("Internal error - target code buffer to small. Increase CFI_MAX_INTEL_CODESIZE and recompile."); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; @@ -1192,15 +1170,15 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr busy_pattern_val = cfi_command_val(bank, 0x80); error_pattern_val = cfi_command_val(bank, 0x7e); - LOG_INFO("Using target buffer at 0x%08x and of size 0x%04x", source->address, buffer_size ); + LOG_INFO("Using target buffer at 0x%08" PRIx32 " and of size 0x%04" PRIx32, source->address, buffer_size); /* Programming main loop */ while (count > 0) { - u32 thisrun_count = (count > buffer_size) ? buffer_size : count; - u32 wsm_error; + uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count; + uint32_t wsm_error; - if((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK) + if ((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK) { goto cleanup; } @@ -1213,12 +1191,12 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr buf_set_u32(reg_params[5].value, 0, 32, busy_pattern_val); buf_set_u32(reg_params[6].value, 0, 32, error_pattern_val); - LOG_INFO("Write 0x%04x bytes to flash at 0x%08x", thisrun_count, address ); + LOG_INFO("Write 0x%04" PRIx32 " bytes to flash at 0x%08" PRIx32 , thisrun_count, address); /* Execute algorithm, assume breakpoint for last instruction */ - retval = target->type->run_algorithm(target, 0, NULL, 7, reg_params, + retval = target_run_algorithm(target, 0, NULL, 7, reg_params, cfi_info->write_algorithm->address, - cfi_info->write_algorithm->address + target_code_size - sizeof(u32), + cfi_info->write_algorithm->address + target_code_size - sizeof(uint32_t), 10000, /* 10s should be enough for max. 32k of data */ &armv4_5_info); @@ -1272,16 +1250,16 @@ cleanup: return retval; } -static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) +static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t address, uint32_t count) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; - target_t *target = bank->target; - reg_param_t reg_params[10]; - armv4_5_algorithm_t armv4_5_info; - working_area_t *source; - u32 buffer_size = 32768; - u32 status; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; + struct target *target = bank->target; + struct reg_param reg_params[10]; + struct armv4_5_algorithm armv4_5_info; + struct working_area *source; + uint32_t buffer_size = 32768; + uint32_t status; int retval, retvaltemp; int exit_code = ERROR_OK; @@ -1302,7 +1280,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a /* R10 = unlock2_addr */ /* R11 = unlock2_cmd */ - static const u32 word_32_code[] = { + static const uint32_t word_32_code[] = { /* 00008100 : */ 0xe4905004, /* ldr r5, [r0], #4 */ 0xe5889000, /* str r9, [r8] */ @@ -1336,7 +1314,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a 0xeafffffe /* b 8154 */ }; - static const u32 word_16_code[] = { + static const uint32_t word_16_code[] = { /* 00008158 : */ 0xe0d050b2, /* ldrh r5, [r0], #2 */ 0xe1c890b0, /* strh r9, [r8] */ @@ -1370,7 +1348,32 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a 0xeafffffe /* b 81ac */ }; - static const u32 word_8_code[] = { + static const uint32_t word_16_code_dq7only[] = { + /* : */ + 0xe0d050b2, /* ldrh r5, [r0], #2 */ + 0xe1c890b0, /* strh r9, [r8] */ + 0xe1cab0b0, /* strh r11, [r10] */ + 0xe1c830b0, /* strh r3, [r8] */ + 0xe1c150b0, /* strh r5, [r1] */ + 0xe1a00000, /* nop (mov r0,r0) */ + /* */ + /* : */ + 0xe1d160b0, /* ldrh r6, [r1] */ + 0xe0257006, /* eor r7, r5, r6 */ + 0xe2177080, /* ands r7, #0x80 */ + 0x1afffffb, /* bne 8168 */ + /* */ + 0xe2522001, /* subs r2, r2, #1 ; 0x1 */ + 0x03a05080, /* moveq r5, #128 ; 0x80 */ + 0x0a000001, /* beq 81ac */ + 0xe2811002, /* add r1, r1, #2 ; 0x2 */ + 0xeafffff0, /* b 8158 */ + /* */ + /* 000081ac : */ + 0xeafffffe /* b 81ac */ + }; + + static const uint32_t word_8_code[] = { /* 000081b0 : */ 0xe4d05001, /* ldrb r5, [r0], #1 */ 0xe5c89000, /* strb r9, [r8] */ @@ -1408,37 +1411,49 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a armv4_5_info.core_mode = ARMV4_5_MODE_SVC; armv4_5_info.core_state = ARMV4_5_STATE_ARM; + int target_code_size; + const uint32_t *target_code_src; + + switch (bank->bus_width) + { + case 1 : + target_code_src = word_8_code; + target_code_size = sizeof(word_8_code); + break; + case 2 : + /* Check for DQ5 support */ + if( cfi_info->status_poll_mask & (1 << 5) ) + { + target_code_src = word_16_code; + target_code_size = sizeof(word_16_code); + } + else + { + /* No DQ5 support. Use DQ7 DATA# polling only. */ + target_code_src = word_16_code_dq7only; + target_code_size = sizeof(word_16_code_dq7only); + } + break; + case 4 : + target_code_src = word_32_code; + target_code_size = sizeof(word_32_code); + break; + default: + LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + /* flash write code */ if (!cfi_info->write_algorithm) { - u8 *target_code; - int target_code_size; - const u32 *src; + uint8_t *target_code; /* convert bus-width dependent algorithm code to correct endiannes */ - switch (bank->bus_width) - { - case 1: - src = word_8_code; - target_code_size = sizeof(word_8_code); - break; - case 2: - src = word_16_code; - target_code_size = sizeof(word_16_code); - break; - case 4: - src = word_32_code; - target_code_size = sizeof(word_32_code); - break; - default: - LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); - return ERROR_FLASH_OPERATION_FAILED; - } target_code = malloc(target_code_size); - cfi_fix_code_endian(target, target_code, src, target_code_size / 4); + cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); /* allocate working area */ - retval=target_alloc_working_area(target, target_code_size, + retval = target_alloc_working_area(target, target_code_size, &cfi_info->write_algorithm); if (retval != ERROR_OK) { @@ -1447,7 +1462,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a } /* write algorithm code to working area */ - if((retval = target_write_buffer(target, cfi_info->write_algorithm->address, + if ((retval = target_write_buffer(target, cfi_info->write_algorithm->address, target_code_size, target_code)) != ERROR_OK) { free(target_code); @@ -1485,7 +1500,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a while (count > 0) { - u32 thisrun_count = (count > buffer_size) ? buffer_size : count; + uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count; retvaltemp = target_write_buffer(target, source->address, thisrun_count, buffer); @@ -1499,16 +1514,16 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a buf_set_u32(reg_params[8].value, 0, 32, flash_address(bank, 0, pri_ext->_unlock2)); buf_set_u32(reg_params[9].value, 0, 32, 0x55555555); - retval = target->type->run_algorithm(target, 0, NULL, 10, reg_params, + retval = target_run_algorithm(target, 0, NULL, 10, reg_params, cfi_info->write_algorithm->address, - cfi_info->write_algorithm->address + ((24 * 4) - 4), + cfi_info->write_algorithm->address + ((target_code_size) - 4), 10000, &armv4_5_info); status = buf_get_u32(reg_params[5].value, 0, 32); if ((retval != ERROR_OK) || (retvaltemp != ERROR_OK) || status != 0x80) { - LOG_DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%" PRIx32 , status); exit_code = ERROR_FLASH_OPERATION_FAILED; break; } @@ -1518,7 +1533,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a count -= thisrun_count; } - target_free_working_area(target, source); + target_free_all_working_areas(target); destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); @@ -1534,21 +1549,21 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a return exit_code; } -static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t address) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct target *target = bank->target; + uint8_t command[8]; cfi_intel_clear_status_register(bank); cfi_command(bank, 0x40, command); - if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) { return retval; } @@ -1556,37 +1571,38 @@ static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); + LOG_ERROR("couldn't write word at base 0x%" PRIx32 ", address %" PRIx32 , bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; } -static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_t wordcount, uint32_t address) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct target *target = bank->target; + uint8_t command[8]; /* Calculate buffer size and boundary mask */ - u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); - u32 buffermask = buffersize-1; - u32 bufferwsize; + uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); + uint32_t buffermask = buffersize-1; + uint32_t bufferwsize; /* Check for valid range */ if (address & buffermask) { - LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); + LOG_ERROR("Write address at base 0x%" PRIx32 ", address %" PRIx32 " not aligned to 2^%d boundary", + bank->base, address, cfi_info->max_buf_write_size); return ERROR_FLASH_OPERATION_FAILED; } - switch(bank->chip_width) + switch (bank->chip_width) { case 4 : bufferwsize = buffersize / 4; break; case 2 : bufferwsize = buffersize / 2; break; @@ -1602,7 +1618,7 @@ static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordco /* Check for valid size */ if (wordcount > bufferwsize) { - LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize); + LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" PRId32 , wordcount, buffersize); return ERROR_FLASH_OPERATION_FAILED; } @@ -1611,82 +1627,82 @@ static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordco /* Initiate buffer operation _*/ cfi_command(bank, 0xE8, command); - if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address); + LOG_ERROR("couldn't start buffer write operation at base 0x%" PRIx32 ", address %" PRIx32 , bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } /* Write buffer wordcount-1 and data words */ cfi_command(bank, bufferwsize-1, command); - if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) { return retval; } /* Commit write operation */ cfi_command(bank, 0xd0, command); - if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address); + LOG_ERROR("Buffer write at base 0x%" PRIx32 ", address %" PRIx32 " failed.", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; } -static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint32_t address) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; + struct target *target = bank->target; + uint8_t command[8]; cfi_command(bank, 0xaa, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xa0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) { return retval; } @@ -1694,38 +1710,38 @@ static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 addr if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) { cfi_command(bank, 0xf0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); + LOG_ERROR("couldn't write word at base 0x%" PRIx32 ", address %" PRIx32 , bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; } -static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word, uint32_t wordcount, uint32_t address) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - target_t *target = bank->target; - u8 command[8]; - cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct target *target = bank->target; + uint8_t command[8]; + struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; /* Calculate buffer size and boundary mask */ - u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); - u32 buffermask = buffersize-1; - u32 bufferwsize; + uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); + uint32_t buffermask = buffersize-1; + uint32_t bufferwsize; /* Check for valid range */ if (address & buffermask) { - LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); + LOG_ERROR("Write address at base 0x%" PRIx32 ", address %" PRIx32 " not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); return ERROR_FLASH_OPERATION_FAILED; } - switch(bank->chip_width) + switch (bank->chip_width) { case 4 : bufferwsize = buffersize / 4; break; case 2 : bufferwsize = buffersize / 2; break; @@ -1740,45 +1756,45 @@ static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wor /* Check for valid size */ if (wordcount > bufferwsize) { - LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize); + LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" PRId32, wordcount, buffersize); return ERROR_FLASH_OPERATION_FAILED; } // Unlock cfi_command(bank, 0xaa, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } // Buffer load command cfi_command(bank, 0x25, command); - if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } /* Write buffer wordcount-1 and data words */ cfi_command(bank, bufferwsize-1, command); - if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) { return retval; } /* Commit write operation */ cfi_command(bank, 0x29, command); - if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -1786,23 +1802,23 @@ static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wor if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) { cfi_command(bank, 0xf0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't write block at base 0x%x, address %x, size %x", bank->base, address, bufferwsize); + LOG_ERROR("couldn't write block at base 0x%" PRIx32 ", address %" PRIx32 ", size %" PRIx32 , bank->base, address, bufferwsize); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; } -static int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_write_word(struct flash_bank *bank, uint8_t *word, uint32_t address) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; + struct cfi_flash_bank *cfi_info = bank->driver_priv; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -1819,11 +1835,11 @@ static int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) return ERROR_FLASH_OPERATION_FAILED; } -static int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_write_words(struct flash_bank *bank, uint8_t *word, uint32_t wordcount, uint32_t address) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; + struct cfi_flash_bank *cfi_info = bank->driver_priv; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -1840,15 +1856,15 @@ static int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u return ERROR_FLASH_OPERATION_FAILED; } -int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) +int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; - target_t *target = bank->target; - u32 address = bank->base + offset; /* address of first byte to be programmed */ - u32 write_p, copy_p; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct target *target = bank->target; + uint32_t address = bank->base + offset; /* address of first byte to be programmed */ + uint32_t write_p, copy_p; int align; /* number of unaligned bytes */ int blk_count; /* number of bus_width bytes for block copy */ - u8 current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */ + uint8_t current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */ int i; int retval; @@ -1868,7 +1884,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) write_p = address & ~(bank->bus_width - 1); if ((align = address - write_p) != 0) { - LOG_INFO("Fixup %d unaligned head bytes", align ); + LOG_INFO("Fixup %d unaligned head bytes", align); for (i = 0; i < bank->bus_width; i++) current_word[i] = 0; @@ -1877,8 +1893,8 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* copy bytes before the first write address */ for (i = 0; i < align; ++i, ++copy_p) { - u8 byte; - if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + uint8_t byte; + if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) { return retval; } @@ -1896,8 +1912,8 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* if the buffer is already finished, copy bytes after the last write address */ for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p) { - u8 byte; - if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + uint8_t byte; + if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) { return retval; } @@ -1912,7 +1928,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* handle blocks of bus_size aligned bytes */ blk_count = count & ~(bank->bus_width - 1); /* round down, leave tail bytes */ - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { /* try block writes (fails without working area) */ case 1: @@ -1939,11 +1955,11 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { //adjust buffersize for chip width - u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); - u32 buffermask = buffersize-1; - u32 bufferwsize; + uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); + uint32_t buffermask = buffersize-1; + uint32_t bufferwsize; - switch(bank->chip_width) + switch (bank->chip_width) { case 4 : bufferwsize = buffersize / 4; break; case 2 : bufferwsize = buffersize / 2; break; @@ -1956,12 +1972,12 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) bufferwsize/=(bank->bus_width / bank->chip_width); /* fall back to memory writes */ - while (count >= (u32)bank->bus_width) + while (count >= (uint32_t)bank->bus_width) { int fallback; if ((write_p & 0xff) == 0) { - LOG_INFO("Programming at %08x, count %08x bytes remaining", write_p, count); + LOG_INFO("Programming at %08" PRIx32 ", count %08" PRIx32 " bytes remaining", write_p, count); } fallback = 1; if ((bufferwsize > 0) && (count >= buffersize) && !(write_p & buffermask)) @@ -1972,7 +1988,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) buffer += buffersize; write_p += buffersize; count -= buffersize; - fallback=0; + fallback = 0; } } /* try the slow way? */ @@ -2001,12 +2017,12 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* return to read array mode, so we can read from flash again for padding */ cfi_command(bank, 0xf0, current_word); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, current_word); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) { return retval; } @@ -2014,7 +2030,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* handle unaligned tail bytes */ if (count > 0) { - LOG_INFO("Fixup %d unaligned tail bytes", count ); + LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count); copy_p = write_p; for (i = 0; i < bank->bus_width; i++) @@ -2027,8 +2043,8 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) } for (; i < bank->bus_width; ++i, ++copy_p) { - u8 byte; - if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + uint8_t byte; + if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) { return retval; } @@ -2041,28 +2057,28 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* return to read array mode */ cfi_command(bank, 0xf0, current_word); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, current_word); - return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); + return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); } -static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param) +static void cfi_fixup_atmel_reversed_erase_regions(struct flash_bank *bank, void *param) { (void) param; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; pri_ext->_reversed_geometry = 1; } -static void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) +static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, void *param) { int i; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; (void) param; if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3)) @@ -2072,7 +2088,7 @@ static void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) for (i = 0; i < cfi_info->num_erase_regions / 2; i++) { int j = (cfi_info->num_erase_regions - 1) - i; - u32 swap; + uint32_t swap; swap = cfi_info->erase_region_info[i]; cfi_info->erase_region_info[i] = cfi_info->erase_region_info[j]; @@ -2081,26 +2097,65 @@ static void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) } } -static void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param) +static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, void *param) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; - cfi_unlock_addresses_t *unlock_addresses = param; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; + struct cfi_unlock_addresses *unlock_addresses = param; pri_ext->_unlock1 = unlock_addresses->unlock1; pri_ext->_unlock2 = unlock_addresses->unlock2; } -static int cfi_probe(struct flash_bank_s *bank) + +static int cfi_query_string(struct flash_bank *bank, int address) +{ + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct target *target = bank->target; + int retval; + uint8_t command[8]; + + cfi_command(bank, 0x98, command); + if ((retval = target_write_memory(target, flash_address(bank, 0, address), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + + cfi_info->qry[0] = cfi_query_u8(bank, 0, 0x10); + cfi_info->qry[1] = cfi_query_u8(bank, 0, 0x11); + cfi_info->qry[2] = cfi_query_u8(bank, 0, 0x12); + + LOG_DEBUG("CFI qry returned: 0x%2.2x 0x%2.2x 0x%2.2x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2]); + + if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y')) + { + cfi_command(bank, 0xf0, command); + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + cfi_command(bank, 0xff, command); + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + { + return retval; + } + LOG_ERROR("Could not probe bank: no QRY"); + return ERROR_FLASH_BANK_INVALID; + } + + return ERROR_OK; +} + +static int cfi_probe(struct flash_bank *bank) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct target *target = bank->target; + uint8_t command[8]; int num_sectors = 0; int i; int sector = 0; - u32 unlock1 = 0x555; - u32 unlock2 = 0x2aa; + uint32_t unlock1 = 0x555; + uint32_t unlock2 = 0x2aa; int retval; if (bank->target->state != TARGET_HALTED) @@ -2122,29 +2177,29 @@ static int cfi_probe(struct flash_bank_s *bank) /* switch to read identifier codes mode ("AUTOSELECT") */ cfi_command(bank, 0xaa, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x90, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } if (bank->chip_width == 1) { - u8 manufacturer, device_id; - if((retval = target_read_u8(target, bank->base + 0x0, &manufacturer)) != ERROR_OK) + uint8_t manufacturer, device_id; + if ((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK) { return retval; } - if((retval = target_read_u8(target, bank->base + 0x1, &device_id)) != ERROR_OK) + if ((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK) { return retval; } @@ -2153,11 +2208,11 @@ static int cfi_probe(struct flash_bank_s *bank) } else if (bank->chip_width == 2) { - if((retval = target_read_u16(target, bank->base + 0x0, &cfi_info->manufacturer)) != ERROR_OK) + if ((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK) { return retval; } - if((retval = target_read_u16(target, bank->base + 0x2, &cfi_info->device_id)) != ERROR_OK) + if ((retval = target_read_u16(target, flash_address(bank, 0, 0x01), &cfi_info->device_id)) != ERROR_OK) { return retval; } @@ -2166,12 +2221,12 @@ static int cfi_probe(struct flash_bank_s *bank) LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", cfi_info->manufacturer, cfi_info->device_id); /* switch back to read array mode */ cfi_command(bank, 0xf0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -2184,6 +2239,8 @@ static int cfi_probe(struct flash_bank_s *bank) */ if (cfi_info->not_cfi == 0) { + int retval; + /* enter CFI query mode * according to JEDEC Standard No. 68.01, * a single bus sequence with address = 0x55, data = 0x98 should put @@ -2191,33 +2248,21 @@ static int cfi_probe(struct flash_bank_s *bank) * * SST flashes clearly violate this, and we will consider them incompatbile for now */ - cfi_command(bank, 0x98, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) - { - return retval; - } - cfi_info->qry[0] = cfi_query_u8(bank, 0, 0x10); - cfi_info->qry[1] = cfi_query_u8(bank, 0, 0x11); - cfi_info->qry[2] = cfi_query_u8(bank, 0, 0x12); - - LOG_DEBUG("CFI qry returned: 0x%2.2x 0x%2.2x 0x%2.2x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2]); - - if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y')) + retval = cfi_query_string(bank, 0x55); + if (retval != ERROR_OK) { - cfi_command(bank, 0xf0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) - { - return retval; - } - cfi_command(bank, 0xff, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) - { - return retval; - } - LOG_ERROR("Could not probe bank: no QRY"); - return ERROR_FLASH_BANK_INVALID; + /* + * Spansion S29WS-N CFI query fix is to try 0x555 if 0x55 fails. Should + * be harmless enough: + * + * http://www.infradead.org/pipermail/linux-mtd/2005-September/013618.html + */ + LOG_USER("Try workaround w/0x555 instead of 0x55 to get QRY."); + retval = cfi_query_string(bank, 0x555); } + if (retval != ERROR_OK) + return retval; cfi_info->pri_id = cfi_query_u16(bank, 0, 0x13); cfi_info->pri_addr = cfi_query_u16(bank, 0, 0x15); @@ -2251,12 +2296,12 @@ static int cfi_probe(struct flash_bank_s *bank) (1 << cfi_info->block_erase_timeout_max) * (1 << cfi_info->block_erase_timeout_typ), (1 << cfi_info->chip_erase_timeout_max) * (1 << cfi_info->chip_erase_timeout_typ)); - cfi_info->dev_size = 1<dev_size = 1 << cfi_query_u8(bank, 0, 0x27); cfi_info->interface_desc = cfi_query_u16(bank, 0, 0x28); cfi_info->max_buf_write_size = cfi_query_u16(bank, 0, 0x2a); cfi_info->num_erase_regions = cfi_query_u8(bank, 0, 0x2c); - LOG_DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size)); + LOG_DEBUG("size: 0x%" PRIx32 ", interface desc: %i, max buffer write size: %x", cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size)); if (cfi_info->num_erase_regions) { @@ -2264,7 +2309,10 @@ static int cfi_probe(struct flash_bank_s *bank) for (i = 0; i < cfi_info->num_erase_regions; i++) { cfi_info->erase_region_info[i] = cfi_query_u32(bank, 0, 0x2d + (4 * i)); - LOG_DEBUG("erase region[%i]: %i blocks of size 0x%x", i, (cfi_info->erase_region_info[i] & 0xffff) + 1, (cfi_info->erase_region_info[i] >> 16) * 256); + LOG_DEBUG("erase region[%i]: %" PRIu32 " blocks of size 0x%" PRIx32 "", + i, + (cfi_info->erase_region_info[i] & 0xffff) + 1, + (cfi_info->erase_region_info[i] >> 16) * 256); } } else @@ -2275,7 +2323,7 @@ static int cfi_probe(struct flash_bank_s *bank) /* We need to read the primary algorithm extended query table before calculating * the sector layout to be able to apply fixups */ - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { /* Intel command set (standard and extended) */ case 0x0001: @@ -2296,19 +2344,19 @@ static int cfi_probe(struct flash_bank_s *bank) * we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command */ cfi_command(bank, 0xf0, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } } /* end CFI case */ /* apply fixups depending on the primary command set */ - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { /* Intel command set (standard and extended) */ case 0x0001: @@ -2326,14 +2374,14 @@ static int cfi_probe(struct flash_bank_s *bank) if ((cfi_info->dev_size * bank->bus_width / bank->chip_width) != bank->size) { - LOG_WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, cfi_info->dev_size); + LOG_WARNING("configuration specifies 0x%" PRIx32 " size, but a 0x%" PRIx32 " size flash was found", bank->size, cfi_info->dev_size); } if (cfi_info->num_erase_regions == 0) { /* a device might have only one erase block, spanning the whole device */ bank->num_sectors = 1; - bank->sectors = malloc(sizeof(flash_sector_t)); + bank->sectors = malloc(sizeof(struct flash_sector)); bank->sectors[sector].offset = 0x0; bank->sectors[sector].size = bank->size; @@ -2342,7 +2390,7 @@ static int cfi_probe(struct flash_bank_s *bank) } else { - u32 offset = 0; + uint32_t offset = 0; for (i = 0; i < cfi_info->num_erase_regions; i++) { @@ -2350,11 +2398,11 @@ static int cfi_probe(struct flash_bank_s *bank) } bank->num_sectors = num_sectors; - bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors); + bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors); for (i = 0; i < cfi_info->num_erase_regions; i++) { - u32 j; + uint32_t j; for (j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++) { bank->sectors[sector].offset = offset; @@ -2365,9 +2413,10 @@ static int cfi_probe(struct flash_bank_s *bank) sector++; } } - if (offset != cfi_info->dev_size) + if (offset != (cfi_info->dev_size * bank->bus_width / bank->chip_width)) { - LOG_WARNING("CFI size is 0x%x, but total sector size is 0x%x", cfi_info->dev_size, offset); + LOG_WARNING("CFI size is 0x%" PRIx32 ", but total sector size is 0x%" PRIx32 "", \ + (cfi_info->dev_size * bank->bus_width / bank->chip_width), offset); } } @@ -2376,22 +2425,22 @@ static int cfi_probe(struct flash_bank_s *bank) return ERROR_OK; } -static int cfi_auto_probe(struct flash_bank_s *bank) +static int cfi_auto_probe(struct flash_bank *bank) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; + struct cfi_flash_bank *cfi_info = bank->driver_priv; if (cfi_info->probed) return ERROR_OK; return cfi_probe(bank); } -static int cfi_intel_protect_check(struct flash_bank_s *bank) +static int cfi_intel_protect_check(struct flash_bank *bank) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext; - target_t *target = bank->target; - u8 command[CFI_MAX_BUS_WIDTH]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext; + struct target *target = bank->target; + uint8_t command[CFI_MAX_BUS_WIDTH]; int i; /* check if block lock bits are supported on this device */ @@ -2399,14 +2448,14 @@ static int cfi_intel_protect_check(struct flash_bank_s *bank) return ERROR_FLASH_OPERATION_FAILED; cfi_command(bank, 0x90, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } for (i = 0; i < bank->num_sectors; i++) { - u8 block_status = cfi_get_u8(bank, i, 0x2); + uint8_t block_status = cfi_get_u8(bank, i, 0x2); if (block_status & 1) bank->sectors[i].is_protected = 1; @@ -2415,39 +2464,39 @@ static int cfi_intel_protect_check(struct flash_bank_s *bank) } cfi_command(bank, 0xff, command); - return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -static int cfi_spansion_protect_check(struct flash_bank_s *bank) +static int cfi_spansion_protect_check(struct flash_bank *bank) { int retval; - cfi_flash_bank_t *cfi_info = bank->driver_priv; - cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; - target_t *target = bank->target; - u8 command[8]; + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; + struct target *target = bank->target; + uint8_t command[8]; int i; cfi_command(bank, 0xaa, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x90, command); - if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } for (i = 0; i < bank->num_sectors; i++) { - u8 block_status = cfi_get_u8(bank, i, 0x2); + uint8_t block_status = cfi_get_u8(bank, i, 0x2); if (block_status & 1) bank->sectors[i].is_protected = 1; @@ -2456,12 +2505,12 @@ static int cfi_spansion_protect_check(struct flash_bank_s *bank) } cfi_command(bank, 0xf0, command); - return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -static int cfi_protect_check(struct flash_bank_s *bank) +static int cfi_protect_check(struct flash_bank *bank) { - cfi_flash_bank_t *cfi_info = bank->driver_priv; + struct cfi_flash_bank *cfi_info = bank->driver_priv; if (bank->target->state != TARGET_HALTED) { @@ -2472,7 +2521,7 @@ static int cfi_protect_check(struct flash_bank_s *bank) if (cfi_info->qry[0] != 'Q') return ERROR_FLASH_BANK_NOT_PROBED; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -2489,10 +2538,10 @@ static int cfi_protect_check(struct flash_bank_s *bank) return ERROR_OK; } -static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int cfi_info(struct flash_bank *bank, char *buf, int buf_size) { int printed; - cfi_flash_bank_t *cfi_info = bank->driver_priv; + struct cfi_flash_bank *cfi_info = bank->driver_priv; if (cfi_info->qry[0] == (char)-1) { @@ -2542,14 +2591,14 @@ static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, "size: 0x%x, interface desc: %i, max buffer write size: %x\n", + printed = snprintf(buf, buf_size, "size: 0x%" PRIx32 ", interface desc: %i, max buffer write size: %x\n", cfi_info->dev_size, cfi_info->interface_desc, 1 << cfi_info->max_buf_write_size); buf += printed; buf_size -= printed; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -2566,3 +2615,16 @@ static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) return ERROR_OK; } + +struct flash_driver cfi_flash = { + .name = "cfi", + .flash_bank_command = &cfi_flash_bank_command, + .erase = &cfi_erase, + .protect = &cfi_protect, + .write = &cfi_write, + .probe = &cfi_probe, + .auto_probe = &cfi_auto_probe, + .erase_check = &default_flash_blank_check, + .protect_check = &cfi_protect_check, + .info = &cfi_info, + };