X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fcfi.c;h=60d1834da199b0153c0e6b308a0e7b1c46c13555;hp=ba6c7a8079431062a3219dc013624961058a8df6;hb=8959de9f679cfd0436d731fd91b88a68b9a75fa6;hpb=95e13054cafeeb13163d85822e4202e12007e1a7 diff --git a/src/flash/cfi.c b/src/flash/cfi.c index ba6c7a8079..60d1834da1 100644 --- a/src/flash/cfi.c +++ b/src/flash/cfi.c @@ -33,7 +33,7 @@ static int cfi_register_commands(struct command_context_s *cmd_ctx); static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); static int cfi_erase(struct flash_bank_s *bank, int first, int last); static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last); -static int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); +static int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count); static int cfi_probe(struct flash_bank_s *bank); static int cfi_auto_probe(struct flash_bank_s *bank); static int cfi_protect_check(struct flash_bank_s *bank); @@ -109,12 +109,12 @@ static void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups) } } -/* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */ -static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset) +/* inline uint32_t flash_address(flash_bank_t *bank, int sector, uint32_t offset) */ +static __inline__ uint32_t flash_address(flash_bank_t *bank, int sector, uint32_t offset) { cfi_flash_bank_t *cfi_info = bank->driver_priv; - if(cfi_info->x16_as_x8) offset*=2; + if (cfi_info->x16_as_x8) offset *= 2; /* while the sector list isn't built, only accesses to sector 0 work */ if (sector == 0) @@ -131,7 +131,7 @@ static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset) } -static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) +static void cfi_command(flash_bank_t *bank, uint8_t cmd, uint8_t *cmd_buf) { int i; @@ -161,10 +161,10 @@ static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) * flash banks are expected to be made of similar chips * the query result should be the same for all */ -static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) +static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, uint32_t offset) { target_t *target = bank->target; - u8 data[CFI_MAX_BUS_WIDTH]; + uint8_t data[CFI_MAX_BUS_WIDTH]; target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); @@ -178,10 +178,10 @@ static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset) * in case of a bank made of multiple chips, * the individual values are ORed */ -static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) +static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, uint32_t offset) { target_t *target = bank->target; - u8 data[CFI_MAX_BUS_WIDTH]; + uint8_t data[CFI_MAX_BUS_WIDTH]; int i; target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 1, data); @@ -195,7 +195,7 @@ static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) } else { - u8 value = 0; + uint8_t value = 0; for (i = 0; i < bank->bus_width / bank->chip_width; i++) value |= data[bank->bus_width - 1 - i]; @@ -203,17 +203,17 @@ static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset) } } -static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) +static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, uint32_t offset) { target_t *target = bank->target; cfi_flash_bank_t *cfi_info = bank->driver_priv; - u8 data[CFI_MAX_BUS_WIDTH * 2]; + uint8_t data[CFI_MAX_BUS_WIDTH * 2]; - if(cfi_info->x16_as_x8) + if (cfi_info->x16_as_x8) { - u8 i; - for(i=0;i<2;i++) - target_read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1, + uint8_t i; + for (i = 0;i<2;i++) + target_read_memory(target, flash_address(bank, sector, offset + i), bank->bus_width, 1, &data[i*bank->bus_width] ); } else @@ -225,17 +225,17 @@ static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset) return data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8; } -static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) +static uint32_t cfi_query_u32(flash_bank_t *bank, int sector, uint32_t offset) { target_t *target = bank->target; cfi_flash_bank_t *cfi_info = bank->driver_priv; - u8 data[CFI_MAX_BUS_WIDTH * 4]; + uint8_t data[CFI_MAX_BUS_WIDTH * 4]; - if(cfi_info->x16_as_x8) + if (cfi_info->x16_as_x8) { - u8 i; - for(i=0;i<4;i++) - target_read_memory(target, flash_address(bank, sector, offset+i), bank->bus_width, 1, + uint8_t i; + for (i = 0;i<4;i++) + target_read_memory(target, flash_address(bank, sector, offset + i), bank->bus_width, 1, &data[i*bank->bus_width] ); } else @@ -251,7 +251,7 @@ static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset) static void cfi_intel_clear_status_register(flash_bank_t *bank) { target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; if (target->state != TARGET_HALTED) { @@ -263,9 +263,9 @@ static void cfi_intel_clear_status_register(flash_bank_t *bank) target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); } -u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout) +uint8_t cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout) { - u8 status; + uint8_t status; while ((!((status = cfi_get_u8(bank, 0, 0x0)) & 0x80)) && (timeout-- > 0)) { @@ -306,7 +306,7 @@ u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout) int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) { - u8 status, oldstatus; + uint8_t status, oldstatus; cfi_flash_bank_t *cfi_info = bank->driver_priv; oldstatus = cfi_get_u8(bank, 0, 0x0); @@ -345,7 +345,7 @@ static int cfi_read_intel_pri_ext(flash_bank_t *bank) cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_intel_pri_ext_t *pri_ext = malloc(sizeof(cfi_intel_pri_ext_t)); target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; cfi_info->pri_ext = pri_ext; @@ -356,12 +356,12 @@ static int cfi_read_intel_pri_ext(flash_bank_t *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -378,7 +378,10 @@ static int cfi_read_intel_pri_ext(flash_bank_t *bank) pri_ext->suspend_cmd_support = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9); pri_ext->blk_status_reg_mask = cfi_query_u16(bank, 0, cfi_info->pri_addr + 0xa); - LOG_DEBUG("feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask); + LOG_DEBUG("feature_support: 0x%" PRIx32 ", suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x", + pri_ext->feature_support, + pri_ext->suspend_cmd_support, + pri_ext->blk_status_reg_mask); pri_ext->vcc_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xc); pri_ext->vpp_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xd); @@ -408,7 +411,7 @@ static int cfi_read_spansion_pri_ext(flash_bank_t *bank) cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t)); target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; cfi_info->pri_ext = pri_ext; @@ -419,7 +422,7 @@ static int cfi_read_spansion_pri_ext(flash_bank_t *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -474,7 +477,7 @@ static int cfi_read_atmel_pri_ext(flash_bank_t *bank) cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t)); target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; /* ATMEL devices use the same CFI primary command set (0x2) as AMD/Spansion, * but a different primary extended query table. @@ -492,7 +495,7 @@ static int cfi_read_atmel_pri_ext(flash_bank_t *bank) if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R') || (atmel_pri_ext.pri[2] != 'I')) { cfi_command(bank, 0xf0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -597,7 +600,7 @@ static int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, "feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x\n", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask); + printed = snprintf(buf, buf_size, "feature_support: 0x%" PRIx32 ", suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x\n", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask); buf += printed; buf_size -= printed; @@ -680,7 +683,7 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; int i; cfi_intel_clear_status_register(bank); @@ -688,13 +691,13 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) for (i = first; i <= last; i++) { cfi_command(bank, 0x20, command); - if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xd0, command); - if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -704,12 +707,12 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) else { cfi_command(bank, 0xff, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); + LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" PRIx32 , i, bank->base); return ERROR_FLASH_OPERATION_FAILED; } } @@ -725,43 +728,43 @@ static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; int i; for (i = first; i <= last; i++) { cfi_command(bank, 0xaa, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x80, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xaa, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x30, command); - if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -771,12 +774,12 @@ static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) else { cfi_command(bank, 0xf0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); + LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" PRIx32, i, bank->base); return ERROR_FLASH_OPERATION_FAILED; } } @@ -803,7 +806,7 @@ static int cfi_erase(struct flash_bank_s *bank, int first, int last) if (cfi_info->qry[0] != 'Q') return ERROR_FLASH_BANK_NOT_PROBED; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -826,7 +829,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; int retry = 0; int i; @@ -841,16 +844,16 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int for (i = first; i <= last; i++) { cfi_command(bank, 0x60, command); - LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } if (set) { cfi_command(bank, 0x01, command); - LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32 , flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -859,8 +862,8 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int else { cfi_command(bank, 0xd0, command); - LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -875,10 +878,10 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int } else { - u8 block_status; + uint8_t block_status; /* read block lock bit, to verify status */ cfi_command(bank, 0x90, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -888,7 +891,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int { LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status); cfi_command(bank, 0x70, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -917,13 +920,13 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int cfi_intel_clear_status_register(bank); cfi_command(bank, 0x60, command); - if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x01, command); - if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -955,7 +958,7 @@ static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) if (cfi_info->qry[0] != 'Q') return ERROR_FLASH_BANK_NOT_PROBED; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -970,7 +973,7 @@ static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) } /* FIXME Replace this by a simple memcpy() - still unsure about sideeffects */ -static void cfi_add_byte(struct flash_bank_s *bank, u8 *word, u8 byte) +static void cfi_add_byte(struct flash_bank_s *bank, uint8_t *word, uint8_t byte) { /* target_t *target = bank->target; */ @@ -979,8 +982,8 @@ static void cfi_add_byte(struct flash_bank_s *bank, u8 *word, u8 byte) /* NOTE: * The data to flash must not be changed in endian! We write a bytestrem in * target byte order already. Only the control and status byte lane of the flash - * WSM is interpreted by the CPU in different ways, when read a u16 or u32 - * word (data seems to be in the upper or lower byte lane for u16 accesses). + * WSM is interpreted by the CPU in different ways, when read a uint16_t or uint32_t + * word (data seems to be in the upper or lower byte lane for uint16_t accesses). */ #if 0 @@ -1005,22 +1008,22 @@ static void cfi_add_byte(struct flash_bank_s *bank, u8 *word, u8 byte) /* Convert code image to target endian */ /* FIXME create general block conversion fcts in target.c?) */ -static void cfi_fix_code_endian(target_t *target, u8 *dest, const u32 *src, u32 count) +static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const uint32_t *src, uint32_t count) { - u32 i; - for (i=0; i< count; i++) + uint32_t i; + for (i = 0; i< count; i++) { target_buffer_set_u32(target, dest, *src); - dest+=4; + dest += 4; src++; } } -static u32 cfi_command_val(flash_bank_t *bank, u8 cmd) +static uint32_t cfi_command_val(flash_bank_t *bank, uint8_t cmd) { target_t *target = bank->target; - u8 buf[CFI_MAX_BUS_WIDTH]; + uint8_t buf[CFI_MAX_BUS_WIDTH]; cfi_command(bank, cmd, buf); switch (bank->bus_width) { @@ -1039,15 +1042,15 @@ static u32 cfi_command_val(flash_bank_t *bank, u8 cmd) } } -static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) +static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t address, uint32_t count) { cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; reg_param_t reg_params[7]; armv4_5_algorithm_t armv4_5_info; working_area_t *source; - u32 buffer_size = 32768; - u32 write_command_val, busy_pattern_val, error_pattern_val; + uint32_t buffer_size = 32768; + uint32_t write_command_val, busy_pattern_val, error_pattern_val; /* algorithm register usage: * r0: source address (in RAM) @@ -1059,7 +1062,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr * r6: error test pattern */ - static const u32 word_32_code[] = { + static const uint32_t word_32_code[] = { 0xe4904004, /* loop: ldr r4, [r0], #4 */ 0xe5813000, /* str r3, [r1] */ 0xe5814000, /* str r4, [r1] */ @@ -1076,7 +1079,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr 0xeafffffe /* done: b -2 */ }; - static const u32 word_16_code[] = { + static const uint32_t word_16_code[] = { 0xe0d040b2, /* loop: ldrh r4, [r0], #2 */ 0xe1c130b0, /* strh r3, [r1] */ 0xe1c140b0, /* strh r4, [r1] */ @@ -1093,7 +1096,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr 0xeafffffe /* done: b -2 */ }; - static const u32 word_8_code[] = { + static const uint32_t word_8_code[] = { 0xe4d04001, /* loop: ldrb r4, [r0], #1 */ 0xe5c13000, /* strb r3, [r1] */ 0xe5c14000, /* strb r4, [r1] */ @@ -1109,9 +1112,9 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr 0xeafffff2, /* b loop */ 0xeafffffe /* done: b -2 */ }; - u8 target_code[4*CFI_MAX_INTEL_CODESIZE]; - const u32 *target_code_src; - u32 target_code_size; + uint8_t target_code[4*CFI_MAX_INTEL_CODESIZE]; + const uint32_t *target_code_src; + uint32_t target_code_size; int retval = ERROR_OK; @@ -1203,15 +1206,15 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr busy_pattern_val = cfi_command_val(bank, 0x80); error_pattern_val = cfi_command_val(bank, 0x7e); - LOG_INFO("Using target buffer at 0x%08x and of size 0x%04x", source->address, buffer_size ); + LOG_INFO("Using target buffer at 0x%08" PRIx32 " and of size 0x%04" PRIx32, source->address, buffer_size ); /* Programming main loop */ while (count > 0) { - u32 thisrun_count = (count > buffer_size) ? buffer_size : count; - u32 wsm_error; + uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count; + uint32_t wsm_error; - if((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK) + if ((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK) { goto cleanup; } @@ -1224,12 +1227,12 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 addr buf_set_u32(reg_params[5].value, 0, 32, busy_pattern_val); buf_set_u32(reg_params[6].value, 0, 32, error_pattern_val); - LOG_INFO("Write 0x%04x bytes to flash at 0x%08x", thisrun_count, address ); + LOG_INFO("Write 0x%04" PRIx32 " bytes to flash at 0x%08" PRIx32 , thisrun_count, address ); /* Execute algorithm, assume breakpoint for last instruction */ - retval = target->type->run_algorithm(target, 0, NULL, 7, reg_params, + retval = target_run_algorithm(target, 0, NULL, 7, reg_params, cfi_info->write_algorithm->address, - cfi_info->write_algorithm->address + target_code_size - sizeof(u32), + cfi_info->write_algorithm->address + target_code_size - sizeof(uint32_t), 10000, /* 10s should be enough for max. 32k of data */ &armv4_5_info); @@ -1283,7 +1286,7 @@ cleanup: return retval; } -static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count) +static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t address, uint32_t count) { cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; @@ -1291,8 +1294,8 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a reg_param_t reg_params[10]; armv4_5_algorithm_t armv4_5_info; working_area_t *source; - u32 buffer_size = 32768; - u32 status; + uint32_t buffer_size = 32768; + uint32_t status; int retval, retvaltemp; int exit_code = ERROR_OK; @@ -1313,7 +1316,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a /* R10 = unlock2_addr */ /* R11 = unlock2_cmd */ - static const u32 word_32_code[] = { + static const uint32_t word_32_code[] = { /* 00008100 : */ 0xe4905004, /* ldr r5, [r0], #4 */ 0xe5889000, /* str r9, [r8] */ @@ -1347,7 +1350,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a 0xeafffffe /* b 8154 */ }; - static const u32 word_16_code[] = { + static const uint32_t word_16_code[] = { /* 00008158 : */ 0xe0d050b2, /* ldrh r5, [r0], #2 */ 0xe1c890b0, /* strh r9, [r8] */ @@ -1381,7 +1384,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a 0xeafffffe /* b 81ac */ }; - static const u32 word_8_code[] = { + static const uint32_t word_8_code[] = { /* 000081b0 : */ 0xe4d05001, /* ldrb r5, [r0], #1 */ 0xe5c89000, /* strb r9, [r8] */ @@ -1422,9 +1425,9 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a /* flash write code */ if (!cfi_info->write_algorithm) { - u8 *target_code; + uint8_t *target_code; int target_code_size; - const u32 *src; + const uint32_t *src; /* convert bus-width dependent algorithm code to correct endiannes */ switch (bank->bus_width) @@ -1449,7 +1452,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a cfi_fix_code_endian(target, target_code, src, target_code_size / 4); /* allocate working area */ - retval=target_alloc_working_area(target, target_code_size, + retval = target_alloc_working_area(target, target_code_size, &cfi_info->write_algorithm); if (retval != ERROR_OK) { @@ -1458,7 +1461,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a } /* write algorithm code to working area */ - if((retval = target_write_buffer(target, cfi_info->write_algorithm->address, + if ((retval = target_write_buffer(target, cfi_info->write_algorithm->address, target_code_size, target_code)) != ERROR_OK) { free(target_code); @@ -1496,7 +1499,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a while (count > 0) { - u32 thisrun_count = (count > buffer_size) ? buffer_size : count; + uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count; retvaltemp = target_write_buffer(target, source->address, thisrun_count, buffer); @@ -1510,7 +1513,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a buf_set_u32(reg_params[8].value, 0, 32, flash_address(bank, 0, pri_ext->_unlock2)); buf_set_u32(reg_params[9].value, 0, 32, 0x55555555); - retval = target->type->run_algorithm(target, 0, NULL, 10, reg_params, + retval = target_run_algorithm(target, 0, NULL, 10, reg_params, cfi_info->write_algorithm->address, cfi_info->write_algorithm->address + ((24 * 4) - 4), 10000, &armv4_5_info); @@ -1519,7 +1522,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a if ((retval != ERROR_OK) || (retvaltemp != ERROR_OK) || status != 0x80) { - LOG_DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%" PRIx32 , status); exit_code = ERROR_FLASH_OPERATION_FAILED; break; } @@ -1545,21 +1548,21 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 a return exit_code; } -static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_intel_write_word(struct flash_bank_s *bank, uint8_t *word, uint32_t address) { int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; cfi_intel_clear_status_register(bank); cfi_command(bank, 0x40, command); - if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - if((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) { return retval; } @@ -1567,37 +1570,38 @@ static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); + LOG_ERROR("couldn't write word at base 0x%" PRIx32 ", address %" PRIx32 , bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; } -static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_intel_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wordcount, uint32_t address) { int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; /* Calculate buffer size and boundary mask */ - u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); - u32 buffermask = buffersize-1; - u32 bufferwsize; + uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); + uint32_t buffermask = buffersize-1; + uint32_t bufferwsize; /* Check for valid range */ if (address & buffermask) { - LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); + LOG_ERROR("Write address at base 0x%" PRIx32 ", address %" PRIx32 " not aligned to 2^%d boundary", + bank->base, address, cfi_info->max_buf_write_size); return ERROR_FLASH_OPERATION_FAILED; } - switch(bank->chip_width) + switch (bank->chip_width) { case 4 : bufferwsize = buffersize / 4; break; case 2 : bufferwsize = buffersize / 2; break; @@ -1613,7 +1617,7 @@ static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordco /* Check for valid size */ if (wordcount > bufferwsize) { - LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize); + LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" PRId32 , wordcount, buffersize); return ERROR_FLASH_OPERATION_FAILED; } @@ -1622,82 +1626,82 @@ static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordco /* Initiate buffer operation _*/ cfi_command(bank, 0xE8, command); - if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address); + LOG_ERROR("couldn't start buffer write operation at base 0x%" PRIx32 ", address %" PRIx32 , bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } /* Write buffer wordcount-1 and data words */ cfi_command(bank, bufferwsize-1, command); - if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - if((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) { return retval; } /* Commit write operation */ cfi_command(bank, 0xd0, command); - if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { cfi_command(bank, 0xff, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address); + LOG_ERROR("Buffer write at base 0x%" PRIx32 ", address %" PRIx32 " failed.", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; } -static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_spansion_write_word(struct flash_bank_s *bank, uint8_t *word, uint32_t address) { int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; cfi_command(bank, 0xaa, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xa0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - if((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK) { return retval; } @@ -1705,38 +1709,38 @@ static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 addr if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) { cfi_command(bank, 0xf0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); + LOG_ERROR("couldn't write word at base 0x%" PRIx32 ", address %" PRIx32 , bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; } -static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_spansion_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wordcount, uint32_t address) { int retval; cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; /* Calculate buffer size and boundary mask */ - u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); - u32 buffermask = buffersize-1; - u32 bufferwsize; + uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); + uint32_t buffermask = buffersize-1; + uint32_t bufferwsize; /* Check for valid range */ if (address & buffermask) { - LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); + LOG_ERROR("Write address at base 0x%" PRIx32 ", address %" PRIx32 " not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); return ERROR_FLASH_OPERATION_FAILED; } - switch(bank->chip_width) + switch (bank->chip_width) { case 4 : bufferwsize = buffersize / 4; break; case 2 : bufferwsize = buffersize / 2; break; @@ -1751,45 +1755,45 @@ static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wor /* Check for valid size */ if (wordcount > bufferwsize) { - LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize); + LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" PRId32, wordcount, buffersize); return ERROR_FLASH_OPERATION_FAILED; } // Unlock cfi_command(bank, 0xaa, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } // Buffer load command cfi_command(bank, 0x25, command); - if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } /* Write buffer wordcount-1 and data words */ cfi_command(bank, bufferwsize-1, command); - if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - if((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK) { return retval; } /* Commit write operation */ cfi_command(bank, 0x29, command); - if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -1797,23 +1801,23 @@ static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wor if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) { cfi_command(bank, 0xf0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } - LOG_ERROR("couldn't write block at base 0x%x, address %x, size %x", bank->base, address, bufferwsize); + LOG_ERROR("couldn't write block at base 0x%" PRIx32 ", address %" PRIx32 ", size %" PRIx32 , bank->base, address, bufferwsize); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; } -static int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) +static int cfi_write_word(struct flash_bank_s *bank, uint8_t *word, uint32_t address) { cfi_flash_bank_t *cfi_info = bank->driver_priv; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -1830,11 +1834,11 @@ static int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) return ERROR_FLASH_OPERATION_FAILED; } -static int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address) +static int cfi_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wordcount, uint32_t address) { cfi_flash_bank_t *cfi_info = bank->driver_priv; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -1851,15 +1855,15 @@ static int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u return ERROR_FLASH_OPERATION_FAILED; } -int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) +int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count) { cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; - u32 address = bank->base + offset; /* address of first byte to be programmed */ - u32 write_p, copy_p; + uint32_t address = bank->base + offset; /* address of first byte to be programmed */ + uint32_t write_p, copy_p; int align; /* number of unaligned bytes */ int blk_count; /* number of bus_width bytes for block copy */ - u8 current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */ + uint8_t current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */ int i; int retval; @@ -1888,8 +1892,8 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* copy bytes before the first write address */ for (i = 0; i < align; ++i, ++copy_p) { - u8 byte; - if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + uint8_t byte; + if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) { return retval; } @@ -1907,8 +1911,8 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* if the buffer is already finished, copy bytes after the last write address */ for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p) { - u8 byte; - if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + uint8_t byte; + if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) { return retval; } @@ -1923,7 +1927,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* handle blocks of bus_size aligned bytes */ blk_count = count & ~(bank->bus_width - 1); /* round down, leave tail bytes */ - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { /* try block writes (fails without working area) */ case 1: @@ -1950,11 +1954,11 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { //adjust buffersize for chip width - u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); - u32 buffermask = buffersize-1; - u32 bufferwsize; + uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); + uint32_t buffermask = buffersize-1; + uint32_t bufferwsize; - switch(bank->chip_width) + switch (bank->chip_width) { case 4 : bufferwsize = buffersize / 4; break; case 2 : bufferwsize = buffersize / 2; break; @@ -1967,12 +1971,12 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) bufferwsize/=(bank->bus_width / bank->chip_width); /* fall back to memory writes */ - while (count >= (u32)bank->bus_width) + while (count >= (uint32_t)bank->bus_width) { int fallback; if ((write_p & 0xff) == 0) { - LOG_INFO("Programming at %08x, count %08x bytes remaining", write_p, count); + LOG_INFO("Programming at %08" PRIx32 ", count %08" PRIx32 " bytes remaining", write_p, count); } fallback = 1; if ((bufferwsize > 0) && (count >= buffersize) && !(write_p & buffermask)) @@ -1983,7 +1987,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) buffer += buffersize; write_p += buffersize; count -= buffersize; - fallback=0; + fallback = 0; } } /* try the slow way? */ @@ -2012,12 +2016,12 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* return to read array mode, so we can read from flash again for padding */ cfi_command(bank, 0xf0, current_word); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, current_word); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) { return retval; } @@ -2025,7 +2029,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* handle unaligned tail bytes */ if (count > 0) { - LOG_INFO("Fixup %d unaligned tail bytes", count ); + LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count ); copy_p = write_p; for (i = 0; i < bank->bus_width; i++) @@ -2038,8 +2042,8 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) } for (; i < bank->bus_width; ++i, ++copy_p) { - u8 byte; - if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) + uint8_t byte; + if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) { return retval; } @@ -2052,7 +2056,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* return to read array mode */ cfi_command(bank, 0xf0, current_word); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) { return retval; } @@ -2083,7 +2087,7 @@ static void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) for (i = 0; i < cfi_info->num_erase_regions / 2; i++) { int j = (cfi_info->num_erase_regions - 1) - i; - u32 swap; + uint32_t swap; swap = cfi_info->erase_region_info[i]; cfi_info->erase_region_info[i] = cfi_info->erase_region_info[j]; @@ -2106,12 +2110,12 @@ static int cfi_probe(struct flash_bank_s *bank) { cfi_flash_bank_t *cfi_info = bank->driver_priv; target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; int num_sectors = 0; int i; int sector = 0; - u32 unlock1 = 0x555; - u32 unlock2 = 0x2aa; + uint32_t unlock1 = 0x555; + uint32_t unlock2 = 0x2aa; int retval; if (bank->target->state != TARGET_HALTED) @@ -2133,29 +2137,29 @@ static int cfi_probe(struct flash_bank_s *bank) /* switch to read identifier codes mode ("AUTOSELECT") */ cfi_command(bank, 0xaa, command); - if((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target_write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x90, command); - if((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } if (bank->chip_width == 1) { - u8 manufacturer, device_id; - if((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK) + uint8_t manufacturer, device_id; + if ((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK) { return retval; } - if((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK) + if ((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK) { return retval; } @@ -2164,11 +2168,11 @@ static int cfi_probe(struct flash_bank_s *bank) } else if (bank->chip_width == 2) { - if((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK) + if ((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK) { return retval; } - if((retval = target_read_u16(target, flash_address(bank, 0, 0x02), &cfi_info->device_id)) != ERROR_OK) + if ((retval = target_read_u16(target, flash_address(bank, 0, 0x02), &cfi_info->device_id)) != ERROR_OK) { return retval; } @@ -2177,12 +2181,12 @@ static int cfi_probe(struct flash_bank_s *bank) LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", cfi_info->manufacturer, cfi_info->device_id); /* switch back to read array mode */ cfi_command(bank, 0xf0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -2203,7 +2207,7 @@ static int cfi_probe(struct flash_bank_s *bank) * SST flashes clearly violate this, and we will consider them incompatbile for now */ cfi_command(bank, 0x98, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -2217,12 +2221,12 @@ static int cfi_probe(struct flash_bank_s *bank) if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y')) { cfi_command(bank, 0xf0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } @@ -2262,12 +2266,12 @@ static int cfi_probe(struct flash_bank_s *bank) (1 << cfi_info->block_erase_timeout_max) * (1 << cfi_info->block_erase_timeout_typ), (1 << cfi_info->chip_erase_timeout_max) * (1 << cfi_info->chip_erase_timeout_typ)); - cfi_info->dev_size = 1<dev_size = 1 << cfi_query_u8(bank, 0, 0x27); cfi_info->interface_desc = cfi_query_u16(bank, 0, 0x28); cfi_info->max_buf_write_size = cfi_query_u16(bank, 0, 0x2a); cfi_info->num_erase_regions = cfi_query_u8(bank, 0, 0x2c); - LOG_DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size)); + LOG_DEBUG("size: 0x%" PRIx32 ", interface desc: %i, max buffer write size: %x", cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size)); if (cfi_info->num_erase_regions) { @@ -2275,7 +2279,10 @@ static int cfi_probe(struct flash_bank_s *bank) for (i = 0; i < cfi_info->num_erase_regions; i++) { cfi_info->erase_region_info[i] = cfi_query_u32(bank, 0, 0x2d + (4 * i)); - LOG_DEBUG("erase region[%i]: %i blocks of size 0x%x", i, (cfi_info->erase_region_info[i] & 0xffff) + 1, (cfi_info->erase_region_info[i] >> 16) * 256); + LOG_DEBUG("erase region[%i]: %" PRIu32 " blocks of size 0x%" PRIx32 "", + i, + (cfi_info->erase_region_info[i] & 0xffff) + 1, + (cfi_info->erase_region_info[i] >> 16) * 256); } } else @@ -2286,7 +2293,7 @@ static int cfi_probe(struct flash_bank_s *bank) /* We need to read the primary algorithm extended query table before calculating * the sector layout to be able to apply fixups */ - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { /* Intel command set (standard and extended) */ case 0x0001: @@ -2307,19 +2314,19 @@ static int cfi_probe(struct flash_bank_s *bank) * we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command */ cfi_command(bank, 0xf0, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0xff, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } } /* end CFI case */ /* apply fixups depending on the primary command set */ - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { /* Intel command set (standard and extended) */ case 0x0001: @@ -2337,7 +2344,7 @@ static int cfi_probe(struct flash_bank_s *bank) if ((cfi_info->dev_size * bank->bus_width / bank->chip_width) != bank->size) { - LOG_WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, cfi_info->dev_size); + LOG_WARNING("configuration specifies 0x%" PRIx32 " size, but a 0x%" PRIx32 " size flash was found", bank->size, cfi_info->dev_size); } if (cfi_info->num_erase_regions == 0) @@ -2353,7 +2360,7 @@ static int cfi_probe(struct flash_bank_s *bank) } else { - u32 offset = 0; + uint32_t offset = 0; for (i = 0; i < cfi_info->num_erase_regions; i++) { @@ -2365,7 +2372,7 @@ static int cfi_probe(struct flash_bank_s *bank) for (i = 0; i < cfi_info->num_erase_regions; i++) { - u32 j; + uint32_t j; for (j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++) { bank->sectors[sector].offset = offset; @@ -2378,7 +2385,7 @@ static int cfi_probe(struct flash_bank_s *bank) } if (offset != cfi_info->dev_size) { - LOG_WARNING("CFI size is 0x%x, but total sector size is 0x%x", cfi_info->dev_size, offset); + LOG_WARNING("CFI size is 0x%" PRIx32 ", but total sector size is 0x%" PRIx32 "", cfi_info->dev_size, offset); } } @@ -2402,7 +2409,7 @@ static int cfi_intel_protect_check(struct flash_bank_s *bank) cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; - u8 command[CFI_MAX_BUS_WIDTH]; + uint8_t command[CFI_MAX_BUS_WIDTH]; int i; /* check if block lock bits are supported on this device */ @@ -2410,14 +2417,14 @@ static int cfi_intel_protect_check(struct flash_bank_s *bank) return ERROR_FLASH_OPERATION_FAILED; cfi_command(bank, 0x90, command); - if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } for (i = 0; i < bank->num_sectors; i++) { - u8 block_status = cfi_get_u8(bank, i, 0x2); + uint8_t block_status = cfi_get_u8(bank, i, 0x2); if (block_status & 1) bank->sectors[i].is_protected = 1; @@ -2435,30 +2442,30 @@ static int cfi_spansion_protect_check(struct flash_bank_s *bank) cfi_flash_bank_t *cfi_info = bank->driver_priv; cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext; target_t *target = bank->target; - u8 command[8]; + uint8_t command[8]; int i; cfi_command(bank, 0xaa, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x55, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } cfi_command(bank, 0x90, command); - if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) { return retval; } for (i = 0; i < bank->num_sectors; i++) { - u8 block_status = cfi_get_u8(bank, i, 0x2); + uint8_t block_status = cfi_get_u8(bank, i, 0x2); if (block_status & 1) bank->sectors[i].is_protected = 1; @@ -2483,7 +2490,7 @@ static int cfi_protect_check(struct flash_bank_s *bank) if (cfi_info->qry[0] != 'Q') return ERROR_FLASH_BANK_NOT_PROBED; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: @@ -2553,14 +2560,14 @@ static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, "size: 0x%x, interface desc: %i, max buffer write size: %x\n", + printed = snprintf(buf, buf_size, "size: 0x%" PRIx32 ", interface desc: %i, max buffer write size: %x\n", cfi_info->dev_size, cfi_info->interface_desc, 1 << cfi_info->max_buf_write_size); buf += printed; buf_size -= printed; - switch(cfi_info->pri_id) + switch (cfi_info->pri_id) { case 1: case 3: