X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fat91sam7.c;h=e045f8457d15f7cd7b5066649bc64ec77c7fe601;hp=10ef55ba78bb2d9e14aaf1b38a99bcce8c25cbcb;hb=f876d5e9c769a288faa7fd14b7bf373363542aab;hpb=ccc2e3fe760a425f831b9e1f0e143d7d01d73a25 diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c index 10ef55ba78..e045f8457d 100644 --- a/src/flash/at91sam7.c +++ b/src/flash/at91sam7.c @@ -39,40 +39,30 @@ #include "config.h" #endif -#include "replacements.h" - #include "at91sam7.h" - -#include "flash.h" -#include "target.h" -#include "log.h" #include "binarybuffer.h" -#include "types.h" - -#include -#include -#include - -int at91sam7_register_commands(struct command_context_s *cmd_ctx); -int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); -int at91sam7_erase(struct flash_bank_s *bank, int first, int last); -int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last); -int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); -int at91sam7_probe(struct flash_bank_s *bank); -int at91sam7_auto_probe(struct flash_bank_s *bank); -int at91sam7_erase_check(struct flash_bank_s *bank); -int at91sam7_protect_check(struct flash_bank_s *bank); -int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size); - -u32 at91sam7_get_flash_status(target_t *target, int bank_number); -void at91sam7_set_flash_mode(flash_bank_t *bank, int mode); -u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout); -int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen); -int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); + + +static int at91sam7_register_commands(struct command_context_s *cmd_ctx); +static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); +static int at91sam7_erase(struct flash_bank_s *bank, int first, int last); +static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last); +static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count); +static int at91sam7_probe(struct flash_bank_s *bank); +//static int at91sam7_auto_probe(struct flash_bank_s *bank); +static int at91sam7_erase_check(struct flash_bank_s *bank); +static int at91sam7_protect_check(struct flash_bank_s *bank); +static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size); + +static u32 at91sam7_get_flash_status(target_t *target, int bank_number); +static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode); +static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout); +static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen); +static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); flash_driver_t at91sam7_flash = { - .name = "at91sam7_new", + .name = "at91sam7", .register_commands = at91sam7_register_commands, .flash_bank_command = at91sam7_flash_bank_command, .erase = at91sam7_erase, @@ -85,13 +75,14 @@ flash_driver_t at91sam7_flash = .info = at91sam7_info }; -u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 }; -u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 }; -u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 }; +static u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 }; +static u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 }; +static u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 }; -char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"}; +static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"}; -long SRAMSIZ[16] = { +#if 0 +static long SRAMSIZ[16] = { -1, 0x0400, /* 1K */ 0x0800, /* 2K */ @@ -109,17 +100,18 @@ long SRAMSIZ[16] = { 0x18000, /* 96K */ 0x80000, /* 512K */ }; +#endif -int at91sam7_register_commands(struct command_context_s *cmd_ctx) +static int at91sam7_register_commands(struct command_context_s *cmd_ctx) { - command_t *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7_new", NULL, COMMAND_ANY, NULL); + command_t *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7", NULL, COMMAND_ANY, NULL); register_command(cmd_ctx, at91sam7_cmd, "gpnvm", at91sam7_handle_gpnvm_command, COMMAND_EXEC, "at91sam7 gpnvm set|clear, set or clear one gpnvm bit"); return ERROR_OK; } -u32 at91sam7_get_flash_status(target_t *target, int bank_number) +static u32 at91sam7_get_flash_status(target_t *target, int bank_number) { u32 fsr; target_read_u32(target, MC_FSR[bank_number], &fsr); @@ -128,7 +120,7 @@ u32 at91sam7_get_flash_status(target_t *target, int bank_number) } /* Read clock configuration and set at91sam7_info->mck_freq */ -void at91sam7_read_clock_info(flash_bank_t *bank) +static void at91sam7_read_clock_info(flash_bank_t *bank) { at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; target_t *target = bank->target; @@ -207,7 +199,7 @@ void at91sam7_read_clock_info(flash_bank_t *bank) } /* Setup the timimg registers for nvbits or normal flash */ -void at91sam7_set_flash_mode(flash_bank_t *bank, int mode) +static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode) { u32 fmr, fmcn = 0, fws = 0; at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; @@ -255,7 +247,7 @@ void at91sam7_set_flash_mode(flash_bank_t *bank, int mode) at91sam7_info->flashmode = mode; } -u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout) +static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout) { u32 status; @@ -282,7 +274,7 @@ u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout) } /* Send one command to the AT91SAM flash controller */ -int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen) +static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen) { u32 fcr; at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; @@ -311,20 +303,20 @@ int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen) } /* Read device id register, main clock frequency register and fill in driver info structure */ -int at91sam7_read_part_info(struct flash_bank_s *bank) +static int at91sam7_read_part_info(struct flash_bank_s *bank) { flash_bank_t *t_bank = bank; at91sam7_flash_bank_t *at91sam7_info; target_t *target = t_bank->target; - u16 bnk, sec; - u16 arch; + uint16_t bnk, sec; + uint16_t arch; u32 cidr; - u8 banks_num; - u16 num_nvmbits; - u16 sectors_num; - u16 pages_per_sector; - u16 page_size; + uint8_t banks_num = 0; + uint16_t num_nvmbits = 0; + uint16_t sectors_num = 0; + uint16_t pages_per_sector = 0; + uint16_t page_size = 0; u32 ext_freq; u32 bank_size; u32 base_address = 0; @@ -626,15 +618,15 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) return ERROR_OK; } -int at91sam7_erase_check(struct flash_bank_s *bank) +static int at91sam7_erase_check(struct flash_bank_s *bank) { target_t *target = bank->target; - u16 retval; + uint16_t retval; u32 blank; - u16 fast_check; - u8 *buffer; - u16 nSector; - u16 nByte; + uint16_t fast_check; + uint8_t *buffer; + uint16_t nSector; + uint16_t nByte; if (bank->target->state != TARGET_HALTED) { @@ -673,7 +665,7 @@ int at91sam7_erase_check(struct flash_bank_s *bank) for (nSector=0; nSectornum_sectors; nSector++) { bank->sectors[nSector].is_erased = 1; - retval = target->type->read_memory(target, bank->base+bank->sectors[nSector].offset, 4, + retval = target_read_memory(target, bank->base+bank->sectors[nSector].offset, 4, bank->sectors[nSector].size/4, buffer); if (retval != ERROR_OK) return retval; @@ -692,9 +684,9 @@ int at91sam7_erase_check(struct flash_bank_s *bank) return ERROR_OK; } -int at91sam7_protect_check(struct flash_bank_s *bank) +static int at91sam7_protect_check(struct flash_bank_s *bank) { - u8 lock_pos, gpnvm_pos; + uint8_t lock_pos, gpnvm_pos; u32 status; at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; @@ -752,7 +744,7 @@ int at91sam7_protect_check(struct flash_bank_s *bank) # flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 0 ==== NOT RECOMENDED !!! ==== # flash bank at91sam7 0 0 0 0 0 (old style, full auto-detection) ==== NOT RECOMENDED !!! ==== ****************************************************************************************************************************************************************************************/ -int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) +static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) { flash_bank_t *t_bank = bank; at91sam7_flash_bank_t *at91sam7_info; @@ -767,9 +759,9 @@ int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch int banks_num; int num_sectors; - u16 pages_per_sector; - u16 page_size; - u16 num_nvmbits; + uint16_t pages_per_sector; + uint16_t page_size; + uint16_t num_nvmbits; char *target_name; @@ -864,13 +856,13 @@ int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch return ERROR_OK; } -int at91sam7_erase(struct flash_bank_s *bank, int first, int last) +static int at91sam7_erase(struct flash_bank_s *bank, int first, int last) { at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; int sec; u32 nbytes, pos; - u8 *buffer; - u8 erase_all; + uint8_t *buffer; + uint8_t erase_all; if (at91sam7_info->cidr == 0) { @@ -909,7 +901,7 @@ int at91sam7_erase(struct flash_bank_s *bank, int first, int last) { /* allocate and clean buffer */ nbytes = (last - first + 1) * bank->sectors[first].size; - buffer = malloc(nbytes * sizeof(u8)); + buffer = malloc(nbytes * sizeof(uint8_t)); for (pos=0; posdriver_priv; @@ -981,7 +974,7 @@ int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last) return ERROR_OK; } -int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) +static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count) { int retval; at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; @@ -1034,7 +1027,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* Write one block to the PageWriteBuffer */ buffer_pos = (pagen-first_page)*dst_min_alignment; wcount = CEIL(count,4); - if((retval = target->type->write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK) + if((retval = target_write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK) { return retval; } @@ -1050,7 +1043,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) return ERROR_OK; } -int at91sam7_probe(struct flash_bank_s *bank) +static int at91sam7_probe(struct flash_bank_s *bank) { /* we can't probe on an at91sam7 * if this is an at91sam7, it has the configured flash */ @@ -1069,7 +1062,7 @@ int at91sam7_probe(struct flash_bank_s *bank) return ERROR_OK; } -int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size) { int printed; at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; @@ -1130,11 +1123,11 @@ int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size) * The maximum number of write/erase cycles for Non volatile Memory bits is 100. this includes * Lock Bits (LOCKx), General Purpose NVM bits (GPNVMx) and the Security Bit. */ -int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { flash_bank_t *bank; int bit; - u8 flashcmd; + uint8_t flashcmd; u32 status; at91sam7_flash_bank_t *at91sam7_info; int retval;