X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=doc%2Fopenocd.texi;h=d54ad122e788d2158b1a168cab560a101675cda7;hp=c6113abdb340e14e545b036bf1e291b028e7d17e;hb=550abe7396f60274ffd0c5f373eda046af9d9a85;hpb=63763345d94b11f106c832c23e8ad730a4485723

diff --git a/doc/openocd.texi b/doc/openocd.texi
index c6113abdb3..d54ad122e7 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2131,6 +2131,7 @@ to debug some other target.  It can support the SWO trace mechanism.
 @item @b{oocdlink} OOCDLink
 @c oocdlink ~= jtagkey_prototype_v1
 @item @b{redbee-econotag} Integrated with a Redbee development board.
+@item @b{redbee-usb} Integrated with a Redbee USB-stick development board.
 @item @b{sheevaplug} Marvell Sheevaplug development kit
 @item @b{signalyzer} Xverve Signalyzer
 @item @b{stm32stick} Hitex STM32 Performance Stick
@@ -6426,12 +6427,6 @@ If @var{value} is defined, first assigns that.
 @subsection Cortex-M3 specific commands
 @cindex Cortex-M3
 
-@deffn Command {cortex_m3 disassemble} address [count]
-@cindex disassemble
-Disassembles @var{count} Thumb2 instructions starting at @var{address}.
-If @var{count} is not specified, a single instruction is disassembled.
-@end deffn
-
 @deffn Command {cortex_m3 maskisr} (@option{on}|@option{off})
 Control masking (disabling) interrupts during target step/resume.
 @end deffn