X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=doc%2Fopenocd.texi;h=ae926970be69a9a5e8edcffad173c85e76c31645;hp=8e7c7f8a70df15eb5c7e23de4a8f1bbe21cc0533;hb=0c8ec7c826c60391034fe5f0ea90f8538ac94b38;hpb=5396ec5dcc64354c8101f8d3f16d498ca3b10326 diff --git a/doc/openocd.texi b/doc/openocd.texi index 8e7c7f8a70..ae926970be 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -995,7 +995,7 @@ For example, there may be configuration files for your JTAG adapter and target chip, but you need a new board-specific config file giving access to your particular flash chips. Or you might need to write another target chip configuration file -for a new chip built around the Cortex M3 core. +for a new chip built around the Cortex-M3 core. @quotation Note When you write new configuration files, please submit @@ -2564,6 +2564,8 @@ roots at @var{bus} and walks down the physical ports, with each @var{port} option specifying a deeper level in the bus topology, the last @var{port} denoting where the target adapter is actually plugged. The USB bus topology can be queried with the command @emph{lsusb -t}. + +This command is only available if your libusb1 is at least version 1.0.16. @end deffn @deffn {Config Command} {ftdi_channel} channel @@ -4958,6 +4960,52 @@ flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME @end example @end deffn +@deffn {Flash Driver} ambiqmicro +@cindex ambiqmicro +@cindex apollo +All members of the Apollo microcontroller family from +Ambiq Micro include internal flash and use ARM's Cortex-M4 core. +The host connects over USB to an FTDI interface that communicates +with the target using SWD. + +The @var{ambiqmicro} driver reads the Chip Information Register detect +the device class of the MCU. +The Flash and Sram sizes directly follow device class, and are used +to set up the flash banks. +If this fails, the driver will use default values set to the minimum +sizes of an Apollo chip. + +All Apollo chips have two flash banks of the same size. +In all cases the first flash bank starts at location 0, +and the second bank starts after the first. + +@example +# Flash bank 0 +flash bank $_FLASHNAME ambiqmicro 0 0x00040000 0 0 $_TARGETNAME +# Flash bank 1 - same size as bank0, starts after bank 0. +flash bank $_FLASHNAME ambiqmicro 0x00040000 0x00040000 0 0 $_TARGETNAME +@end example + +Flash is programmed using custom entry points into the bootloader. +This is the only way to program the flash as no flash control registers +are available to the user. + +The @var{ambiqmicro} driver adds some additional commands: + +@deffn Command {ambiqmicro mass_erase} +Erase entire bank. +@end deffn +@deffn Command {ambiqmicro page_erase} +Erase device pages. +@end deffn +@deffn Command {ambiqmicro program_otp} +Program OTP is a one time operation to create write protected flash. +The user writes sectors to sram starting at 0x10000010. +Program OTP will write these sectors from sram to flash, and write protect +the flash. +@end deffn +@end deffn + @anchor{at91samd} @deffn {Flash Driver} at91samd @cindex at91samd @@ -5167,19 +5215,27 @@ The AVR 8-bit microcontrollers from Atmel integrate flash memory. @deffn {Flash Driver} efm32 All members of the EFM32 microcontroller family from Energy Micro include -internal flash and use ARM Cortex M3 cores. The driver automatically recognizes +internal flash and use ARM Cortex-M3 cores. The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself. @example flash bank $_FLASHNAME efm32 0 0 0 0 $_TARGETNAME @end example +A special feature of efm32 controllers is that it is possible to completely disable the +debug interface by writing the correct values to the 'Debug Lock Word'. OpenOCD supports +this via the following command: +@example +efm32 debuglock num +@end example +The @var{num} parameter is a value shown by @command{flash banks}. +Note that in order for this command to take effect, the target needs to be reset. @emph{The current implementation is incomplete. Unprotecting flash pages is not supported.} @end deffn @deffn {Flash Driver} fm3 All members of the FM3 microcontroller family from Fujitsu -include internal flash and use ARM Cortex M3 cores. +include internal flash and use ARM Cortex-M3 cores. The @var{fm3} driver uses the @var{target} parameter to select the correct bank config, it can currently be one of the following: @code{mb9bfxx1.cpu}, @code{mb9bfxx2.cpu}, @code{mb9bfxx3.cpu}, @@ -5190,10 +5246,28 @@ flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME @end example @end deffn +@deffn {Flash Driver} fm4 +All members of the FM4 microcontroller family from Spansion (formerly Fujitsu) +include internal flash and use ARM Cortex-M4 cores. +The @var{fm4} driver uses a @var{family} parameter to select the +correct bank config, it can currently be one of the following: +@code{MB9BFx64}, @code{MB9BFx65}, @code{MB9BFx66}, @code{MB9BFx67}, @code{MB9BFx68}, +@code{S6E2Cx8}, @code{S6E2Cx9}, @code{S6E2CxA} or @code{S6E2Dx}, +with @code{x} treated as wildcard and otherwise case (and any trailing +characters) ignored. + +@example +flash bank $@{_FLASHNAME@}0 fm4 0x00000000 0 0 0 $_TARGETNAME S6E2CCAJ0A +flash bank $@{_FLASHNAME@}1 fm4 0x00100000 0 0 0 $_TARGETNAME S6E2CCAJ0A +@end example +@emph{The current implementation is incomplete. Protection is not supported, +nor is Chip Erase (only Sector Erase is implemented).} +@end deffn + @deffn {Flash Driver} kinetis @cindex kinetis Kx and KLx members of the Kinetis microcontroller family from Freescale include -internal flash and use ARM Cortex M0+ or M4 cores. The driver automatically +internal flash and use ARM Cortex-M0+ or M4 cores. The driver automatically recognizes flash size and a number of flash banks (1-4) using the chip identification register, and autoconfigures itself. @@ -5251,7 +5325,7 @@ Command disables watchdog timer. @deffn {Flash Driver} kinetis_ke @cindex kinetis_ke KE members of the Kinetis microcontroller family from Freescale include -internal flash and use ARM Cortex M0+. The driver automatically recognizes +internal flash and use ARM Cortex-M0+. The driver automatically recognizes the KE family and sub-family using the chip identification register, and autoconfigures itself. @@ -5275,24 +5349,6 @@ Command disables watchdog timer. @end deffn @end deffn -@deffn {Flash Driver} fm4 -All members of the FM4 microcontroller family from Spansion (formerly Fujitsu) -include internal flash and use ARM Cortex-M4 cores. -The @var{fm4} driver uses a @var{family} parameter to select the -correct bank config, it can currently be one of the following: -@code{MB9BFx64}, @code{MB9BFx65}, @code{MB9BFx66}, @code{MB9BFx67}, @code{MB9BFx68}, -@code{S6E2Cx8}, @code{S6E2Cx9}, @code{S6E2CxA} or @code{S6E2Dx}, -with @code{x} treated as wildcard and otherwise case (and any trailing -characters) ignored. - -@example -flash bank $@{_FLASHNAME@}0 fm4 0x00000000 0 0 0 $_TARGETNAME S6E2CCAJ0A -flash bank $@{_FLASHNAME@}1 fm4 0x00100000 0 0 0 $_TARGETNAME S6E2CCAJ0A -@end example -@emph{The current implementation is incomplete. Protection is not supported, -nor is Chip Erase (only Sector Erase is implemented).} -@end deffn - @deffn {Flash Driver} lpc2000 This is the driver to support internal flash of all members of the LPC11(x)00 and LPC1300 microcontroller families and most members of @@ -5630,7 +5686,7 @@ This will remove any Code Protection. @deffn {Flash Driver} psoc4 All members of the PSoC 41xx/42xx microcontroller family from Cypress -include internal flash and use ARM Cortex M0 cores. +include internal flash and use ARM Cortex-M0 cores. The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself. @@ -5664,7 +5720,7 @@ The @var{num} parameter is a value shown by @command{flash banks}. @deffn {Flash Driver} sim3x All members of the SiM3 microcontroller family from Silicon Laboratories -include internal flash and use ARM Cortex M3 cores. It supports both JTAG +include internal flash and use ARM Cortex-M3 cores. It supports both JTAG and SWD interface. The @var{sim3x} driver tries to probe the device to auto detect the MCU. If this failes, it will use the @var{size} parameter as the size of flash bank. @@ -5977,6 +6033,11 @@ the flash clock. @end deffn @end deffn +@deffn {Flash Driver} xmc1xxx +All members of the XMC1xxx microcontroller family from Infineon. +This driver does not require the chip and bus width to be specified. +@end deffn + @deffn {Flash Driver} xmc4xxx All members of the XMC4xxx microcontroller family from Infineon. This driver does not require the chip and bus width to be specified.