X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=doc%2Fopenocd.texi;h=14835a919cb292d22e898d95d7d3950114abf75c;hp=0608a28d231060c8b04dc45c8b7361cb6d4bf8cd;hb=751e2454bf076708d3e695833c4def460ab41d8b;hpb=4124e5deb4d95be490a6127ae15f28b1403a969e diff --git a/doc/openocd.texi b/doc/openocd.texi index 0608a28d23..14835a919c 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -700,6 +700,7 @@ Configuration files and scripts are searched for in @item any search dir specified on the command line using the @option{-s} option, @item any search dir specified using the @command{add_script_search_dir} command, @item @file{$HOME/.openocd} (not on Windows), +@item a directory in the @env{OPENOCD_SCRIPTS} environment variable (if set), @item the site wide script library @file{$pkgdatadir/site} and @item the OpenOCD-supplied script library @file{$pkgdatadir/scripts}. @end enumerate @@ -4932,6 +4933,9 @@ flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME @anchor{at91samd} @deffn {Flash Driver} at91samd @cindex at91samd +All members of the ATSAMD, ATSAMR, ATSAML and ATSAMC microcontroller +families from Atmel include internal flash and use ARM's Cortex-M0+ core. +This driver uses the same cmd names/syntax as @xref{at91sam3}. @deffn Command {at91samd chip-erase} Issues a complete Flash erase via the Device Service Unit (DSU). This can be @@ -4979,6 +4983,12 @@ at91samd bootloader 16384 @end example @end deffn +@deffn Command {at91samd dsu_reset_deassert} +This command releases internal reset held by DSU +and prepares reset vector catch in case of reset halt. +Command is used internally in event event reset-deassert-post. +@end deffn + @end deffn @anchor{at91sam3} @@ -5067,6 +5077,13 @@ Command is used internally in event event reset-deassert-post. @end deffn @end deffn +@deffn {Flash Driver} atsamv +@cindex atsamv +All members of the ATSAMV, ATSAMS, and ATSAME families from +Atmel include internal flash and use ARM's Cortex-M7 core. +This driver uses the same cmd names/syntax as @xref{at91sam3}. +@end deffn + @deffn {Flash Driver} at91sam7 All members of the AT91SAM7 microcontroller family from Atmel include internal flash and use ARM7TDMI cores. The driver automatically @@ -5769,6 +5786,22 @@ the flash clock. @end deffn @end deffn +@deffn {Flash Driver} xmc4xxx +All members of the XMC4xxx microcontroller family from Infineon. +This driver does not require the chip and bus width to be specified. + +Some xmc4xxx-specific commands are defined: + +@deffn Command {xmc4xxx flash_password} bank_id passwd1 passwd2 +Saves flash protection passwords which are used to lock the user flash +@end deffn + +@deffn Command {xmc4xxx flash_unprotect} bank_id user_level[0-1] +Removes Flash write protection from the selected user bank +@end deffn + +@end deffn + @section NAND Flash Commands @cindex NAND @@ -7567,6 +7600,58 @@ fix CSW_SPROT from register AP_REG_CSW on selected dap. Defaulting to 0. @end deffn +@deffn Command {dap ti_be_32_quirks} [@option{enable}] +Set/get quirks mode for TI TMS450/TMS570 processors +Disabled by default +@end deffn + + +@subsection ARMv7-A specific commands +@cindex Cortex-A + +@deffn Command {cortex_a cache_info} +display information about target caches +@end deffn + +@deffn Command {cortex_a dbginit} +Initialize core debug +Enables debug by unlocking the Software Lock and clearing sticky powerdown indications +@end deffn + +@deffn Command {cortex_a smp_off} +Disable SMP mode +@end deffn + +@deffn Command {cortex_a smp_on} +Enable SMP mode +@end deffn + +@deffn Command {cortex_a smp_gdb} [core_id] +Display/set the current core displayed in GDB +@end deffn + +@deffn Command {cortex_a maskisr} [@option{on}|@option{off}] +Selects whether interrupts will be processed when single stepping +@end deffn + +@deffn Command {cache_config l2x} [base way] +configure l2x cache +@end deffn + + +@subsection ARMv7-R specific commands +@cindex Cortex-R + +@deffn Command {cortex_r dbginit} +Initialize core debug +Enables debug by unlocking the Software Lock and clearing sticky powerdown indications +@end deffn + +@deffn Command {cortex_r maskisr} [@option{on}|@option{off}] +Selects whether interrupts will be processed when single stepping +@end deffn + + @subsection ARMv7-M specific commands @cindex tracing @cindex SWO