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stm32l4x: add OTP support for STM32 G0/G4/L4/L4+/L5/WB/WL devices
[openocd.git] / tcl / target / stm32l5x.cfg
diff --git a/tcl/target/stm32l5x.cfg b/tcl/target/stm32l5x.cfg
index bf5636094f9a7aa965f1bc2426e07b42df54481f..92083b9e0540484a4cf89c080f3500b5ca46c19b 100644 (file)
--- a/tcl/target/stm32l5x.cfg
+++ b/tcl/target/stm32l5x.cfg
@@ -53,7 +53,8 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
 # declare non-secure flash
-flash bank $_CHIPNAME.flash_ns stm32l4x 0 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.flash_ns stm32l4x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.otp      stm32l4x 0x0BFA0000 0 0 0 $_TARGETNAME
 
 # Common knowledges tells JTAG speed should be <= F_CPU/6.
 # F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on
Open On-Chip Debugger

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