/* forward declarations */
static int xscale_resume(struct target *, int current,
- uint32_t address, int handle_breakpoints, int debug_execution);
+ target_addr_t address, int handle_breakpoints, int debug_execution);
static int xscale_debug_entry(struct target *);
static int xscale_restore_banked(struct target *);
static int xscale_get_reg(struct reg *reg);
static const char xscale_not[] = "target is not an XScale";
-static int xscale_verify_pointer(struct command_context *cmd_ctx,
+static int xscale_verify_pointer(struct command_invocation *cmd,
struct xscale_common *xscale)
{
if (xscale->common_magic != XSCALE_COMMON_MAGIC) {
- command_print(cmd_ctx, xscale_not);
+ command_print(cmd->ctx, xscale_not);
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
return retval;
}
- xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = 0;
- xscale->reg_cache->reg_list[XSCALE_DCSR].valid = 1;
+ xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = false;
+ xscale->reg_cache->reg_list[XSCALE_DCSR].valid = true;
/* write the register with the value we just read
* on this second pass, only the first bit of field0 is guaranteed to be 0)
}
gettimeofday(&now, NULL);
- if ((now.tv_sec > timeout.tv_sec) ||
- ((now.tv_sec == timeout.tv_sec) && (now.tv_usec > timeout.tv_usec))) {
+ if (timeval_compare(&now, &timeout) > 0) {
LOG_ERROR("time out reading TX register");
return ERROR_TARGET_TIMEOUT;
}
return retval;
}
- xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = 0;
- xscale->reg_cache->reg_list[XSCALE_DCSR].valid = 1;
+ xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = false;
+ xscale->reg_cache->reg_list[XSCALE_DCSR].valid = true;
return ERROR_OK;
}
/* move r0 from buffer to register cache */
buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, buffer[0]);
- arm->core_cache->reg_list[0].dirty = 1;
- arm->core_cache->reg_list[0].valid = 1;
+ arm->core_cache->reg_list[0].dirty = true;
+ arm->core_cache->reg_list[0].valid = true;
LOG_DEBUG("r0: 0x%8.8" PRIx32 "", buffer[0]);
/* move pc from buffer to register cache */
buf_set_u32(arm->pc->value, 0, 32, buffer[1]);
- arm->pc->dirty = 1;
- arm->pc->valid = 1;
+ arm->pc->dirty = true;
+ arm->pc->valid = true;
LOG_DEBUG("pc: 0x%8.8" PRIx32 "", buffer[1]);
/* move data from buffer to register cache */
for (i = 1; i <= 7; i++) {
buf_set_u32(arm->core_cache->reg_list[i].value, 0, 32, buffer[1 + i]);
- arm->core_cache->reg_list[i].dirty = 1;
- arm->core_cache->reg_list[i].valid = 1;
+ arm->core_cache->reg_list[i].dirty = true;
+ arm->core_cache->reg_list[i].valid = true;
LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, buffer[i + 1]);
}
/* mark xscale regs invalid to ensure they are retrieved from the
* debug handler if requested */
for (i = 0; i < xscale->reg_cache->num_regs; i++)
- xscale->reg_cache->reg_list[i].valid = 0;
+ xscale->reg_cache->reg_list[i].valid = false;
/* examine debug reason */
xscale_read_dcsr(target);
}
static int xscale_resume(struct target *target, int current,
- uint32_t address, int handle_breakpoints, int debug_execution)
+ target_addr_t address, int handle_breakpoints, int debug_execution)
{
struct xscale_common *xscale = target_to_xscale(target);
struct arm *arm = &xscale->arm;
enum trace_mode saved_trace_mode;
/* there's a breakpoint at the current PC, we have to step over it */
- LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
+ LOG_DEBUG("unset breakpoint at " TARGET_ADDR_FMT "",
+ breakpoint->address);
xscale_unset_breakpoint(target, breakpoint);
/* calculate PC of next instruction */
LOG_DEBUG("disable single-step");
xscale_disable_single_step(target);
- LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
+ LOG_DEBUG("set breakpoint at " TARGET_ADDR_FMT "",
+ breakpoint->address);
xscale_set_breakpoint(target, breakpoint);
}
}
}
static int xscale_step(struct target *target, int current,
- uint32_t address, int handle_breakpoints)
+ target_addr_t address, int handle_breakpoints)
{
struct arm *arm = target_to_arm(target);
struct breakpoint *breakpoint = NULL;
return ERROR_OK;
}
-static int xscale_read_memory(struct target *target, uint32_t address,
+static int xscale_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
uint32_t i;
int retval;
- LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
+ LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
address,
size,
count);
return ERROR_OK;
}
-static int xscale_read_phys_memory(struct target *target, uint32_t address,
+static int xscale_read_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
return ERROR_FAIL;
}
-static int xscale_write_memory(struct target *target, uint32_t address,
+static int xscale_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
+ LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
address,
size,
count);
return ERROR_OK;
}
-static int xscale_write_phys_memory(struct target *target, uint32_t address,
+static int xscale_write_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
xscale_read_tx(target, 1);
buf_cpy(xscale->reg_cache->reg_list[XSCALE_TX].value, reg->value, 32);
- reg->dirty = 0;
- reg->valid = 1;
+ reg->dirty = false;
+ reg->valid = true;
}
return ERROR_OK;
static inline void xscale_display_instruction(struct target *target, uint32_t pc,
struct arm_instruction *instruction,
- struct command_context *cmd_ctx)
+ struct command_invocation *cmd)
{
int retval = xscale_read_instruction(target, pc, instruction);
if (retval == ERROR_OK)
- command_print(cmd_ctx, "%s", instruction->text);
+ command_print(cmd->ctx, "%s", instruction->text);
else
- command_print(cmd_ctx, "0x%8.8" PRIx32 "\t<not found in image>", pc);
+ command_print(cmd->ctx, "0x%8.8" PRIx32 "\t<not found in image>", pc);
}
-static int xscale_analyze_trace(struct target *target, struct command_context *cmd_ctx)
+static int xscale_analyze_trace(struct target *target, struct command_invocation *cmd)
{
struct xscale_common *xscale = target_to_xscale(target);
struct xscale_trace_data *trace_data = xscale->trace.data;
count = trace_data->entries[i].data & 0x0f;
for (j = 0; j < count; j++) {
xscale_display_instruction(target, current_pc, &instruction,
- cmd_ctx);
+ cmd);
current_pc += xscale->trace.core_state == ARM_STATE_ARM ? 4 : 2;
}
* rollover and some exceptions: undef, swi, prefetch abort. */
if ((trace_msg_type == 15) || (exception > 0 && exception < 4)) {
xscale_display_instruction(target, current_pc, &instruction,
- cmd_ctx);
+ cmd);
current_pc += xscale->trace.core_state == ARM_STATE_ARM ? 4 : 2;
}
continue;
if (exception) {
- command_print(cmd_ctx, "--- exception %i ---", exception);
+ command_print(cmd->ctx, "--- exception %i ---", exception);
continue;
}
/* not exception or rollover; next instruction is a branch and is
* not included in the count */
- xscale_display_instruction(target, current_pc, &instruction, cmd_ctx);
+ xscale_display_instruction(target, current_pc, &instruction, cmd);
/* for direct branches, extract branch destination from instruction */
if ((trace_msg_type == 8) || (trace_msg_type == 12)) {
}
if (current_pc == 0)
- command_print(cmd_ctx, "address unknown");
+ command_print(cmd->ctx, "address unknown");
continue;
}
/* display remaining instructions */
for (i = 0; i < gap_count; i++) {
- xscale_display_instruction(target, current_pc, &instruction, cmd_ctx);
+ xscale_display_instruction(target, current_pc, &instruction, cmd);
current_pc += xscale->trace.core_state == ARM_STATE_ARM ? 4 : 2;
}
for (i = 0; i < num_regs; i++) {
(*cache_p)->reg_list[i].name = xscale_reg_list[i];
(*cache_p)->reg_list[i].value = calloc(4, 1);
- (*cache_p)->reg_list[i].dirty = 0;
- (*cache_p)->reg_list[i].valid = 0;
+ (*cache_p)->reg_list[i].dirty = false;
+ (*cache_p)->reg_list[i].valid = false;
(*cache_p)->reg_list[i].size = 32;
(*cache_p)->reg_list[i].arch_info = &arch_info[i];
(*cache_p)->reg_list[i].type = &xscale_reg_type;
}
xscale = target_to_xscale(target);
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
return ERROR_FAIL;
}
xscale = target_to_xscale(target);
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
}
static int xscale_virt2phys(struct target *target,
- uint32_t virtual, uint32_t *physical)
+ target_addr_t virtual, target_addr_t *physical)
{
struct xscale_common *xscale = target_to_xscale(target);
uint32_t cb;
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
struct target *target = get_current_target(CMD_CTX);
struct xscale_common *xscale = target_to_xscale(target);
- int retval = xscale_verify_pointer(CMD_CTX, xscale);
+ int retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
uint32_t catch = 0;
struct reg *dcsr_reg = &xscale->reg_cache->reg_list[XSCALE_DCSR];
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
int err = 0;
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
uint32_t dcsr_value;
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
struct fileio *file;
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
- xscale_analyze_trace(target, CMD_CTX);
+ xscale_analyze_trace(target, CMD);
return ERROR_OK;
}
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- retval = xscale_verify_pointer(CMD_CTX, xscale);
+ retval = xscale_verify_pointer(CMD, xscale);
if (retval != ERROR_OK)
return retval;
.handler = xscale_handle_cache_info_command,
.mode = COMMAND_EXEC,
.help = "display information about CPU caches",
+ .usage = "",
},
{
.name = "mmu",
.deassert_reset = xscale_deassert_reset,
/* REVISIT on some cores, allow exporting iwmmxt registers ... */
+ .get_gdb_arch = arm_get_gdb_arch,
.get_gdb_reg_list = arm_get_gdb_reg_list,
.read_memory = xscale_read_memory,