- jtag_khz/speed are now single parameter only. These are used

[openocd.git] / src / target / target / str912.cfg

diff --git a/src/target/target/str912.cfg b/src/target/target/str912.cfg
index 8200c0f01c1ff89ebd21699bca41cf96205c7321..14bb4973cad140ff184f0d7a54004aea0299e58d 100644 (file)
--- a/src/target/target/str912.cfg
+++ b/src/target/target/str912.cfg
@@ -1,8 +1,30 @@
+# script for str9
+
+# jtag speed. We need to stick to 16kHz until we've finished reset.
+
+jtag_khz 16
+proc target_0_pre_reset {} {
+       jtag_khz 16
+}
+
+proc target_0_post_reset {} {
+       # We can increase speed now that we know the target is halted.
+       jtag_khz 3000
+       
+       # -- Enable 96K RAM
+       # PFQBC enabled / DTCM & AHB wait-states disabled
+       mww 0x5C002034 0x0191 
+
+       str9x flash_config 0 4 2 0 0x80000
+       flash protect 0 0 7 off
+       
+       
+}
+
+
 jtag_nsrst_delay 100
 jtag_ntrst_delay 100
 
-jtag_khz 16 2000
-
 #use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst
 
@@ -14,10 +36,9 @@ jtag_device 5 0x1 0x1 0x1e
 
 #target <type> <startup mode>
 #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
-target arm966e little reset_halt 1 arm966e
+target arm966e little 1 arm966e
 run_and_halt_time 0 30
 
-target_script 0 reset event/str912_reset.script
 
 working_area 0 0x50000000 16384 nobackup