-#Marvell/Intel PXA270 Script\r
-# set jtag_nsrst_delay to the delay introduced by your reset circuit\r
-# the rest of the needed delays are built into the openocd program\r
-jtag_nsrst_delay 260\r
-# set the jtag_ntrst_delay to the delay introduced by a reset circuit\r
-# the rest of the needed delays are built into the openocd program\r
-jtag_ntrst_delay 0\r
-#use combined on interfaces or targets that can\92t set TRST/SRST separately\r
-reset_config trst_and_srst separate\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 7 0x1 0x7f 0x7e\r
-#target configuration\r
-daemon_startup reset\r
-target xscale little reset_halt 0 pxa27x\r
-# maps to PXA internal RAM. If you are using a PXA255\r
-# you must initialize SDRAM or leave this option off\r
-working_area 0 0x5c000000 0x10000 nobackup\r
-run_and_halt_time 0 30\r
-#flash bank <driver> <base> <size> <chip_width> <bus_width>\r
-# works for P30 flash\r
-flash bank cfi 0x00000000 0x1000000 2 4 0\r
+#Marvell/Intel PXA270 Script
+# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_nsrst_delay 260
+# set the jtag_ntrst_delay to the delay introduced by a reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_ntrst_delay 0
+#use combined on interfaces or targets that can\92t set TRST/SRST separately
+reset_config trst_and_srst separate
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 7 0x1 0x7f 0x7e
+#target configuration
+daemon_startup reset
+target xscale little reset_halt 0 pxa27x
+# maps to PXA internal RAM. If you are using a PXA255
+# you must initialize SDRAM or leave this option off
+working_area 0 0x5c000000 0x10000 nobackup
+run_and_halt_time 0 30
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+# works for P30 flash
+flash bank cfi 0x00000000 0x1000000 2 4 0