mips: m4k alternate pracc code. Patch 1

[openocd.git] / src / target / mips_ejtag.h

diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index f5d62c10dc070eebe5e45cc722091f9a7773261e..32f016035f4335c016b45096312df16bd59f4dfd 100644 (file)
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -23,8 +23,7 @@
 #ifndef MIPS_EJTAG
 #define MIPS_EJTAG
 
-#include "types.h"
-#include "jtag.h"
+#include <jtag/jtag.h>
 
 /* tap instructions */
 #define EJTAG_INST_IDCODE              0x01
@@ -41,7 +40,18 @@
 #define EJTAG_INST_TCBDATA             0x12
 #define EJTAG_INST_BYPASS              0xFF
 
-/* debug control register bits */
+/* microchip PIC32MX specific instructions */
+#define MTAP_SW_MTAP                   0x04
+#define MTAP_SW_ETAP                   0x05
+#define MTAP_COMMAND                   0x07
+
+/* microchip specific cmds */
+#define MCHP_ASERT_RST                 0xd1
+#define MCHP_DE_ASSERT_RST             0xd0
+#define MCHP_ERASE                             0xfc
+#define MCHP_STATUS                            0x00
+
+/* ejtag control register bits ECR */
 #define EJTAG_CTRL_TOF                 (1 << 1)
 #define EJTAG_CTRL_TIF                 (1 << 2)
 #define EJTAG_CTRL_BRKST               (1 << 3)
@@ -88,26 +98,62 @@
 #define EJTAG_DEBUG_DBD                        (1 << 31)
 
 /* implementaion register bits */
+#define EJTAG_IMP_R3K                  (1 << 28)
+#define EJTAG_IMP_DINT                 (1 << 24)
 #define EJTAG_IMP_NODMA                        (1 << 14)
 #define EJTAG_IMP_MIPS16               (1 << 16)
+#define EJTAG_DCR_MIPS64               (1 << 0)
+
+/* Debug Control Register DCR */
+#define EJTAG_DCR                              0xFF300000
+#define EJTAG_DCR_ENM                  (1 << 29)
+#define EJTAG_DCR_DB                   (1 << 17)
+#define EJTAG_DCR_IB                   (1 << 16)
+#define EJTAG_DCR_INTE                 (1 << 4)
+
+/* breakpoint support */
+#define EJTAG_IBS                              0xFF301000
+#define EJTAG_IBA1                             0xFF301100
+#define EJTAG_DBS                              0xFF302000
+#define EJTAG_DBA1                             0xFF302100
+#define        EJTAG_DBCn_NOSB                 (1 << 13)
+#define        EJTAG_DBCn_NOLB                 (1 << 12)
+#define        EJTAG_DBCn_BLM_MASK             0xff
+#define        EJTAG_DBCn_BLM_SHIFT    4
+#define        EJTAG_DBCn_BE                   (1 << 0)
+
+struct mips_ejtag {
+       struct jtag_tap *tap;
+       uint32_t impcode;
+       uint32_t idcode;
+       uint32_t ejtag_ctrl;
+       int fast_access_save;
+       uint32_t reg8;
+       uint32_t reg9;
+       unsigned scan_delay;
+       int mode;
+};
+
+void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
+               int new_instr);
+int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
+int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
+int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
+void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info,
+                           uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf);
+void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data);
+int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data);
+void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data);
+int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data);
+int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t *data);
+
+int mips_ejtag_init(struct mips_ejtag *ejtag_info);
+int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step);
 
-typedef struct mips_ejtag_s
+static inline void mips_le_to_h_u32(jtag_callback_data_t arg)
 {
-       int chain_pos;
-       u32 impcode;
-       /*int use_dma;*/
-       u32 ejtag_ctrl;
-} mips_ejtag_t;
-
-extern int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, in_handler_t handler);
-extern int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info);
-extern int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info, int enable_interrupts);
-extern int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t handler);
-extern int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode, in_handler_t handler);
-extern int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data);
-
-extern int mips_ejtag_init(mips_ejtag_t *ejtag_info);
-extern int mips_ejtag_config_step(mips_ejtag_t *ejtag_info, int enable_step);
-extern int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, u32* debug_reg);
+       uint8_t *in = (uint8_t *)arg;
+       *((uint32_t *)arg) = le_to_h_u32(in);
+}
 
 #endif /* MIPS_EJTAG */