#include <target/mips_ejtag.h>
#define MIPS32_PRACC_FASTDATA_AREA 0xFF200000
+#define MIPS32_PRACC_BASE_ADDR 0xFF200000
#define MIPS32_PRACC_FASTDATA_SIZE 16
#define MIPS32_PRACC_TEXT 0xFF200200
#define MIPS32_PRACC_STACK 0xFF204000
#define MIPS32_PRACC_PARAM_OUT (MIPS32_PRACC_PARAM_IN + MIPS32_PRACC_PARAM_IN_SIZE)
#define MIPS32_PRACC_PARAM_OUT_SIZE 0x1000
+#define PRACC_UPPER_BASE_ADDR (MIPS32_PRACC_BASE_ADDR >> 16)
+#define PRACC_TEXT_OFFSET (MIPS32_PRACC_TEXT - MIPS32_PRACC_BASE_ADDR)
+#define PRACC_IN_OFFSET (MIPS32_PRACC_PARAM_IN - MIPS32_PRACC_BASE_ADDR)
+#define PRACC_OUT_OFFSET (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_BASE_ADDR)
+#define PRACC_STACK_OFFSET (MIPS32_PRACC_STACK - MIPS32_PRACC_BASE_ADDR)
+
#define MIPS32_FASTDATA_HANDLER_SIZE 0x80
#define UPPER16(uint32_t) (uint32_t >> 16)
#define LOWER16(uint32_t) (uint32_t & 0xFFFF)
#define NEG16(v) (((~(v)) + 1) & 0xFFFF)
/*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
+struct pracc_queue_info {
+ int retval;
+ const int max_code;
+ int code_count;
+ int store_count;
+ uint32_t *pracc_list; /* Code and store addresses */
+};
+void pracc_queue_init(struct pracc_queue_info *ctx);
+void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr);
+void pracc_queue_free(struct pracc_queue_info *ctx);
+int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info,
+ struct pracc_queue_info *ctx, uint32_t *buf);
+
int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info,
uint32_t addr, int size, int count, void *buf);
int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info,