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target/mips32: change prototype of mips32_verify_pointer()
[openocd.git] / src / target / mips32.c
diff --git a/src/target/mips32.c b/src/target/mips32.c
index c5b7fbce8e4d3a1e1101f2a4414abff17905b199..9cb24a4472710d9ccab0151d2843c3c58e3558be 100644 (file)
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -34,7 +34,7 @@
 #include "register.h"
 
 static const char *mips_isa_strings[] = {
-       "MIPS32", "MIPS16"
+       "MIPS32", "MIPS16", "", "MICRO MIPS32",
 };
 
 #define MIPS32_GDB_DUMMY_FP_REG 1
@@ -190,8 +190,8 @@ static int mips32_set_core_reg(struct reg *reg, uint8_t *buf)
                return ERROR_TARGET_NOT_HALTED;
 
        buf_set_u32(reg->value, 0, 32, value);
-       reg->dirty = 1;
-       reg->valid = 1;
+       reg->dirty = true;
+       reg->valid = true;
 
        return ERROR_OK;
 }
@@ -208,8 +208,8 @@ static int mips32_read_core_reg(struct target *target, unsigned int num)
 
        reg_value = mips32->core_regs[num];
        buf_set_u32(mips32->core_cache->reg_list[num].value, 0, 32, reg_value);
-       mips32->core_cache->reg_list[num].valid = 1;
-       mips32->core_cache->reg_list[num].dirty = 0;
+       mips32->core_cache->reg_list[num].valid = true;
+       mips32->core_cache->reg_list[num].dirty = false;
 
        return ERROR_OK;
 }
@@ -227,8 +227,8 @@ static int mips32_write_core_reg(struct target *target, unsigned int num)
        reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32);
        mips32->core_regs[num] = reg_value;
        LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
-       mips32->core_cache->reg_list[num].valid = 1;
-       mips32->core_cache->reg_list[num].dirty = 0;
+       mips32->core_cache->reg_list[num].valid = true;
+       mips32->core_cache->reg_list[num].dirty = false;
 
        return ERROR_OK;
 }
@@ -336,12 +336,12 @@ struct reg_cache *mips32_build_reg_cache(struct target *target)
 
                if (mips32_regs[i].flag == MIPS32_GDB_DUMMY_FP_REG) {
                        reg_list[i].value = mips32_gdb_dummy_fp_value;
-                       reg_list[i].valid = 1;
+                       reg_list[i].valid = true;
                        reg_list[i].arch_info = NULL;
                        register_init_dummy(&reg_list[i]);
                } else {
                        reg_list[i].value = calloc(1, 4);
-                       reg_list[i].valid = 0;
+                       reg_list[i].valid = false;
                        reg_list[i].type = &mips32_reg_type;
                        reg_list[i].arch_info = &arch_info[i];
 
@@ -352,7 +352,7 @@ struct reg_cache *mips32_build_reg_cache(struct target *target)
                                LOG_ERROR("unable to allocate reg type list");
                }
 
-               reg_list[i].dirty = 0;
+               reg_list[i].dirty = false;
 
                reg_list[i].group = mips32_regs[i].group;
                reg_list[i].number = i;
@@ -375,6 +375,7 @@ int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, s
        target->arch_info = mips32;
        mips32->common_magic = MIPS32_COMMON_MAGIC;
        mips32->fast_data_area = NULL;
+       mips32->isa_imp = MIPS32_ONLY;  /* default */
 
        /* has breakpoint/watchpoint unit been scanned */
        mips32->bp_scanned = 0;
@@ -388,7 +389,7 @@ int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, s
        mips32->ejtag_info.scan_delay = MIPS32_SCAN_DELAY_LEGACY_MODE;
        mips32->ejtag_info.mode = 0;                    /* Initial default value */
        mips32->ejtag_info.isa = 0;     /* isa on debug mips32, updated by poll function */
-
+       mips32->ejtag_info.config_regs = 0;     /* no config register read */
        return ERROR_OK;
 }
 
@@ -460,6 +461,8 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
        }
 
        for (int i = 0; i < num_mem_params; i++) {
+               if (mem_params[i].direction == PARAM_IN)
+                       continue;
                retval = target_write_buffer(target, mem_params[i].address,
                                mem_params[i].size, mem_params[i].value);
                if (retval != ERROR_OK)
@@ -467,6 +470,9 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
        }
 
        for (int i = 0; i < num_reg_params; i++) {
+               if (reg_params[i].direction == PARAM_IN)
+                       continue;
+
                struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0);
 
                if (!reg) {
@@ -526,8 +532,8 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
                                mips32->core_cache->reg_list[i].name, context[i]);
                        buf_set_u32(mips32->core_cache->reg_list[i].value,
                                        0, 32, context[i]);
-                       mips32->core_cache->reg_list[i].valid = 1;
-                       mips32->core_cache->reg_list[i].dirty = 1;
+                       mips32->core_cache->reg_list[i].valid = true;
+                       mips32->core_cache->reg_list[i].dirty = true;
                }
        }
 
@@ -698,6 +704,50 @@ int mips32_enable_interrupts(struct target *target, int enable)
        return ERROR_OK;
 }
 
+/* read config to config3 cp0 registers and log isa implementation */
+int mips32_read_config_regs(struct target *target)
+{
+       struct mips32_common *mips32 = target_to_mips32(target);
+       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
+
+       if (ejtag_info->config_regs == 0)
+               for (int i = 0; i != 4; i++) {
+                       int retval = mips32_cp0_read(ejtag_info, &ejtag_info->config[i], 16, i);
+                       if (retval != ERROR_OK) {
+                               LOG_ERROR("isa info not available, failed to read cp0 config register: %" PRId32, i);
+                               ejtag_info->config_regs = 0;
+                               return retval;
+                       }
+                       ejtag_info->config_regs = i + 1;
+                       if ((ejtag_info->config[i] & (1 << 31)) == 0)
+                               break;  /* no more config registers implemented */
+               }
+       else
+               return ERROR_OK;        /* already succesfully read */
+
+       LOG_DEBUG("read  %"PRId32" config registers", ejtag_info->config_regs);
+
+       if (ejtag_info->impcode & EJTAG_IMP_MIPS16) {
+               mips32->isa_imp = MIPS32_MIPS16;
+               LOG_USER("MIPS32 with MIPS16 support implemented");
+
+       } else if (ejtag_info->config_regs >= 4) {      /* config3 implemented */
+               unsigned isa_imp = (ejtag_info->config[3] & MIPS32_CONFIG3_ISA_MASK) >> MIPS32_CONFIG3_ISA_SHIFT;
+               if (isa_imp == 1) {
+                       mips32->isa_imp = MMIPS32_ONLY;
+                       LOG_USER("MICRO MIPS32 only implemented");
+
+               } else if (isa_imp != 0) {
+                       mips32->isa_imp = MIPS32_MMIPS32;
+                       LOG_USER("MIPS32 and MICRO MIPS32 implemented");
+               }
+       }
+
+       if (mips32->isa_imp == MIPS32_ONLY)     /* initial default value */
+               LOG_USER("MIPS32 only implemented");
+
+       return ERROR_OK;
+}
 int mips32_checksum_memory(struct target *target, target_addr_t address,
                uint32_t count, uint32_t *checksum)
 {
@@ -756,7 +806,7 @@ int mips32_checksum_memory(struct target *target, target_addr_t address,
                return retval;
 
        mips32_info.common_magic = MIPS32_COMMON_MAGIC;
-       mips32_info.isa_mode = MIPS32_ISA_MIPS32;
+       mips32_info.isa_mode = isa ? MIPS32_ISA_MMIPS32 : MIPS32_ISA_MIPS32;    /* run isa as in debug mode */
 
        init_reg_param(&reg_params[0], "r4", 32, PARAM_IN_OUT);
        buf_set_u32(reg_params[0].value, 0, 32, address);
@@ -766,11 +816,8 @@ int mips32_checksum_memory(struct target *target, target_addr_t address,
 
        int timeout = 20000 * (1 + (count / (1024 * 1024)));
 
-       /* same isa as in debug mode */
-       retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
-                       crc_algorithm->address | isa,
-                       (crc_algorithm->address + (sizeof(mips_crc_code) - 4)) | isa,
-                       timeout, &mips32_info);
+       retval = target_run_algorithm(target, 0, NULL, 2, reg_params, crc_algorithm->address,
+                                     crc_algorithm->address + (sizeof(mips_crc_code) - 4), timeout, &mips32_info);
 
        if (retval == ERROR_OK)
                *checksum = buf_get_u32(reg_params[0].value, 0, 32);
@@ -785,7 +832,8 @@ int mips32_checksum_memory(struct target *target, target_addr_t address,
 
 /** Checks whether a memory region is erased. */
 int mips32_blank_check_memory(struct target *target,
-               target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value)
+               struct target_memory_check_block *blocks, int num_blocks,
+               uint8_t erased_value)
 {
        struct working_area *erase_check_algorithm;
        struct reg_param reg_params[3];
@@ -824,43 +872,44 @@ int mips32_blank_check_memory(struct target *target,
        int retval = target_write_buffer(target, erase_check_algorithm->address,
                                                sizeof(erase_check_code), erase_check_code_8);
        if (retval != ERROR_OK)
-               return retval;
+               goto cleanup;
 
        mips32_info.common_magic = MIPS32_COMMON_MAGIC;
-       mips32_info.isa_mode = MIPS32_ISA_MIPS32;
+       mips32_info.isa_mode = isa ? MIPS32_ISA_MMIPS32 : MIPS32_ISA_MIPS32;
 
        init_reg_param(&reg_params[0], "r4", 32, PARAM_OUT);
-       buf_set_u32(reg_params[0].value, 0, 32, address);
+       buf_set_u32(reg_params[0].value, 0, 32, blocks[0].address);
 
        init_reg_param(&reg_params[1], "r5", 32, PARAM_OUT);
-       buf_set_u32(reg_params[1].value, 0, 32, count);
+       buf_set_u32(reg_params[1].value, 0, 32, blocks[0].size);
 
        init_reg_param(&reg_params[2], "r6", 32, PARAM_IN_OUT);
        buf_set_u32(reg_params[2].value, 0, 32, erased_value);
 
-       /* same isa as in debug mode */
-       retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
-                       erase_check_algorithm->address | isa,
-                       (erase_check_algorithm->address + (sizeof(erase_check_code) - 4)) | isa,
-                       10000, &mips32_info);
+       retval = target_run_algorithm(target, 0, NULL, 3, reg_params, erase_check_algorithm->address,
+                       erase_check_algorithm->address + (sizeof(erase_check_code) - 4), 10000, &mips32_info);
 
        if (retval == ERROR_OK)
-               *blank = buf_get_u32(reg_params[2].value, 0, 32);
+               blocks[0].result = buf_get_u32(reg_params[2].value, 0, 32);
 
        destroy_reg_param(&reg_params[0]);
        destroy_reg_param(&reg_params[1]);
        destroy_reg_param(&reg_params[2]);
 
+cleanup:
        target_free_working_area(target, erase_check_algorithm);
 
-       return retval;
+       if (retval != ERROR_OK)
+               return retval;
+
+       return 1;       /* only one block has been checked */
 }
 
-static int mips32_verify_pointer(struct command_context *cmd_ctx,
+static int mips32_verify_pointer(struct command_invocation *cmd,
                struct mips32_common *mips32)
 {
        if (mips32->common_magic != MIPS32_COMMON_MAGIC) {
-               command_print(cmd_ctx, "target is not an MIPS32");
+               command_print(cmd->ctx, "target is not an MIPS32");
                return ERROR_TARGET_INVALID;
        }
        return ERROR_OK;
@@ -878,7 +927,7 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
 
-       retval = mips32_verify_pointer(CMD_CTX, mips32);
+       retval = mips32_verify_pointer(CMD, mips32);
        if (retval != ERROR_OK)
                return retval;
 
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