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jtag newtap change & huge manual update
[openocd.git] / src / target / feroceon.c
diff --git a/src/target/feroceon.c b/src/target/feroceon.c
index c87320ae8cf1fce3c03eae2d24e8e9c4d08c8796..407ac52b6c5a6e6f655cfc292039e1e0f0e832d6 100644 (file)
--- a/src/target/feroceon.c
+++ b/src/target/feroceon.c
@@ -2,6 +2,9 @@
  *   Copyright (C) 2008 by Marvell Semiconductors, Inc.                    *
  *   Written by Nicolas Pitre <nico@marvell.com>                           *
  *                                                                         *
  *   Copyright (C) 2008 by Marvell Semiconductors, Inc.                    *
  *   Written by Nicolas Pitre <nico@marvell.com>                           *
  *                                                                         *
+ *   Copyright (C) 2008 by Hongtao Zheng                                   *
+ *   hontor@126.com                                                        *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -49,16 +52,28 @@
 #include "arm926ejs.h"
 #include "jtag.h"
 #include "log.h"
 #include "arm926ejs.h"
 #include "jtag.h"
 #include "log.h"
-#include "arm_simulator.h"
 
 #include <stdlib.h>
 #include <string.h>
 
 
 #include <stdlib.h>
 #include <string.h>
 
-int feroceon_examine(struct command_context_s *cmd_ctx, struct target_s *target);
-int feroceon_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
+int feroceon_examine(struct target_s *target);
+int feroceon_target_create(struct target_s *target, Jim_Interp *interp);
 int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
 int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
 int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
 int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int feroceon_quit();
+int feroceon_quit(void);
+
+int feroceon_assert_reset(target_t *target)
+{
+       armv4_5_common_t *armv4_5 = target->arch_info;
+       arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+       int ud = arm7_9->use_dbgrq;
+
+       arm7_9->use_dbgrq = 0;
+       if (target->reset_halt)
+               arm7_9_halt(target);
+       arm7_9->use_dbgrq = ud;
+       return arm7_9_assert_reset(target);
+}
 
 target_type_t feroceon_target =
 {
 
 target_type_t feroceon_target =
 {
@@ -73,7 +88,7 @@ target_type_t feroceon_target =
        .resume = arm7_9_resume,
        .step = arm7_9_step,
 
        .resume = arm7_9_resume,
        .step = arm7_9_step,
 
-       .assert_reset = arm7_9_assert_reset,
+       .assert_reset = feroceon_assert_reset,
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm926ejs_soft_reset_halt,
        
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm926ejs_soft_reset_halt,
        
@@ -93,7 +108,7 @@ target_type_t feroceon_target =
        .remove_watchpoint = arm7_9_remove_watchpoint,
 
        .register_commands = arm926ejs_register_commands,
        .remove_watchpoint = arm7_9_remove_watchpoint,
 
        .register_commands = arm926ejs_register_commands,
-       .target_command = feroceon_target_command,
+       .target_create = feroceon_target_create,
        .init_target = feroceon_init_target,
        .examine = feroceon_examine,
        .quit = feroceon_quit
        .init_target = feroceon_init_target,
        .examine = feroceon_examine,
        .quit = feroceon_quit
@@ -117,7 +132,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
        
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
                
        
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
                
-       fields[0].device = jtag_info->chain_pos;
+       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = out_buf;
        fields[0].out_mask = NULL;
        fields[0].num_bits = 32;
        fields[0].out_value = out_buf;
        fields[0].out_mask = NULL;
@@ -127,7 +142,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
        fields[0].in_check_value = NULL;
        fields[0].in_check_mask = NULL;
        
        fields[0].in_check_value = NULL;
        fields[0].in_check_mask = NULL;
        
-       fields[1].device = jtag_info->chain_pos;
+       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 3;
        fields[1].out_value = &sysspeed_buf;
        fields[1].out_mask = NULL;
        fields[1].num_bits = 3;
        fields[1].out_value = &sysspeed_buf;
        fields[1].out_mask = NULL;
@@ -137,7 +152,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
        fields[1].in_handler = NULL;
        fields[1].in_handler_priv = NULL;
                
        fields[1].in_handler = NULL;
        fields[1].in_handler_priv = NULL;
                
-       fields[2].device = jtag_info->chain_pos;
+       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 32;
        fields[2].out_value = instr_buf;
        fields[2].out_mask = NULL;
        fields[2].num_bits = 32;
        fields[2].out_value = instr_buf;
        fields[2].out_mask = NULL;
@@ -381,6 +396,7 @@ void feroceon_branch_resume_thumb(target_t *target)
        arm_jtag_t *jtag_info = &arm7_9->jtag_info;
        u32 r0 = buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32);
        u32 pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
        arm_jtag_t *jtag_info = &arm7_9->jtag_info;
        u32 r0 = buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32);
        u32 pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+       (void)(r0); // use R0... 
 
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
@@ -458,23 +474,10 @@ void feroceon_set_dbgrq(target_t *target)
        embeddedice_store_reg(dbg_ctrl);
 }
 
        embeddedice_store_reg(dbg_ctrl);
 }
 
-void feroceon_enable_single_step(target_t *target)
+void feroceon_enable_single_step(target_t *target, u32 next_pc)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
-       u32 next_pc;
-
-        /* calculate PC of next instruction */
-       if (arm_simulate_step(target, &next_pc) != ERROR_OK)
-       {
-               u32 current_pc, current_opcode;
-               current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
-               target_read_u32(target, current_pc, &current_opcode);
-               LOG_ERROR("BUG: couldn't calculate PC of next instruction, "
-                     "current opcode is 0x%8.8x", current_opcode);
-               next_pc = current_pc;
-       }
-       arm7_9_restore_context(target);
 
        /* set a breakpoint there */
        embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_VALUE], next_pc);
 
        /* set a breakpoint there */
        embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_VALUE], next_pc);
@@ -509,6 +512,7 @@ int feroceon_examine_debug_reason(target_t *target)
 
 int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer)
 {
 
 int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer)
 {
+       int retval;
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        enum armv4_5_state core_state = armv4_5->core_state;
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        enum armv4_5_state core_state = armv4_5->core_state;
@@ -565,7 +569,10 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
                        target_buffer_set_u32(target, dcc_code_buf + i*4, dcc_code[i]);
 
                /* write DCC code to working area */
                        target_buffer_set_u32(target, dcc_code_buf + i*4, dcc_code[i]);
 
                /* write DCC code to working area */
-               target->type->write_memory(target, arm7_9->dcc_working_area->address, 4, dcc_size, dcc_code_buf);
+               if((retval = target->type->write_memory(target, arm7_9->dcc_working_area->address, 4, dcc_size, dcc_code_buf)) != ERROR_OK)
+               {
+                       return retval;
+               }
        }
 
        /* backup clobbered processor state */
        }
 
        /* backup clobbered processor state */
@@ -627,34 +634,18 @@ int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
        return ERROR_OK;
 }
 
        return ERROR_OK;
 }
 
-int feroceon_quit()
+int feroceon_quit(void)
 {
        return ERROR_OK;
 }
 
 {
        return ERROR_OK;
 }
 
-int feroceon_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target)
+int feroceon_target_create(struct target_s *target, Jim_Interp *interp)
 {
 {
-       int chain_pos;
-       char *variant = NULL;
        armv4_5_common_t *armv4_5;
        arm7_9_common_t *arm7_9;
        armv4_5_common_t *armv4_5;
        arm7_9_common_t *arm7_9;
-       arm926ejs_common_t *arm926ejs = malloc(sizeof(arm926ejs_common_t));
-       memset(arm926ejs, 0, sizeof(*arm926ejs));
-       
-       if (argc < 4)
-       {
-               LOG_ERROR("'target arm926ejs' requires at least one additional argument");
-               exit(-1);
-       }
-       
-       chain_pos = strtoul(args[3], NULL, 0);
-       
-       if (argc >= 5)
-               variant = args[4];
-       
-       LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
-       
-       arm926ejs_init_arch_info(target, arm926ejs, chain_pos, variant);
+       arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t));
+  
+       arm926ejs_init_arch_info(target, arm926ejs, target->tap, target->variant);
 
        armv4_5 = target->arch_info;
        arm7_9 = armv4_5->arch_info;
 
        armv4_5 = target->arch_info;
        arm7_9 = armv4_5->arch_info;
@@ -687,20 +678,20 @@ int feroceon_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
        arm7_9->set_special_dbgrq = feroceon_set_dbgrq;
 
        /* only one working comparator */
        arm7_9->set_special_dbgrq = feroceon_set_dbgrq;
 
        /* only one working comparator */
-       arm7_9->wp_available = 1; 
-       arm7_9->wp1_used = -1; 
+       arm7_9->wp_available_max = 1; 
+       arm7_9->wp1_used_default = -1; 
 
        return ERROR_OK;
 }
 
 
 
        return ERROR_OK;
 }
 
 
-int feroceon_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+int feroceon_examine(struct target_s *target)
 {
        armv4_5_common_t *armv4_5;
        arm7_9_common_t *arm7_9;
        int retval;
 
 {
        armv4_5_common_t *armv4_5;
        arm7_9_common_t *arm7_9;
        int retval;
 
-       retval = arm9tdmi_examine(cmd_ctx, target);
+       retval = arm9tdmi_examine(target);
        if (retval!=ERROR_OK)
                return retval;
                        
        if (retval!=ERROR_OK)
                return retval;
                        
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