jtag newtap change & huge manual update

[openocd.git] / src / target / feroceon.c

diff --git a/src/target/feroceon.c b/src/target/feroceon.c
index 7388307dff11b71131ae7d7902087623a98adaab..407ac52b6c5a6e6f655cfc292039e1e0f0e832d6 100644 (file)
--- a/src/target/feroceon.c
+++ b/src/target/feroceon.c
@@ -2,6 +2,9 @@
  *   Copyright (C) 2008 by Marvell Semiconductors, Inc.                    *
  *   Written by Nicolas Pitre <nico@marvell.com>                           *
  *                                                                         *
+ *   Copyright (C) 2008 by Hongtao Zheng                                   *
+ *   hontor@126.com                                                        *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -49,7 +52,6 @@
 #include "arm926ejs.h"
 #include "jtag.h"
 #include "log.h"
-#include "arm_simulator.h"
 
 #include <stdlib.h>
 #include <string.h>
@@ -130,7 +132,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
        
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
                
-       fields[0].device = jtag_info->chain_pos;
+       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = out_buf;
        fields[0].out_mask = NULL;
@@ -140,7 +142,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
        fields[0].in_check_value = NULL;
        fields[0].in_check_mask = NULL;
        
-       fields[1].device = jtag_info->chain_pos;
+       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 3;
        fields[1].out_value = &sysspeed_buf;
        fields[1].out_mask = NULL;
@@ -150,7 +152,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
        fields[1].in_handler = NULL;
        fields[1].in_handler_priv = NULL;
                
-       fields[2].device = jtag_info->chain_pos;
+       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 32;
        fields[2].out_value = instr_buf;
        fields[2].out_mask = NULL;
@@ -472,23 +474,10 @@ void feroceon_set_dbgrq(target_t *target)
        embeddedice_store_reg(dbg_ctrl);
 }
 
-void feroceon_enable_single_step(target_t *target)
+void feroceon_enable_single_step(target_t *target, u32 next_pc)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
-       u32 next_pc;
-
-        /* calculate PC of next instruction */
-       if (arm_simulate_step(target, &next_pc) != ERROR_OK)
-       {
-               u32 current_pc, current_opcode;
-               current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
-               target_read_u32(target, current_pc, &current_opcode);
-               LOG_ERROR("BUG: couldn't calculate PC of next instruction, "
-                     "current opcode is 0x%8.8x", current_opcode);
-               next_pc = current_pc;
-       }
-       arm7_9_restore_context(target);
 
        /* set a breakpoint there */
        embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_VALUE], next_pc);
@@ -523,6 +512,7 @@ int feroceon_examine_debug_reason(target_t *target)
 
 int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer)
 {
+       int retval;
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        enum armv4_5_state core_state = armv4_5->core_state;
@@ -579,7 +569,10 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
                        target_buffer_set_u32(target, dcc_code_buf + i*4, dcc_code[i]);
 
                /* write DCC code to working area */
-               target->type->write_memory(target, arm7_9->dcc_working_area->address, 4, dcc_size, dcc_code_buf);
+               if((retval = target->type->write_memory(target, arm7_9->dcc_working_area->address, 4, dcc_size, dcc_code_buf)) != ERROR_OK)
+               {
+                       return retval;
+               }
        }
 
        /* backup clobbered processor state */
@@ -652,7 +645,7 @@ int feroceon_target_create(struct target_s *target, Jim_Interp *interp)
        arm7_9_common_t *arm7_9;
        arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t));
   
-       arm926ejs_init_arch_info(target, arm926ejs, target->chain_position, target->variant);
+       arm926ejs_init_arch_info(target, arm926ejs, target->tap, target->variant);
 
        armv4_5 = target->arch_info;
        arm7_9 = armv4_5->arch_info;