#include "config.h"
#endif
-#include "armv4_5.h"
+#include "arm.h"
#include "etm.h"
#include "etb.h"
#include "image.h"
#include "arm_disassembler.h"
#include "register.h"
+#include "etm_dummy.h"
+
+#if BUILD_OOCD_TRACE == 1
+#include "oocd_trace.h"
+#endif
/*
}
-/* ETM trace analysis functionality
- *
- */
-extern struct etm_capture_driver etm_dummy_capture_driver;
-#if BUILD_OOCD_TRACE == 1
-extern struct etm_capture_driver oocd_trace_capture_driver;
-#endif
+/* ETM trace analysis functionality */
static struct etm_capture_driver *etm_capture_drivers[] =
{
return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
}
- if (ctx->core_state == ARMV4_5_STATE_ARM)
+ if (ctx->core_state == ARM_STATE_ARM)
{
uint8_t buf[4];
if ((retval = image_read_section(ctx->image, section,
opcode = target_buffer_get_u32(ctx->target, buf);
arm_evaluate_opcode(opcode, ctx->current_pc, instruction);
}
- else if (ctx->core_state == ARMV4_5_STATE_THUMB)
+ else if (ctx->core_state == ARM_STATE_THUMB)
{
uint8_t buf[2];
if ((retval = image_read_section(ctx->image, section,
opcode = target_buffer_get_u16(ctx->target, buf);
thumb_evaluate_opcode(opcode, ctx->current_pc, instruction);
}
- else if (ctx->core_state == ARMV4_5_STATE_JAZELLE)
+ else if (ctx->core_state == ARM_STATE_JAZELLE)
{
LOG_ERROR("BUG: tracing of jazelle code not supported");
return ERROR_FAIL;
/* if a full address was output, we might have branched into Jazelle state */
if ((shift == 32) && (packet & 0x80))
{
- ctx->core_state = ARMV4_5_STATE_JAZELLE;
+ ctx->core_state = ARM_STATE_JAZELLE;
}
else
{
* encoded in bit 0 of the branch target address */
if (ctx->last_branch & 0x1)
{
- ctx->core_state = ARMV4_5_STATE_THUMB;
+ ctx->core_state = ARM_STATE_THUMB;
ctx->last_branch &= ~0x1;
}
else
{
- ctx->core_state = ARMV4_5_STATE_ARM;
+ ctx->core_state = ARM_STATE_ARM;
ctx->last_branch &= ~0x3;
}
}
}
else
{
- next_pc += (ctx->core_state == ARMV4_5_STATE_ARM) ? 4 : 2;
+ next_pc += (ctx->core_state == ARM_STATE_ARM) ? 4 : 2;
}
}
else if (pipestat == STAT_IN)
{
- next_pc += (ctx->core_state == ARMV4_5_STATE_ARM) ? 4 : 2;
+ next_pc += (ctx->core_state == ARM_STATE_ARM) ? 4 : 2;
}
if ((pipestat != STAT_TD) && (pipestat != STAT_WT))
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "target '%s' is '%s'; not an ARM",
- target->cmd_name, target_get_name(target));
+ target_name(target),
+ target_type_name(target));
return ERROR_FAIL;
}
}
etm_ctx->target = target;
- etm_ctx->trigger_percent = 50;
etm_ctx->trace_data = NULL;
etm_ctx->portmode = portmode;
- etm_ctx->core_state = ARMV4_5_STATE_ARM;
+ etm_ctx->core_state = ARM_STATE_ARM;
arm->etm = etm_ctx;
return ERROR_OK;
}
-COMMAND_HANDLER(handle_etm_trigger_percent_command)
-{
- struct target *target;
- struct arm *arm;
- struct etm_context *etm_ctx;
-
- target = get_current_target(CMD_CTX);
- arm = target_to_arm(target);
- if (!is_arm(arm))
- {
- command_print(CMD_CTX, "ETM: current target isn't an ARM");
- return ERROR_FAIL;
- }
-
- etm_ctx = arm->etm;
- if (!etm_ctx)
- {
- command_print(CMD_CTX, "current target doesn't have an ETM configured");
- return ERROR_FAIL;
- }
-
- if (CMD_ARGC > 0)
- {
- uint32_t new_value;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], new_value);
-
- if ((new_value < 2) || (new_value > 100))
- {
- command_print(CMD_CTX, "valid settings are 2%% to 100%%");
- }
- else
- {
- etm_ctx->trigger_percent = new_value;
- }
- }
-
- command_print(CMD_CTX, "%i percent of the tracebuffer reserved for after the trigger", ((int)(etm_ctx->trigger_percent)));
-
- return ERROR_OK;
-}
-
COMMAND_HANDLER(handle_etm_start_command)
{
struct target *target;
.mode = COMMAND_EXEC,
.help = "display info about the current target's ETM",
},
- {
- .name = "trigger_percent",
- .handler = &handle_etm_trigger_percent_command,
- .mode = COMMAND_EXEC,
- .help = "amount (<percent>) of trace buffer "
- "to be filled after the trigger occured",
- },
{
.name = "status",
.handler = &handle_etm_status_command,