ETM trigger_percent becomes an ETB command

[openocd.git] / src / target / etb.c

diff --git a/src/target/etb.c b/src/target/etb.c
index b698151347834c22ac511ad9951da118df5e30b0..a789777baa64e8f6bce650f3e124b78746c7c160 100644 (file)
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -21,8 +21,10 @@
 #include "config.h"
 #endif
 
-#include "armv4_5.h"
+#include "arm.h"
+#include "etm.h"
 #include "etb.h"
+#include "register.h"
 
 
 static char* etb_reg_list[] =
@@ -38,8 +40,6 @@ static char* etb_reg_list[] =
        "ETB_control",
 };
 
-static int etb_reg_arch_type = -1;
-
 static int etb_get_reg(struct reg *reg);
 
 static int etb_set_instr(struct etb *etb, uint32_t new_instr)
@@ -56,7 +56,7 @@ static int etb_set_instr(struct etb *etb, uint32_t new_instr)
 
                field.tap = tap;
                field.num_bits = tap->ir_length;
-               field.out_value = calloc(CEIL(field.num_bits, 8), 1);
+               field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
                buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
 
                field.in_value = NULL;
@@ -77,7 +77,7 @@ static int etb_scann(struct etb *etb, uint32_t new_scan_chain)
 
                field.tap = etb->tap;
                field.num_bits = 5;
-               field.out_value = calloc(CEIL(field.num_bits, 8), 1);
+               field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
                buf_set_u32(field.out_value, 0, field.num_bits, new_scan_chain);
 
                field.in_value = NULL;
@@ -121,6 +121,11 @@ static int etb_get_reg(struct reg *reg)
        return ERROR_OK;
 }
 
+static const struct reg_arch_type etb_reg_type = {
+       .get = etb_get_reg,
+       .set = etb_set_reg_w_exec,
+};
+
 struct reg_cache* etb_build_reg_cache(struct etb *etb)
 {
        struct reg_cache *reg_cache = malloc(sizeof(struct reg_cache));
@@ -129,10 +134,6 @@ struct reg_cache* etb_build_reg_cache(struct etb *etb)
        int num_regs = 9;
        int i;
 
-       /* register a register arch-type for etm registers only once */
-       if (etb_reg_arch_type == -1)
-               etb_reg_arch_type = register_reg_arch_type(etb_get_reg, etb_set_reg_w_exec);
-
        /* the actual registers are kept in two arrays */
        reg_list = calloc(num_regs, sizeof(struct reg));
        arch_info = calloc(num_regs, sizeof(struct etb_reg));
@@ -150,11 +151,9 @@ struct reg_cache* etb_build_reg_cache(struct etb *etb)
                reg_list[i].size = 32;
                reg_list[i].dirty = 0;
                reg_list[i].valid = 0;
-               reg_list[i].bitfield_desc = NULL;
-               reg_list[i].num_bitfields = 0;
                reg_list[i].value = calloc(1, 4);
                reg_list[i].arch_info = &arch_info[i];
-               reg_list[i].arch_type = etb_reg_arch_type;
+               reg_list[i].type = &etb_reg_type;
                reg_list[i].size = 32;
                arch_info[i].addr = i;
                arch_info[i].etb = etb;
@@ -355,30 +354,30 @@ COMMAND_HANDLER(handle_etb_config_command)
        struct jtag_tap *tap;
        struct arm *arm;
 
-       if (argc != 2)
+       if (CMD_ARGC != 2)
        {
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
-       target = get_target(args[0]);
+       target = get_target(CMD_ARGV[0]);
 
        if (!target)
        {
-               LOG_ERROR("ETB: target '%s' not defined", args[0]);
+               LOG_ERROR("ETB: target '%s' not defined", CMD_ARGV[0]);
                return ERROR_FAIL;
        }
 
        arm = target_to_arm(target);
        if (!is_arm(arm))
        {
-               command_print(cmd_ctx, "ETB: '%s' isn't an ARM", args[0]);
+               command_print(CMD_CTX, "ETB: '%s' isn't an ARM", CMD_ARGV[0]);
                return ERROR_FAIL;
        }
 
-       tap = jtag_tap_by_string(args[1]);
+       tap = jtag_tap_by_string(CMD_ARGV[1]);
        if (tap == NULL)
        {
-               command_print(cmd_ctx, "ETB: TAP %s does not exist", args[1]);
+               command_print(CMD_CTX, "ETB: TAP %s does not exist", CMD_ARGV[1]);
                return ERROR_FAIL;
        }
 
@@ -403,18 +402,76 @@ COMMAND_HANDLER(handle_etb_config_command)
        return ERROR_OK;
 }
 
-static int etb_register_commands(struct command_context_s *cmd_ctx)
+COMMAND_HANDLER(handle_etb_trigger_percent_command)
 {
-       command_t *etb_cmd = register_command(cmd_ctx, NULL, "etb",
-                       NULL, COMMAND_ANY, "Embedded Trace Buffer");
+       struct target *target;
+       struct arm *arm;
+       struct etm_context *etm;
+       struct etb *etb;
+
+       target = get_current_target(CMD_CTX);
+       arm = target_to_arm(target);
+       if (!is_arm(arm))
+       {
+               command_print(CMD_CTX, "ETB: current target isn't an ARM");
+               return ERROR_FAIL;
+       }
+
+       etm = arm->etm;
+       if (!etm) {
+               command_print(CMD_CTX, "ETB: target has no ETM configured");
+               return ERROR_FAIL;
+       }
+       if (etm->capture_driver != &etb_capture_driver) {
+               command_print(CMD_CTX, "ETB: target not using ETB");
+               return ERROR_FAIL;
+       }
+       etb = arm->etm->capture_driver_priv;
+
+       if (CMD_ARGC > 0) {
+               uint32_t new_value;
+
+               COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], new_value);
+               if ((new_value < 2) || (new_value > 100))
+                       command_print(CMD_CTX,
+                               "valid percentages are 2%% to 100%%");
+               else
+                       etb->trigger_percent = (unsigned) new_value;
+       }
 
-       register_command(cmd_ctx, etb_cmd, "config",
-                       handle_etb_config_command, COMMAND_CONFIG,
-                       NULL);
+       command_print(CMD_CTX, "%d percent of tracebuffer fills after trigger",
+                       etb->trigger_percent);
 
        return ERROR_OK;
 }
 
+static const struct command_registration etb_config_command_handlers[] = {
+       {
+               .name = "config",
+               .handler = &handle_etb_config_command,
+               .mode = COMMAND_CONFIG,
+               .usage = "target tap",
+       },
+       {
+               .name = "trigger_percent",
+               .handler = &handle_etb_trigger_percent_command,
+               .mode = COMMAND_EXEC,
+               .help = "percent of trace buffer to be filled "
+                       "after the trigger occurs",
+               .usage = "[percent]",
+       },
+       COMMAND_REGISTRATION_DONE
+};
+static const struct command_registration etb_command_handlers[] = {
+       {
+               .name = "etb",
+               .mode = COMMAND_ANY,
+               .help = "Emebdded Trace Buffer command group",
+               .chain = etb_config_command_handlers,
+       },
+       COMMAND_REGISTRATION_DONE
+};
+
 static int etb_init(struct etm_context *etm_ctx)
 {
        struct etb *etb = etm_ctx->capture_driver_priv;
@@ -429,6 +486,8 @@ static int etb_init(struct etm_context *etm_ctx)
        etb->ram_depth = buf_get_u32(etb->reg_cache->reg_list[ETB_RAM_DEPTH].value, 0, 32);
        etb->ram_width = buf_get_u32(etb->reg_cache->reg_list[ETB_RAM_WIDTH].value, 0, 32);
 
+       etb->trigger_percent = 50;
+
        return ERROR_OK;
 }
 
@@ -655,7 +714,7 @@ static int etb_start_capture(struct etm_context *etm_ctx)
                return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
        }
 
-       trigger_count = (etb->ram_depth * etm_ctx->trigger_percent) / 100;
+       trigger_count = (etb->ram_depth * etb->trigger_percent) / 100;
 
        etb_write_reg(&etb->reg_cache->reg_list[ETB_TRIGGER_COUNTER], trigger_count);
        etb_write_reg(&etb->reg_cache->reg_list[ETB_RAM_WRITE_POINTER], 0x0);
@@ -685,7 +744,7 @@ static int etb_stop_capture(struct etm_context *etm_ctx)
 struct etm_capture_driver etb_capture_driver =
 {
        .name = "etb",
-       .register_commands = etb_register_commands,
+       .commands = etb_command_handlers,
        .init = etb_init,
        .status = etb_status,
        .start_capture = etb_start_capture,