Revert "cortex_m3: add auto maskisr"
[openocd.git] / src / target / cortex_m3.c
index f2947ad..9c3d2d9 100644 (file)
  * any longer.
  */
 
+/**
+ * Returns the type of a break point required by address location
+ */
+#define BKPT_TYPE_BY_ADDR(addr) ((addr) < 0x20000000 ? BKPT_HARD : BKPT_SOFT)
+
 
 /* forward declarations */
 static int cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint);
@@ -864,10 +869,11 @@ static int cortex_m3_step(struct target *target, int current,
        if (!current)
                buf_set_u32(pc->value, 0, 32, address);
 
+       uint32_t pc_value = buf_get_u32(pc->value, 0, 32);
+
        /* the front-end may request us not to handle breakpoints */
        if (handle_breakpoints) {
-               breakpoint = breakpoint_find(target,
-                               buf_get_u32(pc->value, 0, 32));
+               breakpoint = breakpoint_find(target, pc_value);
                if (breakpoint)
                        cortex_m3_unset_breakpoint(target, breakpoint);
        }
@@ -927,14 +933,14 @@ static int cortex_m3_assert_reset(struct target *target)
 
        enum reset_types jtag_reset_config = jtag_get_reset_config();
 
-       /*
-        * We can reset Cortex-M3 targets using just the NVIC without
-        * requiring SRST, getting a SoC reset (or a core-only reset)
-        * instead of a system reset.
-        */
-       if (!(jtag_reset_config & RESET_HAS_SRST) &&
-                       (cortex_m3->soft_reset_config == CORTEX_M3_RESET_SRST)) {
-               reset_config = CORTEX_M3_RESET_VECTRESET;
+       if (target_has_event_action(target, TARGET_EVENT_RESET_ASSERT)) {
+               /* allow scripts to override the reset event */
+
+               target_handle_event(target, TARGET_EVENT_RESET_ASSERT);
+               register_cache_invalidate(cortex_m3->armv7m.core_cache);
+               target->state = TARGET_RESET;
+
+               return ERROR_OK;
        }
 
        /* Enable debug requests */
@@ -984,7 +990,7 @@ static int cortex_m3_assert_reset(struct target *target)
                        return retval;
        }
 
-       if (reset_config == CORTEX_M3_RESET_SRST)
+       if (jtag_reset_config & RESET_HAS_SRST)
        {
                /* default to asserting srst */
                if (jtag_reset_config & RESET_SRST_PULLS_TRST)
@@ -1071,7 +1077,7 @@ cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
 
        if (cortex_m3->auto_bp_type)
        {
-               breakpoint->type = (breakpoint->address < 0x20000000) ? BKPT_HARD : BKPT_SOFT;
+               breakpoint->type = BKPT_TYPE_BY_ADDR(breakpoint->address);
        }
 
        if (breakpoint->type == BKPT_HARD)
@@ -1191,7 +1197,7 @@ cortex_m3_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 
        if (cortex_m3->auto_bp_type)
        {
-               breakpoint->type = (breakpoint->address < 0x20000000) ? BKPT_HARD : BKPT_SOFT;
+               breakpoint->type = BKPT_TYPE_BY_ADDR(breakpoint->address);
 #ifdef ARMV7_GDB_HACKS
                if (breakpoint->length != 2) {
                        /* XXX Hack: Replace all breakpoints with length != 2 with
@@ -1202,16 +1208,18 @@ cortex_m3_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 #endif
        }
 
-       if ((breakpoint->type == BKPT_HARD) && (breakpoint->address >= 0x20000000))
-       {
-               LOG_INFO("flash patch comparator requested outside code memory region");
-               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       }
+       if(breakpoint->type != BKPT_TYPE_BY_ADDR(breakpoint->address)) {
+               if (breakpoint->type == BKPT_HARD)
+               {
+                       LOG_INFO("flash patch comparator requested outside code memory region");
+                       return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+               }
 
-       if ((breakpoint->type == BKPT_SOFT) && (breakpoint->address < 0x20000000))
-       {
-               LOG_INFO("soft breakpoint requested in code (flash) memory region");
-               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+               if (breakpoint->type == BKPT_SOFT)
+               {
+                       LOG_INFO("soft breakpoint requested in code (flash) memory region");
+                       return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+               }
        }
 
        if ((breakpoint->type == BKPT_HARD) && (cortex_m3->fp_code_available < 1))
@@ -1246,7 +1254,7 @@ cortex_m3_remove_breakpoint(struct target *target, struct breakpoint *breakpoint
 
        if (cortex_m3->auto_bp_type)
        {
-               breakpoint->type = (breakpoint->address < 0x20000000) ? BKPT_HARD : BKPT_SOFT;
+               breakpoint->type = BKPT_TYPE_BY_ADDR(breakpoint->address);
        }
 
        if (breakpoint->set)
@@ -1543,7 +1551,7 @@ static int cortex_m3_store_core_reg_u32(struct target *target,
                {
                        struct reg *r;
 
-                       LOG_ERROR("JTAG failure %i", retval);
+                       LOG_ERROR("JTAG failure");
                        r = armv7m->core_cache->reg_list + num;
                        r->dirty = r->valid;
                        return ERROR_JTAG_DEVICE_ERROR;
@@ -1618,7 +1626,7 @@ static int cortex_m3_read_memory(struct target *target, uint32_t address,
 }
 
 static int cortex_m3_write_memory(struct target *target, uint32_t address,
-               uint32_t size, uint32_t count, uint8_t *buffer)
+               uint32_t size, uint32_t count, const uint8_t *buffer)
 {
        struct armv7m_common *armv7m = target_to_armv7m(target);
        struct adiv5_dap *swjdp = &armv7m->dap;
@@ -1642,7 +1650,7 @@ static int cortex_m3_write_memory(struct target *target, uint32_t address,
 }
 
 static int cortex_m3_bulk_write_memory(struct target *target, uint32_t address,
-               uint32_t count, uint8_t *buffer)
+               uint32_t count, const uint8_t *buffer)
 {
        return cortex_m3_write_memory(target, address, 4, count, buffer);
 }
@@ -1945,7 +1953,7 @@ static int cortex_m3_init_arch_info(struct target *target,
 
        /* default reset mode is to use srst if fitted
         * if not it will use CORTEX_M3_RESET_VECTRESET */
-       cortex_m3->soft_reset_config = CORTEX_M3_RESET_SRST;
+       cortex_m3->soft_reset_config = CORTEX_M3_RESET_VECTRESET;
 
        armv7m->arm.dap = &armv7m->dap;
 
@@ -2138,16 +2146,10 @@ COMMAND_HANDLER(handle_cortex_m3_reset_config_command)
                        cortex_m3->soft_reset_config = CORTEX_M3_RESET_SYSRESETREQ;
                else if (strcmp(*CMD_ARGV, "vectreset") == 0)
                        cortex_m3->soft_reset_config = CORTEX_M3_RESET_VECTRESET;
-               else
-                       cortex_m3->soft_reset_config = CORTEX_M3_RESET_SRST;
        }
 
        switch (cortex_m3->soft_reset_config)
        {
-               case CORTEX_M3_RESET_SRST:
-                       reset_config = "srst";
-                       break;
-
                case CORTEX_M3_RESET_SYSRESETREQ:
                        reset_config = "sysresetreq";
                        break;