Support for debugging on ARMv8-M CPUs

[openocd.git] / src / target / cortex_m.h

diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 94a30f1a69b36d2d61b0a455d2070210a9f5de2d..54d7a02287ea25dc672f90b955368509c22af58a 100644 (file)
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -19,13 +19,11 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
-#ifndef CORTEX_M_H
-#define CORTEX_M_H
+#ifndef OPENOCD_TARGET_CORTEX_M_H
+#define OPENOCD_TARGET_CORTEX_M_H
 
 #include "armv7m.h"
 
@@ -40,6 +38,12 @@
 #define ITM_LAR_KEY    0xC5ACCE55
 
 #define CPUID          0xE000ED00
+
+#define ARM_CPUID_PARTNO_MASK  0xFFF0
+
+#define CORTEX_M23_PARTNO      0xD200
+#define CORTEX_M33_PARTNO      0xD210
+
 /* Debug Control Block */
 #define DCB_DHCSR      0xE000EDF0
 #define DCB_DCRSR      0xE000EDF4
@@ -50,9 +54,13 @@
 
 #define DWT_CTRL       0xE0001000
 #define DWT_CYCCNT     0xE0001004
+#define DWT_PCSR       0xE000101C
 #define DWT_COMP0      0xE0001020
 #define DWT_MASK0      0xE0001024
 #define DWT_FUNCTION0  0xE0001028
+#define DWT_DEVARCH            0xE0001FBC
+
+#define DWT_DEVARCH_ARMV8M     0x101A02
 
 #define FP_CTRL                0xE0002000
 #define FP_REMAP       0xE0002004
@@ -128,6 +136,7 @@
 #define DFSR_BKPT                      2
 #define DFSR_DWTTRAP           4
 #define DFSR_VCATCH                    8
+#define DFSR_EXTERNAL          16
 
 #define FPCR_CODE 0
 #define FPCR_LITERAL 1
@@ -137,14 +146,14 @@
 #define FPCR_REPLACE_BKPT_BOTH  (3 << 30)
 
 struct cortex_m_fp_comparator {
-       int used;
+       bool used;
        int type;
        uint32_t fpcr_value;
        uint32_t fpcr_address;
 };
 
 struct cortex_m_dwt_comparator {
-       int used;
+       bool used;
        uint32_t comp;
        uint32_t mask;
        uint32_t function;
@@ -160,11 +169,11 @@ enum cortex_m_isrmasking_mode {
        CORTEX_M_ISRMASK_AUTO,
        CORTEX_M_ISRMASK_OFF,
        CORTEX_M_ISRMASK_ON,
+       CORTEX_M_ISRMASK_STEPONLY,
 };
 
 struct cortex_m_common {
        int common_magic;
-       struct arm_jtag jtag_info;
 
        /* Context information */
        uint32_t dcb_dhcsr;
@@ -174,23 +183,29 @@ struct cortex_m_common {
        /* Flash Patch and Breakpoint (FPB) */
        int fp_num_lit;
        int fp_num_code;
-       int fp_code_available;
        int fp_rev;
-       int fpb_enabled;
-       int auto_bp_type;
+       bool fpb_enabled;
        struct cortex_m_fp_comparator *fp_comparator_list;
 
        /* Data Watchpoint and Trace (DWT) */
        int dwt_num_comp;
        int dwt_comp_available;
+       uint32_t dwt_devarch;
        struct cortex_m_dwt_comparator *dwt_comparator_list;
        struct reg_cache *dwt_cache;
 
        enum cortex_m_soft_reset_config soft_reset_config;
+       bool vectreset_supported;
 
        enum cortex_m_isrmasking_mode isrmasking_mode;
 
        struct armv7m_common armv7m;
+
+       int apsel;
+
+       /* Whether this target has the erratum that makes C_MASKINTS not apply to
+        * already pending interrupts */
+       bool maskints_erratum;
 };
 
 static inline struct cortex_m_common *
@@ -213,5 +228,7 @@ void cortex_m_enable_breakpoints(struct target *target);
 void cortex_m_enable_watchpoints(struct target *target);
 void cortex_m_dwt_setup(struct cortex_m_common *cm, struct target *target);
 void cortex_m_deinit_target(struct target *target);
+int cortex_m_profiling(struct target *target, uint32_t *samples,
+       uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds);
 
-#endif /* CORTEX_M_H */
+#endif /* OPENOCD_TARGET_CORTEX_M_H */