cortex_a : optimize apb read/write access.

[openocd.git] / src / target / cortex_m.c

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 9e4dcb644ae86071189dbe150feb86ece4e08cbd..1d645c67eee6d39f42016929308b1a51709c2048 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -425,8 +425,9 @@ static int cortex_m3_debug_entry(struct target *target)
        int num_regs = arm->core_cache->num_regs;
 
        for (i = 0; i < num_regs; i++) {
-               if (!armv7m->arm.core_cache->reg_list[i].valid)
-                       armv7m->read_core_reg(target, i);
+               r = &armv7m->arm.core_cache->reg_list[i];
+               if (!r->valid)
+                       arm->read_core_reg(target, r, i, ARM_MODE_ANY);
        }
 
        r = arm->core_cache->reg_list + ARMV7M_xPSR;
@@ -1619,7 +1620,7 @@ static int cortex_m3_read_memory(struct target *target, uint32_t address,
        if (count && buffer) {
                switch (size) {
                        case 4:
-                               retval = mem_ap_read_buf_u32(swjdp, buffer, 4 * count, address);
+                               retval = mem_ap_read_buf_u32(swjdp, buffer, 4 * count, address, true);
                                break;
                        case 2:
                                retval = mem_ap_read_buf_u16(swjdp, buffer, 2 * count, address);
@@ -1649,7 +1650,7 @@ static int cortex_m3_write_memory(struct target *target, uint32_t address,
        if (count && buffer) {
                switch (size) {
                        case 4:
-                               retval = mem_ap_write_buf_u32(swjdp, buffer, 4 * count, address);
+                               retval = mem_ap_write_buf_u32(swjdp, buffer, 4 * count, address, true);
                                break;
                        case 2:
                                retval = mem_ap_write_buf_u16(swjdp, buffer, 2 * count, address);