Matt Hsu <matt@0xlab.org> cortex-a8: Copy some more registers from the documentation

[openocd.git] / src / target / cortex_a8.h

diff --git a/src/target/cortex_a8.h b/src/target/cortex_a8.h
index c1610d540e7fdbf78690371d04400f99c2e84634..bb57b13e7caba815f1d95e84440ec72ee00dc7d5 100644 (file)
--- a/src/target/cortex_a8.h
+++ b/src/target/cortex_a8.h
@@ -42,6 +42,7 @@ extern char* cortex_a8_state_strings[];
 /* Debug Control Block */
 #define CPUDBG_DIDR            0x000
 #define CPUDBG_WFAR            0x018
 /* Debug Control Block */
 #define CPUDBG_DIDR            0x000
 #define CPUDBG_WFAR            0x018

+#define CPUDBG_VCR     0x01C

 #define CPUDBG_DSCCR   0x028
 #define CPUDBG_DTRRX   0x080
 #define CPUDBG_ITR     0x084
 #define CPUDBG_DSCCR   0x028
 #define CPUDBG_DTRRX   0x080
 #define CPUDBG_ITR     0x084


@@ -52,6 +53,13 @@ extern char* cortex_a8_state_strings[];
 #define CPUDBG_BCR_BASE        0x140
 #define CPUDBG_WVR_BASE        0x180
 
 #define CPUDBG_BCR_BASE        0x140
 #define CPUDBG_WVR_BASE        0x180
 

+#define CPUDBG_OSLAR   0x300
+#define CPUDBG_OSLSR   0x304
+#define CPUDBG_OSSRR   0x308
+
+#define CPUDBG_PRCR    0x310
+#define CPUDBG_PRSR    0x314
+

 #define CPUDBG_CPUID   0xD00
 #define CPUDBG_CTYPR   0xD04
 #define CPUDBG_TTYPR   0xD0C
 #define CPUDBG_CPUID   0xD00
 #define CPUDBG_CTYPR   0xD04
 #define CPUDBG_TTYPR   0xD0C