Remove FSF address from GPL notices
[openocd.git] / src / target / cortex_a.h
index e124a9e07ccaadb6998177d4b1f05a91ab8bd823..e6e9e97735fc76bb512412d21e1ebebbbab63e29 100644 (file)
@@ -22,9 +22,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifndef CORTEX_A_H
@@ -60,6 +58,11 @@ enum cortex_a_isrmasking_mode {
        CORTEX_A_ISRMASK_ON,
 };
 
+enum cortex_a_dacrfixup_mode {
+       CORTEX_A_DACRFIXUP_OFF,
+       CORTEX_A_DACRFIXUP_ON
+};
+
 struct cortex_a_brp {
        int used;
        int type;
@@ -70,7 +73,6 @@ struct cortex_a_brp {
 
 struct cortex_a_common {
        int common_magic;
-       struct arm_jtag jtag_info;
 
        /* Context information */
        uint32_t cpudbg_dscr;
@@ -79,9 +81,12 @@ struct cortex_a_common {
        uint32_t cp15_control_reg;
        /* latest cp15 register value written and cpsr processor mode */
        uint32_t cp15_control_reg_curr;
+       /* auxiliary control reg */
+       uint32_t cp15_aux_control_reg;
+       /* DACR */
+       uint32_t cp15_dacr_reg;
        enum arm_mode curr_mode;
 
-
        /* Breakpoint register pairs */
        int brp_num_context;
        int brp_num;
@@ -97,6 +102,7 @@ struct cortex_a_common {
        uint32_t didr;
 
        enum cortex_a_isrmasking_mode isrmasking_mode;
+       enum cortex_a_dacrfixup_mode dacrfixup_mode;
 
        struct armv7a_common armv7a_common;
 

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